diff --git a/sys/arm/include/cpu-v6.h b/sys/arm/include/cpu-v6.h
index 6bc9752df7e..e7bf62de023 100644
--- a/sys/arm/include/cpu-v6.h
+++ b/sys/arm/include/cpu-v6.h
@@ -156,8 +156,9 @@ _RF0(cp15_l2ctlr_get, CP15_L2CTLR(%0))
 _RF0(cp15_actlr_get, CP15_ACTLR(%0))
 _WF1(cp15_actlr_set, CP15_ACTLR(%0))
 #if __ARM_ARCH >= 6
-_WF1(cp15_ats1cpr_set, CP15_ATS1CPR(%0));
-_RF0(cp15_par_get, CP15_PAR);
+_WF1(cp15_ats1cpr_set, CP15_ATS1CPR(%0))
+_WF1(cp15_ats1cpw_set, CP15_ATS1CPW(%0))
+_RF0(cp15_par_get, CP15_PAR(%0))
 _RF0(cp15_sctlr_get, CP15_SCTLR(%0))
 #endif
 
diff --git a/sys/arm/include/sysreg.h b/sys/arm/include/sysreg.h
index 31097e9a165..dc9386943d6 100644
--- a/sys/arm/include/sysreg.h
+++ b/sys/arm/include/sysreg.h
@@ -130,7 +130,7 @@
 #define	CP15_BPIALLIS		p15, 0, r0, c7, c1,  6 /* Branch predictor invalidate all IS */
 #endif
 
-#define	CP15_PAR		p15, 0, r0, c7, c4,  0 /* Physical Address Register */
+#define	CP15_PAR(rr)		p15, 0, rr, c7, c4,  0 /* Physical Address Register */
 
 #define	CP15_ICIALLU		p15, 0, r0, c7, c5,  0 /* Instruction cache invalidate all PoU */
 #define	CP15_ICIMVAU(rr)	p15, 0, rr, c7, c5,  1 /* Instruction cache invalidate */