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Whilst here, document that this TX alignment requirement may acutally

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not be required on later hardware.

It would allow for higher packet rates so yes, it would be nice
to disable it.
This commit is contained in:
Adrian Chadd 2013-10-16 19:53:50 +00:00
parent c572da7f10
commit ae222aa987
1 changed files with 8 additions and 0 deletions
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8
sys/mips/atheros/if_arge.c
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@ -1261,6 +1261,10 @@ arge_init_locked(struct arge_softc *sc)
* The TX engine requires each fragment to be aligned to a
* 4 byte boundary and the size of each fragment except
* the last to be a multiple of 4 bytes.
*
* XXX TODO: I believe this is only a bug on the AR71xx and
* AR913x MACs. The later MACs (AR724x and later) does not
* need this workaround.
*/
static int
arge_mbuf_chain_is_tx_aligned(struct mbuf *m0)
@ -1294,6 +1298,10 @@ arge_encap(struct arge_softc *sc, struct mbuf **m_head)
/*
* Fix mbuf chain, all fragments should be 4 bytes aligned and
* even 4 bytes
*
* XXX TODO: I believe this is only a bug on the AR71xx and
* AR913x MACs. The later MACs (AR724x and later) does not
* need this workaround.
*/
m = *m_head;
if (! arge_mbuf_chain_is_tx_aligned(m)) {