From ad6ea575857f03ea422acecc86ed3e0516108a9f Mon Sep 17 00:00:00 2001
From: Nathan Whitehorn <nwhitehorn@FreeBSD.org>
Date: Sat, 4 Jan 2014 21:19:20 +0000
Subject: [PATCH] Remove fdt_pic_table code from MIPS, PowerPC, and x86, as it
 is no longer used by anything. The equivalent functionality is provided by
 the PIC drivers themselves on PowerPC and this is a no-op on MIPS and x86.

---
 sys/dev/fdt/fdt_mips.c    | 42 -------------------
 sys/dev/fdt/fdt_powerpc.c | 86 ---------------------------------------
 sys/dev/fdt/fdt_x86.c     |  3 --
 3 files changed, 131 deletions(-)

diff --git a/sys/dev/fdt/fdt_mips.c b/sys/dev/fdt/fdt_mips.c
index 19045742375..4e04602f2aa 100644
--- a/sys/dev/fdt/fdt_mips.c
+++ b/sys/dev/fdt/fdt_mips.c
@@ -49,45 +49,3 @@ struct fdt_fixup_entry fdt_fixup_table[] = {
 	{ NULL, NULL }
 };
 
-/*
- * For PIC-free boards, provide a PIC decoder to be used with mips4k CP0
- * interrupt control directly.
- */
-static int
-fdt_pic_decode_mips4k_cp0(phandle_t node, pcell_t *intr, int *interrupt,
-    int *trig, int *pol)
-{
-
-	if (!fdt_is_compatible(node, "mips,mips4k"))
-		return (ENXIO);
-
-	*interrupt = fdt32_to_cpu(intr[0]);
-	*trig = INTR_TRIGGER_CONFORM;
-	*pol = INTR_POLARITY_CONFORM;
-
-	return (0);
-}
-
-/*
- * CHERI PIC decoder.
- */
-static int
-fdt_pic_decode_beri(phandle_t node, pcell_t *intr, int *interrupt,
-    int *trig, int *pol)
-{
-
-	if (!fdt_is_compatible(node, "sri-cambridge,beri-pic"))
-		return (ENXIO);
-
-	*interrupt = fdt32_to_cpu(intr[0]);
-	*trig = INTR_TRIGGER_CONFORM;
-	*pol = INTR_POLARITY_CONFORM;
-
-	return (0);
-}
-
-fdt_pic_decode_t fdt_pic_table[] = {
-	&fdt_pic_decode_mips4k_cp0,
-	&fdt_pic_decode_beri,
-	NULL
-};
diff --git a/sys/dev/fdt/fdt_powerpc.c b/sys/dev/fdt/fdt_powerpc.c
index d3e9d4e77d9..f408d0a3069 100644
--- a/sys/dev/fdt/fdt_powerpc.c
+++ b/sys/dev/fdt/fdt_powerpc.c
@@ -81,89 +81,3 @@ struct fdt_fixup_entry fdt_fixup_table[] = {
 	{ NULL, NULL }
 };
 
-static int
-fdt_pic_decode_iic(phandle_t node, pcell_t *intr, int *interrupt, int *trig,
-    int *pol)
-{
-	if (!fdt_is_compatible(node, "chrp,iic"))
-		return (ENXIO);
-
-	*interrupt = intr[0];
-
-	switch (intr[1]) {
-	case 0:
-		/* Active L level */
-		*trig = INTR_TRIGGER_LEVEL;
-		*pol = INTR_POLARITY_LOW;
-		break;
-	case 1:
-		/* Active H level */
-		*trig = INTR_TRIGGER_LEVEL;
-		*pol = INTR_POLARITY_HIGH;
-		break;
-	case 2:
-		/* H to L edge */
-		*trig = INTR_TRIGGER_EDGE;
-		*pol = INTR_POLARITY_LOW;
-		break;
-	case 3:
-		/* L to H edge */
-		*trig = INTR_TRIGGER_EDGE;
-		*pol = INTR_POLARITY_HIGH;
-		break;
-	default:
-		*trig = INTR_TRIGGER_CONFORM;
-		*pol = INTR_POLARITY_CONFORM;
-	}
-	return (0);
-}
-
-static int
-fdt_pic_decode_openpic(phandle_t node, pcell_t *intr, int *interrupt,
-    int *trig, int *pol)
-{
-
-	if (!fdt_is_compatible(node, "chrp,open-pic") &&
-	    !fdt_is_type(node, "open-pic"))
-		return (ENXIO);
-
-	/*
-	 * XXX The interrupt number read out from the MPC85XX device tree is
-	 * already offset by 16 to reflect the 'internal' IRQ range shift on
-	 * the OpenPIC.
-	 */
-	*interrupt = intr[0];
-
-	switch (intr[1]) {
-	case 0:
-		/* L to H edge */
-		*trig = INTR_TRIGGER_EDGE;
-		*pol = INTR_POLARITY_HIGH;
-		break;
-	case 1:
-		/* Active L level */
-		*trig = INTR_TRIGGER_LEVEL;
-		*pol = INTR_POLARITY_LOW;
-		break;
-	case 2:
-		/* Active H level */
-		*trig = INTR_TRIGGER_LEVEL;
-		*pol = INTR_POLARITY_HIGH;
-		break;
-	case 3:
-		/* H to L edge */
-		*trig = INTR_TRIGGER_EDGE;
-		*pol = INTR_POLARITY_LOW;
-		break;
-	default:
-		*trig = INTR_TRIGGER_CONFORM;
-		*pol = INTR_POLARITY_CONFORM;
-	}
-	return (0);
-}
-
-fdt_pic_decode_t fdt_pic_table[] = {
-	&fdt_pic_decode_iic,
-	&fdt_pic_decode_openpic,
-	NULL
-};
diff --git a/sys/dev/fdt/fdt_x86.c b/sys/dev/fdt/fdt_x86.c
index 3085f3bb953..d4d9fc89593 100644
--- a/sys/dev/fdt/fdt_x86.c
+++ b/sys/dev/fdt/fdt_x86.c
@@ -46,6 +46,3 @@ struct fdt_fixup_entry fdt_fixup_table[] = {
 	{ NULL, NULL }
 };
 
-fdt_pic_decode_t fdt_pic_table[] = {
-	NULL
-};