From a9063ba1d79492a55b80a19409ee8e1dfb33bcc2 Mon Sep 17 00:00:00 2001 From: Ruslan Bukin Date: Tue, 12 Jun 2018 16:19:27 +0000 Subject: [PATCH] Align virtual addressing entries. This is required due to C-compressed ISA extension option being turned on. This fixes SMP operation in QEMU. Sponsored by: DARPA, AFRL --- sys/riscv/riscv/locore.S | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/sys/riscv/riscv/locore.S b/sys/riscv/riscv/locore.S index 84905084a06..fb39402267e 100644 --- a/sys/riscv/riscv/locore.S +++ b/sys/riscv/riscv/locore.S @@ -156,6 +156,8 @@ _start: or s2, s2, t0 sfence.vma csrw sptbr, s2 + + .align 2 va: /* Setup supervisor trap vector */ @@ -284,6 +286,8 @@ ENTRY(mpentry) or s2, s2, t0 sfence.vma csrw sptbr, s2 + + .align 2 mpva: /* Setup supervisor trap vector */ la t0, cpu_exception_handler