mirror of
https://github.com/opnsense/src.git
synced 2026-06-11 01:30:30 -04:00
Fix this driver to (finally) work with switches. Some more black
magic from the linux driver.
This commit is contained in:
Matt Jacob
parent
f102f87438
commit
a46c6a5114
3 changed files with 163 additions and 26 deletions
148
sys/pci/if_wx.c
148
sys/pci/if_wx.c
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@ -73,6 +73,7 @@
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static int wx_intr __P((void *));
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static void wx_handle_link_intr __P((wx_softc_t *));
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static void wx_check_link __P((wx_softc_t *));
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static void wx_handle_rxint __P((wx_softc_t *));
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static void wx_gc __P((wx_softc_t *));
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static void wx_start __P((struct ifnet *));
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@ -84,7 +85,7 @@ static void wx_hw_stop __P((wx_softc_t *));
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static void wx_set_addr __P((wx_softc_t *, int, u_int8_t *));
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static int wx_hw_initialize __P((wx_softc_t *));
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static void wx_stop __P((wx_softc_t *));
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static void wx_watchdog __P((struct ifnet *));
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static void wx_txwatchdog __P((struct ifnet *));
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static int wx_get_rbuf __P((wx_softc_t *, rxpkt_t *));
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static void wx_rxdma_map __P((wx_softc_t *, rxpkt_t *, struct mbuf *));
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@ -97,7 +98,7 @@ static INLINE u_int16_t wx_read_eeprom_word __P((wx_softc_t *, int));
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static void wx_read_eeprom __P((wx_softc_t *, u_int16_t *, int, int));
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static int wx_attach_common __P((wx_softc_t *));
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static void wx_stats_update __P((void *));
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static void wx_watchdog __P((void *));
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static INLINE void wx_mwi_whackon __P((wx_softc_t *));
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static INLINE void wx_mwi_unwhack __P((wx_softc_t *));
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@ -245,7 +246,7 @@ wx_attach(parent, self, aux)
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ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
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ifp->if_ioctl = wx_ioctl;
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ifp->if_start = wx_start;
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ifp->if_watchdog = wx_watchdog;
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ifp->if_watchdog = wx_txwatchdog;
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/*
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* Attach the interface.
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@ -615,6 +616,7 @@ wx_attach(device_t dev)
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sc->w.arpcom.ac_enaddr[4], sc->w.arpcom.ac_enaddr[5]);
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(void) snprintf(sc->wx_name, sizeof (sc->wx_name) - 1, "wx%d",
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device_get_unit(dev));
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ifp = &sc->w.arpcom.ac_if;
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ifp->if_unit = device_get_unit(dev);
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ifp->if_name = "wx";
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@ -626,7 +628,7 @@ wx_attach(device_t dev)
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ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
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ifp->if_ioctl = wx_ioctl;
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ifp->if_start = wx_start;
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ifp->if_watchdog = wx_watchdog;
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ifp->if_watchdog = wx_txwatchdog;
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if_attach(ifp);
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ifp->if_snd.ifq_maxlen = WX_MAX_TDESC - 1;
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ether_ifattach(ifp);
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@ -760,23 +762,32 @@ wx_attach_common(sc)
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int ll = 0;
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/*
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* First, reset the chip.
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* First, check for revision support.
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*/
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if (sc->revision < 2) {
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printf("%s: cannot support revision %d chips\n",
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sc->wx_name, sc->revision);
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return (ENXIO);
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}
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/*
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* Second, reset the chip.
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*/
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wx_hw_stop(sc);
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/*
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* Second, validate our EEPROM.
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* Third, validate our EEPROM.
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*/
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/* TBD */
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/*
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* Third, read eeprom for our MAC address and other things.
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* Fourth, read eeprom for our MAC address and other things.
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*/
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wx_read_eeprom(sc, (u_int16_t *)sc->wx_enaddr, WX_EEPROM_MAC_OFF, 3);
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/*
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* Fourth, establish some adapter parameters.
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* Fifth, establish some adapter parameters.
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*/
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sc->wx_txint_delay = 128;
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ifmedia_init(&sc->wx_media, IFM_IMASK, wx_ifmedia_upd, wx_ifmedia_sts);
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@ -787,7 +798,7 @@ wx_attach_common(sc)
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ll += 1;
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/*
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* Fifth, establish a default device control register word.
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* Sixth, establish a default device control register word.
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*/
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sc->wx_dcr = 0;
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if (sc->wx_cfg1 & WX_EEPROM_CTLR1_FD)
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@ -807,7 +818,7 @@ wx_attach_common(sc)
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/*
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* Sixth, allocate various sw structures...
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* Seventh, allocate various sw structures...
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*/
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len = sizeof (rxpkt_t) * WX_MAX_RDESC;
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sc->rbase = (rxpkt_t *) WXMALLOC(len);
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@ -826,7 +837,7 @@ wx_attach_common(sc)
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ll += 1;
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/*
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* Seventh, allocate and dma map (platform dependent) descriptor rings.
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* Eighth, allocate and dma map (platform dependent) descriptor rings.
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* They have to be aligned on a 4KB boundary.
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*/
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if (wx_dring_setup(sc) == 0) {
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@ -1183,8 +1194,82 @@ static void
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wx_handle_link_intr(sc)
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wx_softc_t *sc;
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{
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u_int32_t txcw, rxcw, dcr, dsr;
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sc->wx_linkintr++;
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printf("%s: link intr 0x%x\n", sc->wx_name, sc->wx_icr);
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dcr = READ_CSR(sc, WXREG_DCR);
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txcw = READ_CSR(sc, WXREG_XMIT_CFGW);
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rxcw = READ_CSR(sc, WXREG_RECV_CFGW);
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dsr = READ_CSR(sc, WXREG_DSR);
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/*
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* If we have LOS or are now receiving Ordered Sets and are not
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* doing auto-negotiation, restore autonegotiation.
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*/
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if (((dcr & WXDCR_SWDPIN1) || (rxcw & WXRXCW_C)) &&
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((txcw & WXTXCW_ANE) == 0)) {
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if (sc->wx_debug) {
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printf("%s: /C/ ordered sets seen- enabling ANE\n",
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sc->wx_name);
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}
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WRITE_CSR(sc, WXREG_XMIT_CFGW, WXTXCW_DEFAULT);
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sc->wx_dcr &= ~WXDCR_SLU;
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WRITE_CSR(sc, WXREG_DCR, sc->wx_dcr);
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sc->ane_failed = 0;
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}
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if (sc->wx_icr & WXISR_LSC) {
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if (READ_CSR(sc, WXREG_DSR) & WXDSR_LU) {
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printf("%s: gigabit link now up\n", sc->wx_name);
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sc->linkup = 1;
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sc->wx_dcr |= (WXDCR_SWDPIO0|WXDCR_SWDPIN0);
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} else {
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printf("%s: gigabit link now down\n", sc->wx_name);
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sc->linkup = 0;
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sc->wx_dcr &= ~(WXDCR_SWDPIO0|WXDCR_SWDPIN0);
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}
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WRITE_CSR(sc, WXREG_DCR, sc->wx_dcr);
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} else {
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printf("%s: receive sequence error\n", sc->wx_name);
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}
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}
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static void
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wx_check_link(sc)
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wx_softc_t *sc;
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{
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u_int32_t rxcw, dcr, dsr;
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rxcw = READ_CSR(sc, WXREG_RECV_CFGW);
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dcr = READ_CSR(sc, WXREG_DCR);
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dsr = READ_CSR(sc, WXREG_DSR);
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if ((dsr & WXDSR_LU) == 0 && (dcr & WXDCR_SWDPIN1) == 0 &&
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(rxcw & WXRXCW_C) == 0) {
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if (sc->ane_failed == 0) {
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sc->ane_failed = 1;
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return;
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}
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if (sc->wx_debug) {
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printf("%s: no /C/ ordered sets seen- disabling ANE\n",
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sc->wx_name);
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}
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WRITE_CSR(sc, WXREG_XMIT_CFGW, WXTXCW_DEFAULT & ~WXTXCW_ANE);
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if (sc->revision == 2)
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sc->wx_dcr &= ~WXDCR_TFCE;
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sc->wx_dcr |= WXDCR_SLU;
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WRITE_CSR(sc, WXREG_DCR, sc->wx_dcr);
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} else if ((rxcw & WXRXCW_C) != 0 && (dcr & WXDCR_SLU) != 0) {
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if (sc->wx_debug) {
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printf("%s: /C/ ordered sets seen- enabling ANE\n",
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sc->wx_name);
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}
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WRITE_CSR(sc, WXREG_XMIT_CFGW, WXTXCW_DEFAULT);
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sc->wx_dcr &= ~WXDCR_SLU;
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WRITE_CSR(sc, WXREG_DCR, sc->wx_dcr);
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}
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}
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static void
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@ -1464,10 +1549,12 @@ wx_gc(sc)
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}
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/*
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* Update packet in/out/collision statistics.
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* Periodic timer to update packet in/out/collision statistics,
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* and, more importantly, garbage collect completed transmissions
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* and to handle link status changes.
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*/
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static void
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wx_stats_update(arg)
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wx_watchdog(arg)
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void *arg;
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{
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wx_softc_t *sc = arg;
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@ -1475,12 +1562,13 @@ wx_stats_update(arg)
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s = splimp();
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wx_gc(sc);
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wx_check_link(sc);
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splx(s);
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/*
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* Schedule another timeout one second from now.
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*/
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TIMEOUT(sc, wx_stats_update, sc, hz);
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TIMEOUT(sc, wx_watchdog, sc, hz);
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}
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/*
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@ -1565,6 +1653,13 @@ wx_hw_initialize(sc)
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for (i = 0; i < WX_MC_TAB_SIZE; i++) {
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WRITE_CSR(sc, WXREG_MTA + (sizeof (u_int32_t) * 4), 0);
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}
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/*
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* Handle link control
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*/
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WRITE_CSR(sc, WXREG_DCR, sc->wx_dcr | WXDCR_LRST);
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DELAY(50 * 1000);
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if (sc->wx_dcr & (WXDCR_RFCE|WXDCR_TFCE)) {
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WRITE_CSR(sc, WXREG_FCAL, FC_FRM_CONST_LO);
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WRITE_CSR(sc, WXREG_FCAH, FC_FRM_CONST_HI);
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@ -1578,6 +1673,7 @@ wx_hw_initialize(sc)
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if (sc->revision == 2) {
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WRITE_CSR(sc, WXREG_FLOW_RCV_HI, 0);
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WRITE_CSR(sc, WXREG_FLOW_RCV_LO, 0);
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sc->wx_dcr &= ~(WXDCR_RFCE|WXDCR_TFCE);
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} else {
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WRITE_CSR(sc, WXREG_FLOW_RCV_HI, WX_RCV_FLOW_HI_DFLT);
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WRITE_CSR(sc, WXREG_FLOW_RCV_LO, WX_RCV_FLOW_LO_DFLT);
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@ -1590,19 +1686,21 @@ wx_hw_initialize(sc)
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* The pin stuff is all FM from the Linux driver.
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*/
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if ((READ_CSR(sc, WXREG_DCR) & WXDCR_SWDPIN1) == 0) {
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for (i = 0; i < 500; i++) {
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for (i = 0; i < (WX_LINK_UP_TIMEOUT/10); i++) {
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DELAY(10 * 1000);
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if (READ_CSR(sc, WXREG_DSR) & WXDSR_LU) {
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sc->linkup = 1;
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break;
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}
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}
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if (sc->linkup == 0) {
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sc->ane_failed = 1;
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wx_check_link(sc);
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}
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sc->ane_failed = 0;
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} else {
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printf("%s: swdpio did not clear\n", sc->wx_name);
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return (-1);
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}
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if (sc->linkup == 0) {
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printf("%s: link never came up\n", sc->wx_name);
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printf("%s: swdpio1 did not clear- check for reversed cable\n",
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sc->wx_name);
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return (-1);
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}
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sc->wx_ienable = WXIENABLE_DEFAULT;
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@ -1623,7 +1721,7 @@ wx_stop(sc)
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/*
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* Cancel stats updater.
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*/
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UNTIMEOUT(wx_stats_update, sc, sc);
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UNTIMEOUT(wx_watchdog, sc, sc);
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/*
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* Reset the chip
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@ -1664,10 +1762,10 @@ wx_stop(sc)
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}
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/*
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* Watchdog/transmission transmit timeout handler.
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* Transmit Watchdog
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*/
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static void
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wx_watchdog(ifp)
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wx_txwatchdog(ifp)
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struct ifnet *ifp;
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{
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wx_softc_t *sc = SOFTC_IFP(ifp);
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@ -1800,7 +1898,7 @@ wx_init(xsc)
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/*
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* Start stats updater.
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*/
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TIMEOUT(sc, wx_stats_update, sc, hz);
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TIMEOUT(sc, wx_watchdog, sc, hz);
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/*
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* And we're outta here...
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@ -166,6 +166,13 @@ typedef struct {
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#define WXDCR_SLU 0x40 /* Set Link Up */
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#define WXDCR_ILOS 0x80 /* Invert Loss-of-Signal */
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/*
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* General purpose I/O pins
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*
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* Pin 0 is for the LED.
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*
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* Pin 1 is to detect loss of signal (LOS)- if it is set, we've lost signal.
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*/
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#define WXDCR_SWDPINS_SHIFT 18
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#define WXDCR_SWDPINS_MASK 0xf
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#define WXDCR_SWDPIN0 (1 << 18)
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@ -179,6 +186,7 @@ typedef struct {
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#define WXDCR_SWDPIO2 (1 << 24)
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#define WXDCR_SWDPIO3 (1 << 25)
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#define WXDCR_RST 0x04000000 /* Device Reset (self clearing) */
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#define WXDCR_RFCE 0x08000000 /* Receive Flow Control Enable */
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#define WXDCR_TFCE 0x10000000 /* Transmit Flow Control Enable */
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@ -282,6 +290,30 @@ typedef struct {
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#define WX_FDX_COLLISION_DX 64
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#define WX_HDX_COLLISION_DX 512
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/*
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* Receive Configuration Word defines
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*/
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#define WXRXCW_CWMASK 0x0000ffff
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#define WXRXCW_NC 0x04000000
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#define WXRXCW_IV 0x08000000
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#define WXRXCW_CC 0x10000000
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#define WXRXCW_C 0x20000000
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#define WXRXCW_SYNCH 0x40000000
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#define WXRXCW_ANC 0x80000000
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/*
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* Receive Configuration Word defines
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*/
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#define WXRXCW_CWMASK 0x0000ffff
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#define WXRXCW_NC 0x04000000
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#define WXRXCW_IV 0x08000000
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#define WXRXCW_CC 0x10000000
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#define WXRXCW_C 0x20000000
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#define WXRXCW_SYNCH 0x40000000
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#define WXRXCW_ANC 0x80000000
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/*
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* Miscellaneous
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*/
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@ -235,11 +235,12 @@ typedef struct wx_softc {
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/*
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* misc goodies
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*/
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u_int32_t : 18,
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u_int32_t : 17,
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wx_no_flow : 1,
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wx_ilos : 1,
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wx_no_ilos : 1,
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wx_debug : 1,
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ane_failed : 1,
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linkup : 1,
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all_mcasts : 1,
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revision : 8; /* chip revision */
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@ -322,3 +323,9 @@ typedef struct wx_softc {
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#endif
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#define R_NXT_IDX(x) ((x + RXINCR) & (WX_MAX_RDESC - 1))
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#define R_PREV_IDX(x) ((x - RXINCR) & (WX_MAX_RDESC - 1))
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/*
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* Link Up timeout, in milliseconds.
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*/
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#define WX_LINK_UP_TIMEOUT 500
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