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Add a new field 'md_kernnest' to the alpha machine dependent process
structure. This field keeps track of how many levels deep we are nested into the kernel. The nesting level is bumped at the start of a trap, interrupt, syscall, or exception and is decremented on return. This is used to detect the case when the kernel is returning back to a kernel context in exception_return(). If we are returning to the kernel we need to update the globaldata pointer register saved in the stack frame in case we have switched CPU's between taking the initial interrupt that saved the frame and returning. If we don't do this fixup it is possible for a CPU to use the wrong per-cpu data. On UP systems this is not a problem, so the code is conditional on SMP. A count was used instead of simply checking the process status register in the frame during exception_return() since there are critical sections at the very start and end of a trap, exception, or interrupt from userland in which we could trash the t7 register being used in userland. The counter is incremented after adn before these critical sections respectively so that we will not overwrite the saved t7 register if we are interrupted during one of these critical sections.
This commit is contained in:
John Baldwin
parent
a483f58aea
commit
9e438eb4f5
7 changed files with 72 additions and 15 deletions
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@ -140,16 +140,19 @@ XentSys1: LDGP(pv)
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beq t1, exception_return
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/* set the hae register if this process has specified a value */
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ldq t0, GD_CURPROC(globalp)
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beq t0, 3f
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ldq t1, P_MD_FLAGS(t0)
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ldq s0, GD_CURPROC(globalp)
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ldq t1, P_MD_FLAGS(s0)
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and t1, MDP_HAEUSED
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beq t1, 3f
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ldq a0, P_MD_HAE(t0)
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ldq a0, P_MD_HAE(s0)
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ldq pv, chipset + CHIPSET_WRITE_HAE
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CALL((pv))
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3:
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#ifdef SMP
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/* leave the kernel */
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stl zero, P_MD_KERNNEST(s0)
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#endif
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/* restore the registers, and return */
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ldq v0,(FRAME_V0*8)(sp)
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ldq s0,(FRAME_S0*8)(sp)
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@ -253,28 +256,42 @@ LEAF(exception_return, 1) /* XXX should be NESTED */
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br pv, Ler1
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Ler1: LDGP(pv)
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ldq s1, (FRAME_PS * 8)(sp) /* get the saved PS */
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and s1, ALPHA_PSL_IPL_MASK, t0 /* look at the saved IPL */
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bne t0, Lrestoreregs /* != 0: can't do AST or SIR */
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ldq s0, GD_CURPROC(globalp) /* save curproc in s0 */
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#ifdef SMP
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ldl s1, P_MD_KERNNEST(s0)
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subl s1, 1, s1 /* decrement nesting level */
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#endif
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and s1, ALPHA_PSL_USERMODE, t0 /* are we returning to user? */
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beq t0, Lrestoreregs /* no: just return */
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ldq t1, (FRAME_PS * 8)(sp) /* get the saved PS */
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and t1, ALPHA_PSL_USERMODE, t0 /* are we returning to user? */
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beq t0, Lkernelret /* no: kernel return */
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/* Handle any AST's or resched's. */
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mov sp, a0 /* only arg is frame */
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CALL(ast)
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#ifdef SMP
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br Lrestoreregs
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#endif
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Lkernelret:
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#ifdef SMP
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beq s1, Lrestoreregs
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stq globalp, (FRAME_T7*8)(sp) /* fixup globalp */
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#endif
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Lrestoreregs:
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/* set the hae register if this process has specified a value */
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ldq t0, GD_CURPROC(globalp)
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beq t0, Lnohae
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ldq t1, P_MD_FLAGS(t0)
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ldq t1, P_MD_FLAGS(s0)
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and t1, MDP_HAEUSED
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beq t1, Lnohae
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ldq a0, P_MD_HAE(t0)
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ldq pv, chipset + CHIPSET_WRITE_HAE
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CALL((pv))
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Lnohae:
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#ifdef SMP
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/* leave the kernel */
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stl s1, P_MD_KERNNEST(s0)
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#endif
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/* restore the registers, and return */
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bsr ra, exception_restore_regs /* jmp/CALL trashes pv/t12 */
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@ -84,6 +84,9 @@ ASSYM(P_ADDR, offsetof(struct proc, p_addr));
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ASSYM(P_MD_FLAGS, offsetof(struct proc, p_md.md_flags));
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ASSYM(P_MD_PCBPADDR, offsetof(struct proc, p_md.md_pcbpaddr));
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ASSYM(P_MD_HAE, offsetof(struct proc, p_md.md_hae));
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#ifdef SMP
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ASSYM(P_MD_KERNNEST, offsetof(struct proc, p_md.md_kernnest));
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#endif
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ASSYM(MDP_HAEUSED, MDP_HAEUSED);
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ASSYM(CHIPSET_WRITE_HAE, offsetof(struct alpha_chipset, write_hae));
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@ -91,12 +91,22 @@ interrupt(a0, a1, a2, framep)
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struct trapframe *framep;
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{
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struct proc *p;
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#ifdef SMP
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critical_t s;
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#endif
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/*
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* Find our per-cpu globals.
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*/
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#ifdef SMP
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s = critical_enter();
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#endif
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globalp = (struct globaldata *) alpha_pal_rdval();
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p = curproc;
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#ifdef SMP
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p->p_md.md_kernnest++;
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critical_exit(s);
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#endif
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atomic_add_int(&p->p_intr_nesting_level, 1);
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#ifndef SMP
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{
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@ -966,6 +966,9 @@ alpha_init(pfn, ptb, bim, bip, biv)
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globaldata_init(globalp, alpha_pal_whami(), sz);
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alpha_pal_wrval((u_int64_t) globalp);
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PCPU_GET(next_asn) = 1; /* 0 used for proc0 pmap */
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#ifdef SMP
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proc0.p_md.md_kernnest = 1;
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#endif
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}
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/*
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@ -312,14 +312,24 @@ trap(a0, a1, a2, entry, framep)
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u_int64_t ucode;
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u_quad_t sticks;
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int user;
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#ifdef SMP
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critical_t s;
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#endif
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/*
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* Find our per-cpu globals.
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*/
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#ifdef SMP
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s = critical_enter();
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#endif
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globalp = (struct globaldata *) alpha_pal_rdval();
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p = curproc;
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#ifdef SMP
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p->p_md.md_kernnest++;
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critical_exit(s);
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#endif
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cnt.v_trap++;
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p = curproc;
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ucode = 0;
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user = (framep->tf_regs[FRAME_PS] & ALPHA_PSL_USERMODE) != 0;
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if (user) {
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@ -704,11 +714,22 @@ syscall(code, framep)
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u_quad_t sticks;
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u_int64_t args[10]; /* XXX */
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u_int hidden = 0, nargs;
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#ifdef SMP
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critical_t s;
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#endif
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/*
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* Find our per-cpu globals.
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*/
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#ifdef SMP
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s = critical_enter();
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#endif
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globalp = (struct globaldata *) alpha_pal_rdval();
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p = curproc;
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#ifdef SMP
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p->p_md.md_kernnest++;
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critical_exit(s);
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#endif
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mtx_lock(&Giant);
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framep->tf_regs[FRAME_TRAPARG_A0] = 0;
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@ -720,7 +741,6 @@ syscall(code, framep)
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#endif
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cnt.v_syscall++;
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p = curproc;
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p->p_md.md_tf = framep;
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opc = framep->tf_regs[FRAME_PC] - 4;
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mtx_lock_spin(&sched_lock);
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@ -50,6 +50,7 @@ struct mdproc {
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struct mdbpt md_sstep[2]; /* two single step breakpoints */
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u_int64_t md_hae; /* user HAE register value */
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void *osf_sigtramp; /* user-level signal trampoline */
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u_int md_kernnest; /* nesting level in the kernel */
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};
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#define MDP_FPUSED 0x0001 /* Process used the FPU */
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@ -84,6 +84,9 @@ ASSYM(P_ADDR, offsetof(struct proc, p_addr));
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ASSYM(P_MD_FLAGS, offsetof(struct proc, p_md.md_flags));
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ASSYM(P_MD_PCBPADDR, offsetof(struct proc, p_md.md_pcbpaddr));
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ASSYM(P_MD_HAE, offsetof(struct proc, p_md.md_hae));
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#ifdef SMP
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ASSYM(P_MD_KERNNEST, offsetof(struct proc, p_md.md_kernnest));
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#endif
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ASSYM(MDP_HAEUSED, MDP_HAEUSED);
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ASSYM(CHIPSET_WRITE_HAE, offsetof(struct alpha_chipset, write_hae));
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