diff --git a/sys/boot/ia64/common/exec.c b/sys/boot/ia64/common/exec.c
index a5a02d4df24..6b451f24cb3 100644
--- a/sys/boot/ia64/common/exec.c
+++ b/sys/boot/ia64/common/exec.c
@@ -105,7 +105,7 @@ elf64_exec(struct preloaded_file *fp)
 	ia64_set_rr(IA64_RR_BASE(7), (7 << 8) | (28 << 2));
 
 	pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY |
-	    PTE_PL_KERN | PTE_AR_RWX;
+	    PTE_PL_KERN | PTE_AR_RWX | PTE_ED;
 
 	__asm __volatile("mov cr.ifa=%0" :: "r"(IA64_RR_BASE(7)));
 	__asm __volatile("mov cr.itir=%0" :: "r"(28 << 2));
diff --git a/sys/ia64/ia64/exception.S b/sys/ia64/ia64/exception.S
index 52b5e9741ef..c54495605f7 100644
--- a/sys/ia64/ia64/exception.S
+++ b/sys/ia64/ia64/exception.S
@@ -802,7 +802,7 @@ IVT_ENTRY(Alternate_Instruction_TLB, 0x0c00)
 (p13)	br.spnt	9f
 	;;
 (p15)	movl	r17=PTE_PRESENT+PTE_MA_WB+PTE_ACCESSED+PTE_DIRTY+PTE_PL_KERN+ \
-			PTE_AR_RX
+			PTE_AR_RX+PTE_ED
 (p14)	movl	r17=PTE_PRESENT+PTE_MA_UC+PTE_ACCESSED+PTE_DIRTY+PTE_PL_KERN+ \
 			PTE_AR_RX
 	;;
@@ -829,7 +829,7 @@ IVT_ENTRY(Alternate_Data_TLB, 0x1000)
 (p13)	br.spnt	9f
 	;;
 (p15)	movl	r17=PTE_PRESENT+PTE_MA_WB+PTE_ACCESSED+PTE_DIRTY+PTE_PL_KERN+ \
-			PTE_AR_RW
+			PTE_AR_RW+PTE_ED
 (p14)	movl	r17=PTE_PRESENT+PTE_MA_UC+PTE_ACCESSED+PTE_DIRTY+PTE_PL_KERN+ \
 			PTE_AR_RW
 	;;
diff --git a/sys/ia64/ia64/locore.S b/sys/ia64/ia64/locore.S
index 12c48b0c8be..e52c76a48cb 100644
--- a/sys/ia64/ia64/locore.S
+++ b/sys/ia64/ia64/locore.S
@@ -80,19 +80,36 @@ ENTRY_NOPROFILE(__start, 1)
 	movl	r16=pa_bootinfo
 	;;
 }
+{	.mmi
 	st8	[r16]=r8		// save the PA of the bootinfo block
 	loadrs				// invalidate regs
+	mov	r17=IA64_DCR_DEFAULT
 	;;
+}
+{	.mmi
+	mov	cr.dcr=r17
 	mov	ar.rsc=3		// turn rse back on
+	nop	0
 	;;
+}
+{	.mmi
+	srlz.d
 	alloc	r16=ar.pfs,0,0,1,0
-	;;
-	movl	out0=0			// we are linked at the right address 
+	mov	out0=r0			// we are linked at the right address 
 	;;				// we just need to process fptrs
+}
+{	.bbb
+	nop	0
+	nop	0
 	br.call.sptk.many rp=_reloc
 	;;
+}
+{	.bbb
+	nop	0
+	nop	0
 	br.call.sptk.many rp=ia64_init
 	;;
+}
 	/* NOTREACHED */
 1:	br.cond.sptk.few 1b
 END(__start)
@@ -181,11 +198,10 @@ ENTRY_NOPROFILE(os_boot_rendez,0)
 	mov	rr[r17] = r16
 	;;
 	srlz.d
-	mov	r16 = PTE_PRESENT+PTE_MA_WB+PTE_ACCESSED+PTE_DIRTY+ \
-			PTE_PL_KERN+PTE_AR_RWX
 	mov	r18 = 28<<2
+	movl	r16 = PTE_PRESENT+PTE_MA_WB+PTE_ACCESSED+PTE_DIRTY+ \
+			PTE_PL_KERN+PTE_AR_RWX+PTE_ED
 	;;
-
 	mov	cr.ifa = r17
 	mov	cr.itir = r18
 	ptr.d	r17, r18
@@ -194,8 +210,10 @@ ENTRY_NOPROFILE(os_boot_rendez,0)
 	srlz.i
 	;;
 	itr.d	dtr[r0] = r16
+	mov	r18 = IA64_DCR_DEFAULT
 	;;
 	itr.i	itr[r0] = r16
+	mov	cr.dcr = r18
 	;;
 	srlz.i
 	;;
diff --git a/sys/ia64/ia64/pmap.c b/sys/ia64/ia64/pmap.c
index 9f747346ea5..0771c6c744a 100644
--- a/sys/ia64/ia64/pmap.c
+++ b/sys/ia64/ia64/pmap.c
@@ -1155,14 +1155,14 @@ pmap_free_pte(struct ia64_lpte *pte, vm_offset_t va)
 static PMAP_INLINE void
 pmap_pte_prot(pmap_t pm, struct ia64_lpte *pte, vm_prot_t prot)
 {
-	static int prot2ar[4] = {
-		PTE_AR_R,	/* VM_PROT_NONE */
-		PTE_AR_RW,	/* VM_PROT_WRITE */
-		PTE_AR_RX,	/* VM_PROT_EXECUTE */
-		PTE_AR_RWX	/* VM_PROT_WRITE|VM_PROT_EXECUTE */
+	static long prot2ar[4] = {
+		PTE_AR_R,		/* VM_PROT_NONE */
+		PTE_AR_RW,		/* VM_PROT_WRITE */
+		PTE_AR_RX|PTE_ED,	/* VM_PROT_EXECUTE */
+		PTE_AR_RWX|PTE_ED	/* VM_PROT_WRITE|VM_PROT_EXECUTE */
 	};
 
-	pte->pte &= ~(PTE_PROT_MASK | PTE_PL_MASK | PTE_AR_MASK);
+	pte->pte &= ~(PTE_PROT_MASK | PTE_PL_MASK | PTE_AR_MASK | PTE_ED);
 	pte->pte |= (uint64_t)(prot & VM_PROT_ALL) << 56;
 	pte->pte |= (prot == VM_PROT_NONE || pm == kernel_pmap)
 	    ? PTE_PL_KERN : PTE_PL_USER;
@@ -1181,7 +1181,7 @@ pmap_set_pte(struct ia64_lpte *pte, vm_offset_t va, vm_offset_t pa,
     boolean_t wired, boolean_t managed)
 {
 
-	pte->pte &= PTE_PROT_MASK | PTE_PL_MASK | PTE_AR_MASK;
+	pte->pte &= PTE_PROT_MASK | PTE_PL_MASK | PTE_AR_MASK | PTE_ED;
 	pte->pte |= PTE_PRESENT | PTE_MA_WB;
 	pte->pte |= (managed) ? PTE_MANAGED : (PTE_DIRTY | PTE_ACCESSED);
 	pte->pte |= (wired) ? PTE_WIRED : 0;
diff --git a/sys/ia64/include/ia64_cpu.h b/sys/ia64/include/ia64_cpu.h
index 4f5c318e4ca..675b64c3150 100644
--- a/sys/ia64/include/ia64_cpu.h
+++ b/sys/ia64/include/ia64_cpu.h
@@ -1,4 +1,5 @@
 /*-
+ * Copyright (c) 2007 Marcel Moolenaar
  * Copyright (c) 2000 Doug Rabson
  * All rights reserved.
  *
@@ -23,12 +24,30 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- *	$FreeBSD$
+ * $FreeBSD$
  */
 
 #ifndef _MACHINE_IA64_CPU_H_
 #define _MACHINE_IA64_CPU_H_
 
+/*
+ * Definition of DCR bits.
+ */
+#define	IA64_DCR_PP		0x0000000000000001
+#define	IA64_DCR_BE		0x0000000000000002
+#define	IA64_DCR_LC		0x0000000000000004
+#define	IA64_DCR_DM		0x0000000000000100
+#define	IA64_DCR_DP		0x0000000000000200
+#define	IA64_DCR_DK		0x0000000000000400
+#define	IA64_DCR_DX		0x0000000000000800
+#define	IA64_DCR_DR		0x0000000000001000
+#define	IA64_DCR_DA		0x0000000000002000
+#define	IA64_DCR_DD		0x0000000000004000
+
+#define	IA64_DCR_DEFAULT					\
+    (IA64_DCR_DM | IA64_DCR_DP | IA64_DCR_DK | IA64_DCR_DX |	\
+     IA64_DCR_DR | IA64_DCR_DA | IA64_DCR_DD)
+
 /*
  * Definition of PSR and IPSR bits.
  */