From 9b6560e483b1f18b0337eea0b7fd02a0c47dcc37 Mon Sep 17 00:00:00 2001 From: Michael Reifenberger Date: Wed, 12 Jul 2006 16:52:56 +0000 Subject: [PATCH] fix typo in identcpu.c and add one define to specialreg.h. MFC after: 1 week --- sys/i386/i386/identcpu.c | 2 +- sys/i386/include/specialreg.h | 5 ++++- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/sys/i386/i386/identcpu.c b/sys/i386/i386/identcpu.c index 7fb488d8e9b..3acaf04086d 100644 --- a/sys/i386/i386/identcpu.c +++ b/sys/i386/i386/identcpu.c @@ -587,7 +587,7 @@ printcpuinfo(void) if ((cpu_id & 0xf) < 3) break; /* fall through. */ - case 0x6a9: + case 0x6a0: strcpy(cpu_model, "VIA C7 Esther"); do_cpuid(0xc0000000, regs); i = regs[0]; diff --git a/sys/i386/include/specialreg.h b/sys/i386/include/specialreg.h index e1b9620b717..8111532dd56 100644 --- a/sys/i386/include/specialreg.h +++ b/sys/i386/include/specialreg.h @@ -409,7 +409,10 @@ #define AMD_WT_ALLOC_PRE 0x20000 /* programmable range enable */ #define AMD_WT_ALLOC_FRE 0x10000 /* fixed (A0000-FFFFF) range enable */ -/* VIA ACE crypto featureset: for via_has_xcrypt */ +/* VIA ACE crypto featureset: for via_feature_rng */ +#define VIA_HAS_RNG 1 /* cpu has RNG */ + +/* VIA ACE crypto featureset: for via_feature_xcrypt */ #define VIA_HAS_AES 1 /* cpu has AES */ #define VIA_HAS_SHA 2 /* cpu has SHA1 & SHA256 */ #define VIA_HAS_MM 4 /* cpu has RSA instructions */