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MIPS: Implement fue*word* and casueword* in assembly.
Remove NO_FUEWORD so the 'e' variants are wrapped by the non-'e' variants. This is more correct and leaves sparc64 as the outlier. Reviewed by: jmallett, kib Obtained from: CheriBSD Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D14603
This commit is contained in:
Brooks Davis
parent
ac15bcde8a
commit
97519ff698
3 changed files with 41 additions and 38 deletions
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@ -505,8 +505,8 @@ copyout_unmap(struct thread *td, vm_offset_t addr, size_t sz)
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/*
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* XXXKIB The temporal implementation of fue*() functions which do not
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* handle usermode -1 properly, mixing it with the fault code. Keep
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* this until MD code is written. Currently sparc64 and mips do not
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* have proper implementation.
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* this until MD code is written. Currently sparc64 does not have a
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* proper implementation.
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*/
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int
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@ -185,8 +185,4 @@
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#define pgtok(x) ((x) * (PAGE_SIZE / 1024))
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#ifdef _KERNEL
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#define NO_FUEWORD 1
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#endif
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#endif /* !_MIPS_INCLUDE_PARAM_H_ */
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@ -285,8 +285,8 @@ END(copyerr)
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* user-space.
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*/
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#ifdef __mips_n64
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LEAF(fuword64)
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XLEAF(fuword)
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LEAF(fueword64)
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XLEAF(fueword)
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PTR_LA v0, fswberr
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blt a0, zero, fswberr # make sure address is in user space
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nop
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@ -294,14 +294,16 @@ XLEAF(fuword)
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PTR_L v1, PC_CURPCB(v1)
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PTR_S v0, U_PCB_ONFAULT(v1)
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ld v0, 0(a0) # fetch word
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j ra
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PTR_S zero, U_PCB_ONFAULT(v1)
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END(fuword64)
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sd v0, 0(a1) # store word
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j ra
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li v0, 0
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END(fueword64)
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#endif
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LEAF(fuword32)
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LEAF(fueword32)
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#ifndef __mips_n64
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XLEAF(fuword)
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XLEAF(fueword)
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#endif
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PTR_LA v0, fswberr
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blt a0, zero, fswberr # make sure address is in user space
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@ -310,11 +312,13 @@ XLEAF(fuword)
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PTR_L v1, PC_CURPCB(v1)
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PTR_S v0, U_PCB_ONFAULT(v1)
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lw v0, 0(a0) # fetch word
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j ra
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PTR_S zero, U_PCB_ONFAULT(v1)
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END(fuword32)
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sw v0, 0(a1) # store word
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j ra
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li v0, 0
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END(fueword32)
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LEAF(fusword)
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LEAF(fuesword)
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PTR_LA v0, fswberr
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blt a0, zero, fswberr # make sure address is in user space
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nop
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@ -322,9 +326,11 @@ LEAF(fusword)
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PTR_L v1, PC_CURPCB(v1)
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PTR_S v0, U_PCB_ONFAULT(v1)
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lhu v0, 0(a0) # fetch short
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j ra
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PTR_S zero, U_PCB_ONFAULT(v1)
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END(fusword)
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sh v0, 0(a1) # store short
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j ra
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li v0, 0
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END(fuesword)
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LEAF(fubyte)
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PTR_LA v0, fswberr
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@ -371,17 +377,18 @@ END(suword64)
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#endif
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/*
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* casuword(9)
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* <v0>u_long casuword(<a0>u_long *p, <a1>u_long oldval, <a2>u_long newval)
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* casueword(9)
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* <v0>u_long casueword(<a0>u_long *p, <a1>u_long oldval, <a2>u_long *oldval_p,
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* <a3>u_long newval)
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*/
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/*
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* casuword32(9)
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* <v0>uint32_t casuword(<a0>uint32_t *p, <a1>uint32_t oldval,
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* <a2>uint32_t newval)
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* casueword32(9)
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* <v0>uint32_t casueword(<a0>uint32_t *p, <a1>uint32_t oldval,
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* <a2>uint32_t newval)
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*/
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LEAF(casuword32)
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LEAF(casueword32)
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#ifndef __mips_n64
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XLEAF(casuword)
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XLEAF(casueword)
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#endif
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PTR_LA v0, fswberr
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blt a0, zero, fswberr # make sure address is in user space
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@ -390,26 +397,26 @@ XLEAF(casuword)
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PTR_L v1, PC_CURPCB(v1)
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PTR_S v0, U_PCB_ONFAULT(v1)
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1:
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move t0, a2
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ll v0, 0(a0)
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bne a1, v0, 2f
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move t0, a3
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ll t1, 0(a0)
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bne a1, t1, 2f
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nop
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sc t0, 0(a0) # store word
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beqz t0, 1b
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nop
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j 3f
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nop
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li v0, 0
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2:
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li v0, -1
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3:
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PTR_S zero, U_PCB_ONFAULT(v1)
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jr ra
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nop
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END(casuword32)
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sw t1, 0(a2) # unconditionally store old word
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END(casueword32)
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#ifdef __mips_n64
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LEAF(casuword64)
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XLEAF(casuword)
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LEAF(casueword64)
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XLEAF(casueword)
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PTR_LA v0, fswberr
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blt a0, zero, fswberr # make sure address is in user space
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nop
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@ -417,22 +424,22 @@ XLEAF(casuword)
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PTR_L v1, PC_CURPCB(v1)
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PTR_S v0, U_PCB_ONFAULT(v1)
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1:
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move t0, a2
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lld v0, 0(a0)
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bne a1, v0, 2f
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move t0, a3
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lld t1, 0(a0)
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bne a1, t1, 2f
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nop
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scd t0, 0(a0) # store double word
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beqz t0, 1b
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nop
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j 3f
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nop
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li v0, 0
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2:
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li v0, -1
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3:
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PTR_S zero, U_PCB_ONFAULT(v1)
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jr ra
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nop
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END(casuword64)
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sd t1, 0(a2) # unconditionally store old word
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END(casueword64)
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#endif
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/*
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