From 9582607bb593b06e81e970e7b571d041f61399c8 Mon Sep 17 00:00:00 2001 From: Marius Strobl Date: Sun, 2 May 2010 16:46:20 +0000 Subject: [PATCH] MFC: r206450 Correct the DCR_IPE macro to refer to the right bit. Also improve the associated comment as besides US-IV+ these bits are only available with US-III++, i.e. the 1.2GHz version of the US-III+. --- sys/sparc64/include/dcr.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sys/sparc64/include/dcr.h b/sys/sparc64/include/dcr.h index b1f993a0609..42159adc9c1 100644 --- a/sys/sparc64/include/dcr.h +++ b/sys/sparc64/include/dcr.h @@ -43,8 +43,8 @@ #define DCR_OBSDATA_CT_MASK \ (((1UL << DCR_OBSDATA_CT_BITS) - 1) << DCR_OBSDATA_SHIFT) -/* The following bits are valid for the UltraSPARC-III+/IV+ only. */ -#define DCR_IPE (1UL << 5) +/* The following bits are valid for the UltraSPARC-III++/IV+ only. */ +#define DCR_IPE (1UL << 2) #define DCR_OBSDATA_CTP_BITS 6 #define DCR_OBSDATA_CTP_MASK \