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- Add macros for the states of the interrupt clear registers.
- Change INTMAP_VEC() to take an INO as its second argument rather than an INR. The former is what I actually intended with this macro and how it's currently used.
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1 changed files with 6 additions and 2 deletions
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@ -39,6 +39,10 @@
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#ifndef _MACHINE_BUS_COMMON_H_
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#define _MACHINE_BUS_COMMON_H_
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#define INTCLR_PENDING 0x000000003ULL /* Interrupt queued to CPU */
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#define INTCLR_RECEIVED 0x000000001ULL /* Interrupt received */
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#define INTCLR_IDLE 0x000000000ULL /* Interrupt idle */
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#define INTMAP_V 0x080000000ULL /* Interrupt valid (enabled) */
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#define INTMAP_TID_MASK 0x07c000000ULL /* UPA target ID */
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#define INTMAP_TID_SHIFT 26
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@ -60,9 +64,9 @@
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(INTMAP_TID((mr), (mid)) | INTMAP_V)
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#define INTMAP_TID(mr, mid) \
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(((mr) & ~INTMAP_TID_MASK) | ((mid) << INTMAP_TID_SHIFT))
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#define INTMAP_VEC(ign, inr) \
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#define INTMAP_VEC(ign, ino) \
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((((ign) << INTMAP_IGN_SHIFT) & INTMAP_IGN_MASK) | \
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((inr) & INTMAP_INR_MASK))
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((ino) & INTMAP_INO_MASK))
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/* counter-timer support. */
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void sparc64_counter_init(const char *name, bus_space_tag_t tag,
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