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gicv3: Support indirect ITS tables
The GICv3 ITS device supports two options for device tables. Currently we support a single table to hold all device IDs, however when the device ID space grows large this can be too large for the GITS_BASER register to describe. To handle this case, and to reduce the memory needed when this space is sparse support the second option, the indirect table. The indirect table is a 2 level table where the first level contains the physical address of the second with a valid bit. The second level is an ITS page sized table where each entry is the original entry size. As we don't need to allocate a second level table for devices IDs that don't exist this can reduce the allocation size. Reviewed by: gallatin Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D41555
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2 changed files with 95 additions and 4 deletions
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@ -417,6 +417,8 @@
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#define GITS_BASER_SIZE_MASK 0xFFUL
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#define GITS_BASER_NUM 8
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/* Size of entries in a level 1 indirect table */
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#define GITS_INDIRECT_L1_ESIZE 8
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#define GITS_TYPER (0x0008)
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#define GITS_TYPER_HCC_SHIFT 24
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@ -433,6 +435,7 @@
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((((x) & GITS_TYPER_ITTES_MASK) >> GITS_TYPER_ITTES_SHIFT) + 1)
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#define GITS_TRANSLATER (0x10040)
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/*
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* LPI related
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*/
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@ -1,5 +1,6 @@
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/*-
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* Copyright (c) 2015-2016 The FreeBSD Foundation
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* Copyright (c) 2023 Arm Ltd
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*
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* This software was developed by Andrew Turner under
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* the sponsorship of the FreeBSD Foundation.
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@ -221,10 +222,16 @@ struct its_cmd {
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/* An ITS private table */
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struct its_ptable {
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vm_offset_t ptab_vaddr;
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/* Size of the L1 table */
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/* Size of the L1 and L2 tables */
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size_t ptab_l1_size;
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/* Number of L1 entries */
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size_t ptab_l2_size;
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/* Number of L1 and L2 entries */
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int ptab_l1_nidents;
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int ptab_l2_nidents;
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int ptab_page_size;
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int ptab_share;
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bool ptab_indirect;
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};
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/* ITS collection description. */
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@ -475,6 +482,23 @@ gicv3_its_table_page_size(struct gicv3_its_softc *sc, int table)
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}
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}
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static bool
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gicv3_its_table_supports_indirect(struct gicv3_its_softc *sc, int table)
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{
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uint64_t reg;
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reg = gic_its_read_8(sc, GITS_BASER(table));
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/* Try setting the indirect flag */
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reg |= GITS_BASER_INDIRECT;
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gic_its_write_8(sc, GITS_BASER(table), reg);
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/* Read back to check */
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reg = gic_its_read_8(sc, GITS_BASER(table));
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return ((reg & GITS_BASER_INDIRECT) != 0);
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}
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static int
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gicv3_its_table_init(device_t dev, struct gicv3_its_softc *sc)
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{
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@ -482,9 +506,10 @@ gicv3_its_table_init(device_t dev, struct gicv3_its_softc *sc)
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vm_paddr_t paddr;
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uint64_t cache, reg, share, tmp, type;
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size_t its_tbl_size, nitspages, npages;
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size_t l1_esize, l1_nidents;
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size_t l1_esize, l2_esize, l1_nidents, l2_nidents;
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int i, page_size;
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int devbits;
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bool indirect;
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if ((sc->sc_its_flags & ITS_FLAGS_ERRATA_CAVIUM_22375) != 0) {
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/*
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@ -532,6 +557,9 @@ gicv3_its_table_init(device_t dev, struct gicv3_its_softc *sc)
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return (EINVAL);
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}
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indirect = false;
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l2_nidents = 0;
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l2_esize = 0;
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switch(type) {
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case GITS_BASER_TYPE_DEV:
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if (sc->sc_dev_table_idx != -1)
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@ -540,6 +568,23 @@ gicv3_its_table_init(device_t dev, struct gicv3_its_softc *sc)
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sc->sc_dev_table_idx = i;
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l1_nidents = (1 << devbits);
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if ((l1_esize * l1_nidents) > (page_size * 2)) {
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indirect =
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gicv3_its_table_supports_indirect(sc, i);
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if (indirect) {
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/*
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* Each l1 entry is 8 bytes and points
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* to an l2 table of size page_size.
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* Calculate how many entries this is
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* and use this to find how many
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* 8 byte l1 idents we need.
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*/
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l2_esize = l1_esize;
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l2_nidents = page_size / l2_esize;
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l1_nidents = l1_nidents / l2_nidents;
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l1_esize = GITS_INDIRECT_L1_ESIZE;
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}
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}
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its_tbl_size = l1_esize * l1_nidents;
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its_tbl_size = roundup2(its_tbl_size, page_size);
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break;
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@ -564,6 +609,11 @@ gicv3_its_table_init(device_t dev, struct gicv3_its_softc *sc)
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sc->sc_its_ptab[i].ptab_vaddr = table;
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sc->sc_its_ptab[i].ptab_l1_size = its_tbl_size;
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sc->sc_its_ptab[i].ptab_l1_nidents = l1_nidents;
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sc->sc_its_ptab[i].ptab_l2_size = page_size;
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sc->sc_its_ptab[i].ptab_l2_nidents = l2_nidents;
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sc->sc_its_ptab[i].ptab_indirect = indirect;
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sc->sc_its_ptab[i].ptab_page_size = page_size;
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paddr = vtophys(table);
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@ -578,6 +628,7 @@ gicv3_its_table_init(device_t dev, struct gicv3_its_softc *sc)
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GITS_BASER_SIZE_MASK);
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/* Set the new values */
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reg |= GITS_BASER_VALID |
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(indirect ? GITS_BASER_INDIRECT : 0) |
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(cache << GITS_BASER_CACHE_SHIFT) |
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(type << GITS_BASER_TYPE_SHIFT) |
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paddr | (share << GITS_BASER_SHARE_SHIFT) |
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@ -618,6 +669,7 @@ gicv3_its_table_init(device_t dev, struct gicv3_its_softc *sc)
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return (ENXIO);
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}
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sc->sc_its_ptab[i].ptab_share = share;
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/* We should have made all needed changes */
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break;
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}
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@ -1218,6 +1270,10 @@ static bool
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its_device_alloc(struct gicv3_its_softc *sc, int devid)
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{
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struct its_ptable *ptable;
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vm_offset_t l2_table;
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uint64_t *table;
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uint32_t index;
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bool shareable;
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/* No device table */
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if (sc->sc_dev_table_idx < 0) {
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@ -1228,7 +1284,39 @@ its_device_alloc(struct gicv3_its_softc *sc, int devid)
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ptable = &sc->sc_its_ptab[sc->sc_dev_table_idx];
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/* Check the devid is within the table limit */
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return (devid < ptable->ptab_l1_nidents);
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if (!ptable->ptab_indirect) {
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return (devid < ptable->ptab_l1_nidents);
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}
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/* Check the devid is within the allocated range */
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index = devid / ptable->ptab_l2_nidents;
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if (index >= ptable->ptab_l1_nidents)
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return (false);
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table = (uint64_t *)ptable->ptab_vaddr;
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/* We have an second level table */
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if ((table[index] & GITS_BASER_VALID) != 0)
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return (true);
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shareable = true;
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if ((ptable->ptab_share & GITS_BASER_SHARE_MASK) == GITS_BASER_SHARE_NS)
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shareable = false;
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l2_table = (vm_offset_t)contigmalloc_domainset(ptable->ptab_l2_size,
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M_GICV3_ITS, sc->sc_ds, M_WAITOK | M_ZERO, 0, (1ul << 48) - 1,
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ptable->ptab_page_size, 0);
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if (!shareable)
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cpu_dcache_wb_range((vm_offset_t)l2_table,
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ptable->ptab_l2_size);
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table[index] = vtophys(l2_table) | GITS_BASER_VALID;
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if (!shareable)
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cpu_dcache_wb_range((vm_offset_t)&table[index],
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sizeof(table[index]));
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dsb(sy);
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return (true);
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}
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static struct its_dev *
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