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Remove legacy versions of USB network interface drivers relying on

Browse source 
IFF_NEEDSGIANT, as that is no longer supported.
This commit is contained in:
Robert Watson 2009-04-17 09:42:26 +00:00
parent 5d8c02c23f
commit 855628aba6
24 changed files with 0 additions and 21963 deletions
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1
sys/conf/files
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@ -1501,7 +1501,6 @@ legacy/dev/usb/ehci.c optional oehci
legacy/dev/usb/ehci_ddb.c optional oehci
legacy/dev/usb/ehci_pci.c optional oehci pci
legacy/dev/usb/hid.c optional ousb
legacy/dev/usb/if_aue.c optional oaue
legacy/dev/usb/ohci.c optional oohci
legacy/dev/usb/ohci_pci.c optional oohci pci
legacy/dev/usb/sl811hs.c optional oslhci

1498
sys/legacy/dev/usb/if_aue.c
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294
sys/legacy/dev/usb/if_auereg.h
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@ -1,294 +0,0 @@
/*-
* Copyright (c) 1997, 1998, 1999
* Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
*
* Copyright (c) 2006
* Alfred Perlstein <alfred@freebsd.org>. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Bill Paul.
* 4. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*
* $FreeBSD$
*/
/*
* Register definitions for ADMtek Pegasus AN986 USB to Ethernet
* chip. The Pegasus uses a total of four USB endpoints: the control
* endpoint (0), a bulk read endpoint for receiving packets (1),
* a bulk write endpoint for sending packets (2) and an interrupt
* endpoint for passing RX and TX status (3). Endpoint 0 is used
* to read and write the ethernet module's registers. All registers
* are 8 bits wide.
*
* Packet transfer is done in 64 byte chunks. The last chunk in a
* transfer is denoted by having a length less that 64 bytes. For
* the RX case, the data includes an optional RX status word.
*/
#ifndef AUEREG_H
#define AUEREG_H
#define AUE_UR_READREG 0xF0
#define AUE_UR_WRITEREG 0xF1
#define AUE_CONFIG_NO 1
#define AUE_IFACE_IDX 0
/*
* Note that while the ADMtek technically has four
* endpoints, the control endpoint (endpoint 0) is
* regarded as special by the USB code and drivers
* don't have direct access to it. (We access it
* using usbd_do_request() when reading/writing
* registers.) Consequently, our endpoint indexes
* don't match those in the ADMtek Pegasus manual:
* we consider the RX data endpoint to be index 0
* and work up from there.
*/
#define AUE_ENDPT_RX 0x0
#define AUE_ENDPT_TX 0x1
#define AUE_ENDPT_INTR 0x2
#define AUE_ENDPT_MAX 0x3
#define AUE_INTR_PKTLEN 0x8
#define AUE_CTL0 0x00
#define AUE_CTL1 0x01
#define AUE_CTL2 0x02
#define AUE_MAR0 0x08
#define AUE_MAR1 0x09
#define AUE_MAR2 0x0A
#define AUE_MAR3 0x0B
#define AUE_MAR4 0x0C
#define AUE_MAR5 0x0D
#define AUE_MAR6 0x0E
#define AUE_MAR7 0x0F
#define AUE_MAR AUE_MAR0
#define AUE_PAR0 0x10
#define AUE_PAR1 0x11
#define AUE_PAR2 0x12
#define AUE_PAR3 0x13
#define AUE_PAR4 0x14
#define AUE_PAR5 0x15
#define AUE_PAR AUE_PAR0
#define AUE_PAUSE0 0x18
#define AUE_PAUSE1 0x19
#define AUE_PAUSE AUE_PAUSE0
#define AUE_RX_FLOWCTL_CNT 0x1A
#define AUE_RX_FLOWCTL_FIFO 0x1B
#define AUE_REG_1D 0x1D
#define AUE_EE_REG 0x20
#define AUE_EE_DATA0 0x21
#define AUE_EE_DATA1 0x22
#define AUE_EE_DATA AUE_EE_DATA0
#define AUE_EE_CTL 0x23
#define AUE_PHY_ADDR 0x25
#define AUE_PHY_DATA0 0x26
#define AUE_PHY_DATA1 0x27
#define AUE_PHY_DATA AUE_PHY_DATA0
#define AUE_PHY_CTL 0x28
#define AUE_USB_STS 0x2A
#define AUE_TXSTAT0 0x2B
#define AUE_TXSTAT1 0x2C
#define AUE_TXSTAT AUE_TXSTAT0
#define AUE_RXSTAT 0x2D
#define AUE_PKTLOST0 0x2E
#define AUE_PKTLOST1 0x2F
#define AUE_PKTLOST AUE_PKTLOST0
#define AUE_REG_7B 0x7B
#define AUE_GPIO0 0x7E
#define AUE_GPIO1 0x7F
#define AUE_REG_81 0x81
#define AUE_CTL0_INCLUDE_RXCRC 0x01
#define AUE_CTL0_ALLMULTI 0x02
#define AUE_CTL0_STOP_BACKOFF 0x04
#define AUE_CTL0_RXSTAT_APPEND 0x08
#define AUE_CTL0_WAKEON_ENB 0x10
#define AUE_CTL0_RXPAUSE_ENB 0x20
#define AUE_CTL0_RX_ENB 0x40
#define AUE_CTL0_TX_ENB 0x80
#define AUE_CTL1_HOMELAN 0x04
#define AUE_CTL1_RESETMAC 0x08
#define AUE_CTL1_SPEEDSEL 0x10 /* 0 = 10mbps, 1 = 100mbps */
#define AUE_CTL1_DUPLEX 0x20 /* 0 = half, 1 = full */
#define AUE_CTL1_DELAYHOME 0x40
#define AUE_CTL2_EP3_CLR 0x01 /* reading EP3 clrs status regs */
#define AUE_CTL2_RX_BADFRAMES 0x02
#define AUE_CTL2_RX_PROMISC 0x04
#define AUE_CTL2_LOOPBACK 0x08
#define AUE_CTL2_EEPROMWR_ENB 0x10
#define AUE_CTL2_EEPROM_LOAD 0x20
#define AUE_EECTL_WRITE 0x01
#define AUE_EECTL_READ 0x02
#define AUE_EECTL_DONE 0x04
#define AUE_PHYCTL_PHYREG 0x1F
#define AUE_PHYCTL_WRITE 0x20
#define AUE_PHYCTL_READ 0x40
#define AUE_PHYCTL_DONE 0x80
#define AUE_USBSTS_SUSPEND 0x01
#define AUE_USBSTS_RESUME 0x02
#define AUE_TXSTAT0_JABTIMO 0x04
#define AUE_TXSTAT0_CARLOSS 0x08
#define AUE_TXSTAT0_NOCARRIER 0x10
#define AUE_TXSTAT0_LATECOLL 0x20
#define AUE_TXSTAT0_EXCESSCOLL 0x40
#define AUE_TXSTAT0_UNDERRUN 0x80
#define AUE_TXSTAT1_PKTCNT 0x0F
#define AUE_TXSTAT1_FIFO_EMPTY 0x40
#define AUE_TXSTAT1_FIFO_FULL 0x80
#define AUE_RXSTAT_OVERRUN 0x01
#define AUE_RXSTAT_PAUSE 0x02
#define AUE_GPIO_IN0 0x01
#define AUE_GPIO_OUT0 0x02
#define AUE_GPIO_SEL0 0x04
#define AUE_GPIO_IN1 0x08
#define AUE_GPIO_OUT1 0x10
#define AUE_GPIO_SEL1 0x20
struct aue_intrpkt {
u_int8_t aue_txstat0;
u_int8_t aue_txstat1;
u_int8_t aue_rxstat;
u_int8_t aue_rxlostpkt0;
u_int8_t aue_rxlostpkt1;
u_int8_t aue_wakeupstat;
u_int8_t aue_rsvd;
};
struct aue_rxpkt {
u_int16_t aue_pktlen;
u_int8_t aue_rxstat;
};
#define AUE_RXSTAT_MCAST 0x01
#define AUE_RXSTAT_GIANT 0x02
#define AUE_RXSTAT_RUNT 0x04
#define AUE_RXSTAT_CRCERR 0x08
#define AUE_RXSTAT_DRIBBLE 0x10
#define AUE_RXSTAT_MASK 0x1E
#define AUE_INC(x, y) (x) = (x + 1) % y
struct aue_softc {
#if defined(__FreeBSD__)
#define GET_MII(sc) (device_get_softc((sc)->aue_miibus))
#elif defined(__NetBSD__)
#define GET_MII(sc) (&(sc)->aue_mii)
#elif defined(__OpenBSD__)
#define GET_MII(sc) (&(sc)->aue_mii)
#endif
struct ifnet *aue_ifp;
device_t aue_dev;
device_t aue_miibus;
usbd_device_handle aue_udev;
usbd_interface_handle aue_iface;
u_int16_t aue_vendor;
u_int16_t aue_product;
int aue_ed[AUE_ENDPT_MAX];
usbd_pipe_handle aue_ep[AUE_ENDPT_MAX];
int aue_unit;
u_int8_t aue_link;
int aue_timer;
int aue_if_flags;
struct ue_cdata aue_cdata;
struct callout aue_tick_callout;
struct usb_taskqueue aue_taskqueue;
struct task aue_task;
struct mtx aue_mtx;
struct sx aue_sx;
u_int16_t aue_flags;
char aue_dying;
struct timeval aue_rx_notice;
struct usb_qdat aue_qdat;
int aue_deferedtasks;
};
#if 0
/*
* Some debug code to make sure we don't take a blocking lock in
* interrupt context.
*/
#include <sys/types.h>
#include <sys/proc.h>
#include <sys/kdb.h>
#define AUE_DUMPSTATE(tag) aue_dumpstate(__func__, tag)
static inline void
aue_dumpstate(const char *func, const char *tag)
{
if ((curthread->td_pflags & TDP_NOSLEEPING) ||
(curthread->td_pflags & TDP_ITHREAD)) {
kdb_backtrace();
printf("%s: %s sleep: %sok ithread: %s\n", func, tag,
curthread->td_pflags & TDP_NOSLEEPING ? "not" : "",
curthread->td_pflags & TDP_ITHREAD ? "yes" : "no");
}
}
#else
#define AUE_DUMPSTATE(tag)
#endif
#define AUE_LOCK(_sc) mtx_lock(&(_sc)->aue_mtx)
#define AUE_UNLOCK(_sc) mtx_unlock(&(_sc)->aue_mtx)
#define AUE_SXLOCK(_sc) \
do { AUE_DUMPSTATE("sxlock"); sx_xlock(&(_sc)->aue_sx); } while(0)
#define AUE_SXUNLOCK(_sc) sx_xunlock(&(_sc)->aue_sx)
#define AUE_SXASSERTLOCKED(_sc) sx_assert(&(_sc)->aue_sx, SX_XLOCKED)
#define AUE_SXASSERTUNLOCKED(_sc) sx_assert(&(_sc)->aue_sx, SX_UNLOCKED)
#define AUE_TIMEOUT 1000
#define AUE_MIN_FRAMELEN 60
#define AUE_INTR_INTERVAL 100 /* ms */
/*
* These bits are used to notify the task about pending events.
* The names correspond to the interrupt context routines that would
* be normally called. (example: AUE_TASK_WATCHDOG -> aue_watchdog())
*/
#define AUE_TASK_WATCHDOG 0x0001
#define AUE_TASK_TICK 0x0002
#define AUE_TASK_START 0x0004
#define AUE_TASK_RXSTART 0x0008
#define AUE_TASK_RXEOF 0x0010
#define AUE_TASK_TXEOF 0x0020
#define AUE_GIANTLOCK() mtx_lock(&Giant);
#define AUE_GIANTUNLOCK() mtx_unlock(&Giant);
#endif /* !AUEREG_H */

1428
sys/legacy/dev/usb/if_axe.c
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254
sys/legacy/dev/usb/if_axereg.h
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@ -1,254 +0,0 @@
/*-
* Copyright (c) 1997, 1998, 1999, 2000-2003
* Bill Paul <wpaul@windriver.com>. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Bill Paul.
* 4. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*
* $FreeBSD$
*/
/*
* Definitions for the ASIX Electronics AX88172 to ethernet controller.
*/
/*
* Vendor specific commands
* ASIX conveniently doesn't document the 'set NODEID' command in their
* datasheet (thanks a lot guys).
* To make handling these commands easier, I added some extra data
* which is decided by the axe_cmd() routine. Commands are encoded
* in 16 bites, with the format: LDCC. L and D are both nibbles in
* the high byte. L represents the data length (0 to 15) and D
* represents the direction (0 for vendor read, 1 for vendor write).
* CC is the command byte, as specified in the manual.
*/
#define AXE_CMD_DIR(x) (((x) & 0x0F00) >> 8)
#define AXE_CMD_LEN(x) (((x) & 0xF000) >> 12)
#define AXE_CMD_CMD(x) ((x) & 0x00FF)
#define AXE_172_CMD_READ_RXTX_SRAM 0x2002
#define AXE_182_CMD_READ_RXTX_SRAM 0x8002
#define AXE_172_CMD_WRITE_RX_SRAM 0x0103
#define AXE_172_CMD_WRITE_TX_SRAM 0x0104
#define AXE_182_CMD_WRITE_RXTX_SRAM 0x8103
#define AXE_CMD_MII_OPMODE_SW 0x0106
#define AXE_CMD_MII_READ_REG 0x2007
#define AXE_CMD_MII_WRITE_REG 0x2108
#define AXE_CMD_MII_READ_OPMODE 0x1009
#define AXE_CMD_MII_OPMODE_HW 0x010A
#define AXE_CMD_SROM_READ 0x200B
#define AXE_CMD_SROM_WRITE 0x010C
#define AXE_CMD_SROM_WR_ENABLE 0x010D
#define AXE_CMD_SROM_WR_DISABLE 0x010E
#define AXE_CMD_RXCTL_READ 0x200F
#define AXE_CMD_RXCTL_WRITE 0x0110
#define AXE_CMD_READ_IPG012 0x3011
#define AXE_172_CMD_WRITE_IPG0 0x0112
#define AXE_172_CMD_WRITE_IPG1 0x0113
#define AXE_172_CMD_WRITE_IPG2 0x0114
#define AXE_178_CMD_WRITE_IPG012 0x0112
#define AXE_CMD_READ_MCAST 0x8015
#define AXE_CMD_WRITE_MCAST 0x8116
#define AXE_172_CMD_READ_NODEID 0x6017
#define AXE_172_CMD_WRITE_NODEID 0x6118
#define AXE_178_CMD_READ_NODEID 0x6013
#define AXE_178_CMD_WRITE_NODEID 0x6114
#define AXE_CMD_READ_PHYID 0x2019
#define AXE_172_CMD_READ_MEDIA 0x101A
#define AXE_178_CMD_READ_MEDIA 0x201A
#define AXE_CMD_WRITE_MEDIA 0x011B
#define AXE_CMD_READ_MONITOR_MODE 0x101C
#define AXE_CMD_WRITE_MONITOR_MODE 0x011D
#define AXE_CMD_READ_GPIO 0x101E
#define AXE_CMD_WRITE_GPIO 0x011F
#define AXE_CMD_SW_RESET_REG 0x0120
#define AXE_CMD_SW_PHY_STATUS 0x0021
#define AXE_CMD_SW_PHY_SELECT 0x0122
#define AXE_SW_RESET_CLEAR 0x00
#define AXE_SW_RESET_RR 0x01
#define AXE_SW_RESET_RT 0x02
#define AXE_SW_RESET_PRTE 0x04
#define AXE_SW_RESET_PRL 0x08
#define AXE_SW_RESET_BZ 0x10
#define AXE_SW_RESET_IPRL 0x20
#define AXE_SW_RESET_IPPD 0x40
/* AX88178 documentation says to always write this bit... */
#define AXE_178_RESET_MAGIC 0x40
#define AXE_178_MEDIA_GMII 0x0001
#define AXE_MEDIA_FULL_DUPLEX 0x0002
#define AXE_172_MEDIA_TX_ABORT_ALLOW 0x0004
/* AX88178/88772 documentation says to always write 1 to bit 2 */
#define AXE_178_MEDIA_MAGIC 0x0004
/* AX88772 documentation says to always write 0 to bit 3 */
#define AXE_178_MEDIA_ENCK 0x0008
#define AXE_172_MEDIA_FLOW_CONTROL_EN 0x0010
#define AXE_178_MEDIA_RXFLOW_CONTROL_EN 0x0010
#define AXE_178_MEDIA_TXFLOW_CONTROL_EN 0x0020
#define AXE_178_MEDIA_JUMBO_EN 0x0040
#define AXE_178_MEDIA_LTPF_ONLY 0x0080
#define AXE_178_MEDIA_RX_EN 0x0100
#define AXE_178_MEDIA_100TX 0x0200
#define AXE_178_MEDIA_SBP 0x0800
#define AXE_178_MEDIA_SUPERMAC 0x1000
#define AXE_RXCMD_PROMISC 0x0001
#define AXE_RXCMD_ALLMULTI 0x0002
#define AXE_172_RXCMD_UNICAST 0x0004
#define AXE_178_RXCMD_KEEP_INVALID_CRC 0x0004
#define AXE_RXCMD_BROADCAST 0x0008
#define AXE_RXCMD_MULTICAST 0x0010
#define AXE_178_RXCMD_AP 0x0020
#define AXE_RXCMD_ENABLE 0x0080
#define AXE_178_RXCMD_MFB_2048 0x0000 /* 2K max frame burst */
#define AXE_178_RXCMD_MFB_4096 0x0100 /* 4K max frame burst */
#define AXE_178_RXCMD_MFB_8192 0x0200 /* 8K max frame burst */
#define AXE_178_RXCMD_MFB_16384 0x0300 /* 16K max frame burst*/
#define AXE_NOPHY 0xE0
#define AXE_INTPHY 0x10
#define AXE_TIMEOUT 1000
#define AXE_172_BUFSZ 1536
#define AXE_178_MIN_BUFSZ 2048
#define AXE_MIN_FRAMELEN 60
#define AXE_RX_FRAMES 1
#define AXE_TX_FRAMES 1
#if AXE_178_MAX_FRAME_BURST == 0
#define AXE_178_RXCMD_MFB AXE_178_RXCMD_MFB_2048
#define AXE_178_MAX_BUFSZ 2048
#elif AXE_178_MAX_FRAME_BURST == 1
#define AXE_178_RXCMD_MFB AXE_178_RXCMD_MFB_4096
#define AXE_178_MAX_BUFSZ 4096
#elif AXE_178_MAX_FRAME_BURST == 2
#define AXE_178_RXCMD_MFB AXE_178_RXCMD_MFB_8192
#define AXE_178_MAX_BUFSZ 8192
#else
#define AXE_178_RXCMD_MFB AXE_178_RXCMD_MFB_16384
#define AXE_178_MAX_BUFSZ 16384
#endif
#define AXE_RX_LIST_CNT 1
#define AXE_TX_LIST_CNT 1
struct axe_chain {
struct axe_softc *axe_sc;
usbd_xfer_handle axe_xfer;
char *axe_buf;
struct mbuf *axe_mbuf;
int axe_accum;
int axe_idx;
};
struct axe_cdata {
struct axe_chain axe_tx_chain[AXE_TX_LIST_CNT];
struct axe_chain axe_rx_chain[AXE_RX_LIST_CNT];
int axe_tx_prod;
int axe_tx_cons;
int axe_tx_cnt;
int axe_rx_prod;
};
#define AXE_CTL_READ 0x01
#define AXE_CTL_WRITE 0x02
#define AXE_CONFIG_NO 1
#define AXE_IFACE_IDX 0
/*
* The interrupt endpoint is currently unused
* by the ASIX part.
*/
#define AXE_ENDPT_RX 0x0
#define AXE_ENDPT_TX 0x1
#define AXE_ENDPT_INTR 0x2
#define AXE_ENDPT_MAX 0x3
struct axe_sframe_hdr {
uint16_t len;
uint16_t ilen;
} __packed;
struct axe_type {
struct usb_devno axe_dev;
uint32_t axe_flags;
#define AX172 0x0000 /* AX88172 */
#define AX178 0x0001 /* AX88178 */
#define AX772 0x0002 /* AX88772 */
};
#define AXE_INC(x, y) (x) = (x + 1) % y
struct axe_softc {
#if defined(__FreeBSD__)
#define GET_MII(sc) (device_get_softc((sc)->axe_miibus))
#elif defined(__NetBSD__)
#define GET_MII(sc) (&(sc)->axe_mii)
#elif defined(__OpenBSD__)
#define GET_MII(sc) (&(sc)->axe_mii)
#endif
struct ifnet *axe_ifp;
device_t axe_miibus;
device_t axe_dev;
usbd_device_handle axe_udev;
usbd_interface_handle axe_iface;
u_int16_t axe_vendor;
u_int16_t axe_product;
u_int16_t axe_flags;
int axe_ed[AXE_ENDPT_MAX];
usbd_pipe_handle axe_ep[AXE_ENDPT_MAX];
int axe_if_flags;
struct axe_cdata axe_cdata;
struct callout_handle axe_stat_ch;
struct mtx axe_mtx;
struct sx axe_sleeplock;
char axe_dying;
int axe_link;
unsigned char axe_ipgs[3];
unsigned char axe_phyaddrs[2];
struct timeval axe_rx_notice;
struct usb_task axe_tick_task;
int axe_bufsz;
int axe_boundary;
};
#if 0
#define AXE_LOCK(_sc) mtx_lock(&(_sc)->axe_mtx)
#define AXE_UNLOCK(_sc) mtx_unlock(&(_sc)->axe_mtx)
#else
#define AXE_LOCK(_sc)
#define AXE_UNLOCK(_sc)
#endif
#define AXE_SLEEPLOCK(_sc) sx_xlock(&(_sc)->axe_sleeplock)
#define AXE_SLEEPUNLOCK(_sc) sx_xunlock(&(_sc)->axe_sleeplock)
#define AXE_SLEEPLOCKASSERT(_sc) sx_assert(&(_sc)->axe_sleeplock, SX_XLOCKED)

771
sys/legacy/dev/usb/if_cdce.c
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@ -1,771 +0,0 @@
/* $NetBSD: if_cdce.c,v 1.4 2004/10/24 12:50:54 augustss Exp $ */
/*
* Copyright (c) 1997, 1998, 1999, 2000-2003 Bill Paul <wpaul@windriver.com>
* Copyright (c) 2003-2005 Craig Boston
* Copyright (c) 2004 Daniel Hartmeier
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Bill Paul.
* 4. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul, THE VOICES IN HIS HEAD OR
* THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* USB Communication Device Class (Ethernet Networking Control Model)
* http://www.usb.org/developers/devclass_docs/usbcdc11.pdf
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/sockio.h>
#include <sys/mbuf.h>
#include <sys/malloc.h>
#include <sys/kernel.h>
#include <sys/module.h>
#include <sys/socket.h>
#include <sys/endian.h>
#include <net/if.h>
#include <net/if_arp.h>
#include <net/ethernet.h>
#include <net/if_types.h>
#include <net/if_media.h>
#include <net/bpf.h>
#include <sys/bus.h>
#include <machine/bus.h>
#include <dev/usb/usb.h>
#include <dev/usb/usbdi.h>
#include <dev/usb/usbdi_util.h>
#include <dev/usb/usbdivar.h>
#include <dev/usb/usb_ethersubr.h>
#include <dev/usb/usbcdc.h>
#include "usbdevs.h"
#include <dev/usb/if_cdcereg.h>
static device_probe_t cdce_match;
static device_attach_t cdce_attach;
static device_detach_t cdce_detach;
static device_shutdown_t cdce_shutdown;
static device_method_t cdce_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, cdce_match),
DEVMETHOD(device_attach, cdce_attach),
DEVMETHOD(device_detach, cdce_detach),
DEVMETHOD(device_shutdown, cdce_shutdown),
{ 0, 0 }
};
static driver_t cdce_driver = {
"cdce",
cdce_methods,
sizeof(struct cdce_softc)
};
static devclass_t cdce_devclass;
DRIVER_MODULE(cdce, uhub, cdce_driver, cdce_devclass, usbd_driver_load, 0);
MODULE_VERSION(cdce, 0);
MODULE_DEPEND(cdce, usb, 1, 1, 1);
static int cdce_encap(struct cdce_softc *, struct mbuf *, int);
static void cdce_rxeof(usbd_xfer_handle, usbd_private_handle, usbd_status);
static void cdce_txeof(usbd_xfer_handle, usbd_private_handle, usbd_status);
static void cdce_start(struct ifnet *);
static int cdce_ioctl(struct ifnet *, u_long, caddr_t);
static void cdce_init(void *);
static void cdce_reset(struct cdce_softc *);
static void cdce_stop(struct cdce_softc *);
static void cdce_rxstart(struct ifnet *);
static int cdce_ifmedia_upd(struct ifnet *ifp);
static void cdce_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr);
static const struct cdce_type cdce_devs[] = {
{{ USB_VENDOR_ACERLABS, USB_PRODUCT_ACERLABS_M5632 }, CDCE_NO_UNION },
{{ USB_VENDOR_AMBIT, USB_PRODUCT_AMBIT_NTL_250 }, CDCE_NO_UNION },
{{ USB_VENDOR_COMPAQ, USB_PRODUCT_COMPAQ_IPAQLINUX }, CDCE_NO_UNION },
{{ USB_VENDOR_GMATE, USB_PRODUCT_GMATE_YP3X00 }, CDCE_NO_UNION },
{{ USB_VENDOR_MOTOROLA2, USB_PRODUCT_MOTOROLA2_USBLAN }, CDCE_ZAURUS | CDCE_NO_UNION },
{{ USB_VENDOR_MOTOROLA2, USB_PRODUCT_MOTOROLA2_USBLAN2 }, CDCE_ZAURUS | CDCE_NO_UNION },
{{ USB_VENDOR_NETCHIP, USB_PRODUCT_NETCHIP_ETHERNETGADGET }, CDCE_NO_UNION },
{{ USB_VENDOR_PROLIFIC, USB_PRODUCT_PROLIFIC_PL2501 }, CDCE_NO_UNION },
{{ USB_VENDOR_SHARP, USB_PRODUCT_SHARP_SL5500 }, CDCE_ZAURUS },
{{ USB_VENDOR_SHARP, USB_PRODUCT_SHARP_SL5600 }, CDCE_ZAURUS | CDCE_NO_UNION },
{{ USB_VENDOR_SHARP, USB_PRODUCT_SHARP_SLA300 }, CDCE_ZAURUS | CDCE_NO_UNION },
{{ USB_VENDOR_SHARP, USB_PRODUCT_SHARP_SLC700 }, CDCE_ZAURUS | CDCE_NO_UNION },
{{ USB_VENDOR_SHARP, USB_PRODUCT_SHARP_SLC750 }, CDCE_ZAURUS | CDCE_NO_UNION },
};
#define cdce_lookup(v, p) ((const struct cdce_type *)usb_lookup(cdce_devs, v, p))
static int
cdce_match(device_t self)
{
struct usb_attach_arg *uaa = device_get_ivars(self);
usb_interface_descriptor_t *id;
if (uaa->iface == NULL)
return (UMATCH_NONE);
id = usbd_get_interface_descriptor(uaa->iface);
if (id == NULL)
return (UMATCH_NONE);
if (cdce_lookup(uaa->vendor, uaa->product) != NULL)
return (UMATCH_VENDOR_PRODUCT);
if (id->bInterfaceClass == UICLASS_CDC && id->bInterfaceSubClass ==
UISUBCLASS_ETHERNET_NETWORKING_CONTROL_MODEL)
return (UMATCH_IFACECLASS_GENERIC);
return (UMATCH_NONE);
}
static int
cdce_attach(device_t self)
{
struct cdce_softc *sc = device_get_softc(self);
struct usb_attach_arg *uaa = device_get_ivars(self);
struct ifnet *ifp;
usbd_device_handle dev = uaa->device;
const struct cdce_type *t;
usb_interface_descriptor_t *id;
usb_endpoint_descriptor_t *ed;
const usb_cdc_union_descriptor_t *ud;
usb_config_descriptor_t *cd;
int data_ifcno;
int i, j, numalts;
u_char eaddr[ETHER_ADDR_LEN];
const usb_cdc_ethernet_descriptor_t *ue;
char eaddr_str[USB_MAX_STRING_LEN];
sc->cdce_dev = self;
sc->cdce_udev = uaa->device;
t = cdce_lookup(uaa->vendor, uaa->product);
if (t)
sc->cdce_flags = t->cdce_flags;
if (sc->cdce_flags & CDCE_NO_UNION)
sc->cdce_data_iface = uaa->iface;
else {
ud = (const usb_cdc_union_descriptor_t *)usb_find_desc(sc->cdce_udev,
UDESC_CS_INTERFACE, UDESCSUB_CDC_UNION);
if (ud == NULL) {
device_printf(sc->cdce_dev, "no union descriptor\n");
return ENXIO;
}
data_ifcno = ud->bSlaveInterface[0];
for (i = 0; i < uaa->nifaces; i++) {
if (uaa->ifaces[i] != NULL) {
id = usbd_get_interface_descriptor(
uaa->ifaces[i]);
if (id != NULL && id->bInterfaceNumber ==
data_ifcno) {
sc->cdce_data_iface = uaa->ifaces[i];
uaa->ifaces[i] = NULL;
}
}
}
}
if (sc->cdce_data_iface == NULL) {
device_printf(sc->cdce_dev, "no data interface\n");
return ENXIO;
}
/*
* <quote>
* The Data Class interface of a networking device shall have a minimum
* of two interface settings. The first setting (the default interface
* setting) includes no endpoints and therefore no networking traffic is
* exchanged whenever the default interface setting is selected. One or
* more additional interface settings are used for normal operation, and
* therefore each includes a pair of endpoints (one IN, and one OUT) to
* exchange network traffic. Select an alternate interface setting to
* initialize the network aspects of the device and to enable the
* exchange of network traffic.
* </quote>
*
* Some devices, most notably cable modems, include interface settings
* that have no IN or OUT endpoint, therefore loop through the list of all
* available interface settings looking for one with both IN and OUT
* endpoints.
*/
id = usbd_get_interface_descriptor(sc->cdce_data_iface);
cd = usbd_get_config_descriptor(sc->cdce_udev);
numalts = usbd_get_no_alts(cd, id->bInterfaceNumber);
for (j = 0; j < numalts; j++) {
if (usbd_set_interface(sc->cdce_data_iface, j)) {
device_printf(sc->cdce_dev,
"setting alternate interface failed\n");
return ENXIO;
}
/* Find endpoints. */
id = usbd_get_interface_descriptor(sc->cdce_data_iface);
sc->cdce_bulkin_no = sc->cdce_bulkout_no = -1;
for (i = 0; i < id->bNumEndpoints; i++) {
ed = usbd_interface2endpoint_descriptor(sc->cdce_data_iface, i);
if (!ed) {
device_printf(sc->cdce_dev,
"could not read endpoint descriptor\n");
return ENXIO;
}
if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
sc->cdce_bulkin_no = ed->bEndpointAddress;
} else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
sc->cdce_bulkout_no = ed->bEndpointAddress;
} else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) {
/* XXX: CDC spec defines an interrupt pipe, but it is not
* needed for simple host-to-host applications. */
} else {
device_printf(sc->cdce_dev,
"unexpected endpoint\n");
}
}
/* If we found something, try and use it... */
if ((sc->cdce_bulkin_no != -1) && (sc->cdce_bulkout_no != -1))
break;
}
if (sc->cdce_bulkin_no == -1) {
device_printf(sc->cdce_dev, "could not find data bulk in\n");
return ENXIO;
}
if (sc->cdce_bulkout_no == -1 ) {
device_printf(sc->cdce_dev, "could not find data bulk out\n");
return ENXIO;
}
mtx_init(&sc->cdce_mtx, device_get_nameunit(sc->cdce_dev), MTX_NETWORK_LOCK,
MTX_DEF | MTX_RECURSE);
ifmedia_init(&sc->cdce_ifmedia, 0, cdce_ifmedia_upd, cdce_ifmedia_sts);
CDCE_LOCK(sc);
ue = (const usb_cdc_ethernet_descriptor_t *)usb_find_desc(dev,
UDESC_INTERFACE, UDESCSUB_CDC_ENF);
if (!ue || usbd_get_string(dev, ue->iMacAddress, eaddr_str,
sizeof(eaddr_str))) {
/* Fake MAC address */
device_printf(sc->cdce_dev, "faking MAC address\n");
eaddr[0]= 0x2a;
memcpy(&eaddr[1], &ticks, sizeof(u_int32_t));
eaddr[5] = (u_int8_t)device_get_unit(sc->cdce_dev);
} else {
int i;
memset(eaddr, 0, ETHER_ADDR_LEN);
for (i = 0; i < ETHER_ADDR_LEN * 2; i++) {
int c = eaddr_str[i];
if ('0' <= c && c <= '9')
c -= '0';
else
c -= 'A' - 10;
c &= 0xf;
if (c % 2 == 0)
c <<= 4;
eaddr[i / 2] |= c;
}
}
ifp = GET_IFP(sc) = if_alloc(IFT_ETHER);
if (ifp == NULL) {
device_printf(sc->cdce_dev, "can not if_alloc()\n");
CDCE_UNLOCK(sc);
mtx_destroy(&sc->cdce_mtx);
return ENXIO;
}
ifp->if_softc = sc;
if_initname(ifp, "cdce", device_get_unit(sc->cdce_dev));
ifp->if_mtu = ETHERMTU;
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST |
IFF_NEEDSGIANT;
ifp->if_ioctl = cdce_ioctl;
ifp->if_output = ether_output;
ifp->if_start = cdce_start;
ifp->if_init = cdce_init;
ifp->if_baudrate = 11000000;
ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
sc->q.ifp = ifp;
sc->q.if_rxstart = cdce_rxstart;
/* No IFM type for 11Mbps USB, so go with 10baseT */
ifmedia_add(&sc->cdce_ifmedia, IFM_ETHER | IFM_10_T, 0, 0);
ifmedia_set(&sc->cdce_ifmedia, IFM_ETHER | IFM_10_T);
ether_ifattach(ifp, eaddr);
usb_register_netisr();
CDCE_UNLOCK(sc);
usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->cdce_udev,
sc->cdce_dev);
return 0;
}
static int
cdce_detach(device_t self)
{
struct cdce_softc *sc = device_get_softc(self);
struct ifnet *ifp;
CDCE_LOCK(sc);
sc->cdce_dying = 1;
ifp = GET_IFP(sc);
if (ifp->if_drv_flags & IFF_DRV_RUNNING)
cdce_shutdown(sc->cdce_dev);
ether_ifdetach(ifp);
if_free(ifp);
ifmedia_removeall(&sc->cdce_ifmedia);
CDCE_UNLOCK(sc);
mtx_destroy(&sc->cdce_mtx);
usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->cdce_udev,
sc->cdce_dev);
return (0);
}
static void
cdce_start(struct ifnet *ifp)
{
struct cdce_softc *sc;
struct mbuf *m_head = NULL;
sc = ifp->if_softc;
CDCE_LOCK(sc);
if (sc->cdce_dying ||
ifp->if_drv_flags & IFF_DRV_OACTIVE ||
!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
CDCE_UNLOCK(sc);
return;
}
IF_DEQUEUE(&ifp->if_snd, m_head);
if (m_head == NULL) {
CDCE_UNLOCK(sc);
return;
}
if (cdce_encap(sc, m_head, 0)) {
IF_PREPEND(&ifp->if_snd, m_head);
ifp->if_drv_flags |= IFF_DRV_OACTIVE;
CDCE_UNLOCK(sc);
return;
}
BPF_MTAP(ifp, m_head);
ifp->if_drv_flags |= IFF_DRV_OACTIVE;
CDCE_UNLOCK(sc);
return;
}
static int
cdce_encap(struct cdce_softc *sc, struct mbuf *m, int idx)
{
struct ue_chain *c;
usbd_status err;
int extra = 0;
c = &sc->cdce_cdata.ue_tx_chain[idx];
m_copydata(m, 0, m->m_pkthdr.len, c->ue_buf);
if (sc->cdce_flags & CDCE_ZAURUS) {
/* Zaurus wants a 32-bit CRC appended to every frame */
u_int32_t crc;
crc = htole32(crc32(c->ue_buf, m->m_pkthdr.len));
bcopy(&crc, c->ue_buf + m->m_pkthdr.len, 4);
extra = 4;
}
c->ue_mbuf = m;
usbd_setup_xfer(c->ue_xfer, sc->cdce_bulkout_pipe, c, c->ue_buf,
m->m_pkthdr.len + extra, 0, 10000, cdce_txeof);
err = usbd_transfer(c->ue_xfer);
if (err != USBD_IN_PROGRESS) {
cdce_stop(sc);
return (EIO);
}
sc->cdce_cdata.ue_tx_cnt++;
return (0);
}
static void
cdce_stop(struct cdce_softc *sc)
{
usbd_status err;
struct ifnet *ifp;
CDCE_LOCK(sc);
cdce_reset(sc);
ifp = GET_IFP(sc);
ifp->if_timer = 0;
if (sc->cdce_bulkin_pipe != NULL) {
err = usbd_abort_pipe(sc->cdce_bulkin_pipe);
if (err)
device_printf(sc->cdce_dev,
"abort rx pipe failed: %s\n", usbd_errstr(err));
err = usbd_close_pipe(sc->cdce_bulkin_pipe);
if (err)
device_printf(sc->cdce_dev,
"close rx pipe failed: %s\n", usbd_errstr(err));
sc->cdce_bulkin_pipe = NULL;
}
if (sc->cdce_bulkout_pipe != NULL) {
err = usbd_abort_pipe(sc->cdce_bulkout_pipe);
if (err)
device_printf(sc->cdce_dev,
"abort tx pipe failed: %s\n", usbd_errstr(err));
err = usbd_close_pipe(sc->cdce_bulkout_pipe);
if (err)
device_printf(sc->cdce_dev,
"close tx pipe failed: %s\n", usbd_errstr(err));
sc->cdce_bulkout_pipe = NULL;
}
usb_ether_rx_list_free(&sc->cdce_cdata);
usb_ether_tx_list_free(&sc->cdce_cdata);
ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
CDCE_UNLOCK(sc);
return;
}
static int
cdce_shutdown(device_t dev)
{
struct cdce_softc *sc;
sc = device_get_softc(dev);
cdce_stop(sc);
return (0);
}
static int
cdce_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
{
struct cdce_softc *sc = ifp->if_softc;
struct ifreq *ifr = (struct ifreq *)data;
int error = 0;
if (sc->cdce_dying)
return (ENXIO);
switch(command) {
case SIOCSIFFLAGS:
if (ifp->if_flags & IFF_UP) {
if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
cdce_init(sc);
} else {
if (ifp->if_drv_flags & IFF_DRV_RUNNING)
cdce_stop(sc);
}
error = 0;
break;
case SIOCSIFMEDIA:
case SIOCGIFMEDIA:
error = ifmedia_ioctl(ifp, ifr, &sc->cdce_ifmedia, command);
break;
default:
error = ether_ioctl(ifp, command, data);
break;
}
return (error);
}
static void
cdce_reset(struct cdce_softc *sc)
{
/* XXX Maybe reset the bulk pipes here? */
return;
}
static void
cdce_init(void *xsc)
{
struct cdce_softc *sc = xsc;
struct ifnet *ifp = GET_IFP(sc);
struct ue_chain *c;
usbd_status err;
int i;
if (ifp->if_drv_flags & IFF_DRV_RUNNING)
return;
CDCE_LOCK(sc);
cdce_reset(sc);
if (usb_ether_tx_list_init(sc, &sc->cdce_cdata,
sc->cdce_udev) == ENOBUFS) {
device_printf(sc->cdce_dev, "tx list init failed\n");
CDCE_UNLOCK(sc);
return;
}
if (usb_ether_rx_list_init(sc, &sc->cdce_cdata,
sc->cdce_udev) == ENOBUFS) {
device_printf(sc->cdce_dev, "rx list init failed\n");
CDCE_UNLOCK(sc);
return;
}
/* Maybe set multicast / broadcast here??? */
err = usbd_open_pipe(sc->cdce_data_iface, sc->cdce_bulkin_no,
USBD_EXCLUSIVE_USE, &sc->cdce_bulkin_pipe);
if (err) {
device_printf(sc->cdce_dev, "open rx pipe failed: %s\n",
usbd_errstr(err));
CDCE_UNLOCK(sc);
return;
}
err = usbd_open_pipe(sc->cdce_data_iface, sc->cdce_bulkout_no,
USBD_EXCLUSIVE_USE, &sc->cdce_bulkout_pipe);
if (err) {
device_printf(sc->cdce_dev, "open tx pipe failed: %s\n",
usbd_errstr(err));
CDCE_UNLOCK(sc);
return;
}
for (i = 0; i < UE_RX_LIST_CNT; i++) {
c = &sc->cdce_cdata.ue_rx_chain[i];
usbd_setup_xfer(c->ue_xfer, sc->cdce_bulkin_pipe, c,
mtod(c->ue_mbuf, char *), UE_BUFSZ, USBD_SHORT_XFER_OK,
USBD_NO_TIMEOUT, cdce_rxeof);
usbd_transfer(c->ue_xfer);
}
ifp->if_drv_flags |= IFF_DRV_RUNNING;
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
CDCE_UNLOCK(sc);
return;
}
static void
cdce_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status)
{
struct ue_chain *c = priv;
struct cdce_softc *sc = c->ue_sc;
struct ifnet *ifp;
struct mbuf *m;
int total_len = 0;
CDCE_LOCK(sc);
ifp = GET_IFP(sc);
if (sc->cdce_dying || !(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
CDCE_UNLOCK(sc);
return;
}
if (status != USBD_NORMAL_COMPLETION) {
if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) {
CDCE_UNLOCK(sc);
return;
}
if (sc->cdce_rxeof_errors == 0)
device_printf(sc->cdce_dev, "usb error on rx: %s\n",
usbd_errstr(status));
if (status == USBD_STALLED)
usbd_clear_endpoint_stall_async(sc->cdce_bulkin_pipe);
DELAY(sc->cdce_rxeof_errors * 10000);
sc->cdce_rxeof_errors++;
goto done;
}
sc->cdce_rxeof_errors = 0;
usbd_get_xfer_status(xfer, NULL, NULL, &total_len, NULL);
if (sc->cdce_flags & CDCE_ZAURUS)
total_len -= 4; /* Strip off CRC added by Zaurus */
m = c->ue_mbuf;
if (total_len < sizeof(struct ether_header)) {
ifp->if_ierrors++;
goto done;
}
ifp->if_ipackets++;
m->m_pkthdr.rcvif = (struct ifnet *)&sc->q;
m->m_pkthdr.len = m->m_len = total_len;
/* Put the packet on the special USB input queue. */
usb_ether_input(m);
CDCE_UNLOCK(sc);
return;
done:
/* Setup new transfer. */
usbd_setup_xfer(c->ue_xfer, sc->cdce_bulkin_pipe, c,
mtod(c->ue_mbuf, char *),
UE_BUFSZ, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT,
cdce_rxeof);
usbd_transfer(c->ue_xfer);
CDCE_UNLOCK(sc);
return;
}
static void
cdce_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status)
{
struct ue_chain *c = priv;
struct cdce_softc *sc = c->ue_sc;
struct ifnet *ifp;
usbd_status err;
CDCE_LOCK(sc);
ifp = GET_IFP(sc);
if (sc->cdce_dying ||
!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
CDCE_UNLOCK(sc);
return;
}
if (status != USBD_NORMAL_COMPLETION) {
if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) {
CDCE_UNLOCK(sc);
return;
}
ifp->if_oerrors++;
device_printf(sc->cdce_dev, "usb error on tx: %s\n",
usbd_errstr(status));
if (status == USBD_STALLED)
usbd_clear_endpoint_stall_async(sc->cdce_bulkout_pipe);
CDCE_UNLOCK(sc);
return;
}
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
usbd_get_xfer_status(c->ue_xfer, NULL, NULL, NULL, &err);
if (c->ue_mbuf != NULL) {
c->ue_mbuf->m_pkthdr.rcvif = ifp;
usb_tx_done(c->ue_mbuf);
c->ue_mbuf = NULL;
}
if (err)
ifp->if_oerrors++;
else
ifp->if_opackets++;
CDCE_UNLOCK(sc);
return;
}
static void
cdce_rxstart(struct ifnet *ifp)
{
struct cdce_softc *sc;
struct ue_chain *c;
sc = ifp->if_softc;
CDCE_LOCK(sc);
if (sc->cdce_dying || !(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
CDCE_UNLOCK(sc);
return;
}
c = &sc->cdce_cdata.ue_rx_chain[sc->cdce_cdata.ue_rx_prod];
c->ue_mbuf = usb_ether_newbuf();
if (c->ue_mbuf == NULL) {
device_printf(sc->cdce_dev, "no memory for rx list "
"-- packet dropped!\n");
ifp->if_ierrors++;
CDCE_UNLOCK(sc);
return;
}
usbd_setup_xfer(c->ue_xfer, sc->cdce_bulkin_pipe, c,
mtod(c->ue_mbuf, char *), UE_BUFSZ, USBD_SHORT_XFER_OK,
USBD_NO_TIMEOUT, cdce_rxeof);
usbd_transfer(c->ue_xfer);
CDCE_UNLOCK(sc);
return;
}
static int
cdce_ifmedia_upd(struct ifnet *ifp)
{
/* no-op, cdce has only 1 possible media type */
return 0;
}
static void
cdce_ifmedia_sts(struct ifnet * const ifp, struct ifmediareq *req)
{
req->ifm_status = IFM_AVALID | IFM_ACTIVE;
req->ifm_active = IFM_ETHER | IFM_10_T;
}

79
sys/legacy/dev/usb/if_cdcereg.h
View file

@ -1,79 +0,0 @@
/*
* Copyright (c) 2003-2005 Craig Boston
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Bill Paul.
* 4. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul, THE VOICES IN HIS HEAD OR
* THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef _USB_IF_CDCEREG_H_
#define _USB_IF_CDCEREG_H_
struct cdce_type {
struct usb_devno cdce_dev;
u_int16_t cdce_flags;
#define CDCE_ZAURUS 1
#define CDCE_NO_UNION 2
};
struct cdce_softc {
struct ifnet *cdce_ifp;
#define GET_IFP(sc) ((sc)->cdce_ifp)
struct ifmedia cdce_ifmedia;
usbd_device_handle cdce_udev;
usbd_interface_handle cdce_data_iface;
int cdce_bulkin_no;
usbd_pipe_handle cdce_bulkin_pipe;
int cdce_bulkout_no;
usbd_pipe_handle cdce_bulkout_pipe;
char cdce_dying;
device_t cdce_dev;
struct ue_cdata cdce_cdata;
struct timeval cdce_rx_notice;
int cdce_rxeof_errors;
u_int16_t cdce_flags;
struct mtx cdce_mtx;
struct usb_qdat q;
};
/* We are still under Giant */
#if 0
#define CDCE_LOCK(_sc) mtx_lock(&(_sc)->cdce_mtx)
#define CDCE_UNLOCK(_sc) mtx_unlock(&(_sc)->cdce_mtx)
#else
#define CDCE_LOCK(_sc)
#define CDCE_UNLOCK(_sc)
#endif
#endif /* _USB_IF_CDCEREG_H_ */

1074
sys/legacy/dev/usb/if_cue.c
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168
sys/legacy/dev/usb/if_cuereg.h
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/*-
* Copyright (c) 1997, 1998, 1999, 2000
* Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Bill Paul.
* 4. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*
* $FreeBSD$
*/
/*
* Definitions for the CATC Netmate II USB to ethernet controller.
*/
/*
* Vendor specific control commands.
*/
#define CUE_CMD_RESET 0xF4
#define CUE_CMD_GET_MACADDR 0xF2
#define CUE_CMD_WRITEREG 0xFA
#define CUE_CMD_READREG 0xFB
#define CUE_CMD_READSRAM 0xF1
#define CUE_CMD_WRITESRAM 0xFC
/*
* Internal registers
*/
#define CUE_TX_BUFCNT 0x20
#define CUE_RX_BUFCNT 0x21
#define CUE_ADVANCED_OPMODES 0x22
#define CUE_TX_BUFPKTS 0x23
#define CUE_RX_BUFPKTS 0x24
#define CUE_RX_MAXCHAIN 0x25
#define CUE_ETHCTL 0x60
#define CUE_ETHSTS 0x61
#define CUE_PAR5 0x62
#define CUE_PAR4 0x63
#define CUE_PAR3 0x64
#define CUE_PAR2 0x65
#define CUE_PAR1 0x66
#define CUE_PAR0 0x67
/* Error counters, all 16 bits wide. */
#define CUE_TX_SINGLECOLL 0x69
#define CUE_TX_MULTICOLL 0x6B
#define CUE_TX_EXCESSCOLL 0x6D
#define CUE_RX_FRAMEERR 0x6F
#define CUE_LEDCTL 0x81
/* Advenced operating mode register */
#define CUE_AOP_SRAMWAITS 0x03
#define CUE_AOP_EMBED_RXLEN 0x08
#define CUE_AOP_RXCOMBINE 0x10
#define CUE_AOP_TXCOMBINE 0x20
#define CUE_AOP_EVEN_PKT_READS 0x40
#define CUE_AOP_LOOPBK 0x80
/* Ethernet control register */
#define CUE_ETHCTL_RX_ON 0x01
#define CUE_ETHCTL_LINK_POLARITY 0x02
#define CUE_ETHCTL_LINK_FORCE_OK 0x04
#define CUE_ETHCTL_MCAST_ON 0x08
#define CUE_ETHCTL_PROMISC 0x10
/* Ethernet status register */
#define CUE_ETHSTS_NO_CARRIER 0x01
#define CUE_ETHSTS_LATECOLL 0x02
#define CUE_ETHSTS_EXCESSCOLL 0x04
#define CUE_ETHSTS_TXBUF_AVAIL 0x08
#define CUE_ETHSTS_BAD_POLARITY 0x10
#define CUE_ETHSTS_LINK_OK 0x20
/* LED control register */
#define CUE_LEDCTL_BLINK_1X 0x00
#define CUE_LEDCTL_BLINK_2X 0x01
#define CUE_LEDCTL_BLINK_QUARTER_ON 0x02
#define CUE_LEDCTL_BLINK_QUARTER_OFF 0x03
#define CUE_LEDCTL_OFF 0x04
#define CUE_LEDCTL_FOLLOW_LINK 0x08
/*
* Address in ASIC's internal SRAM where the
* multicast hash table lives. The table is 64 bytes long,
* giving us a 512-bit table. We have to set the bit that
* corresponds to the broadcast address in order to enable
* reception of broadcast frames.
*/
#define CUE_MCAST_TABLE_ADDR 0xFA80
#define CUE_MCAST_TABLE_LEN 64
#define CUE_TIMEOUT 1000
#define CUE_MIN_FRAMELEN 60
#define CUE_RX_FRAMES 1
#define CUE_TX_FRAMES 1
#define CUE_CTL_READ 0x01
#define CUE_CTL_WRITE 0x02
#define CUE_CONFIG_NO 1
/*
* The interrupt endpoint is currently unused
* by the KLSI part.
*/
#define CUE_ENDPT_RX 0x0
#define CUE_ENDPT_TX 0x1
#define CUE_ENDPT_INTR 0x2
#define CUE_ENDPT_MAX 0x3
struct cue_type {
u_int16_t cue_vid;
u_int16_t cue_did;
};
#define CUE_INC(x, y) (x) = (x + 1) % y
struct cue_softc {
struct ifnet *cue_ifp;
device_t cue_dev;
usbd_device_handle cue_udev;
usbd_interface_handle cue_iface;
int cue_ed[CUE_ENDPT_MAX];
usbd_pipe_handle cue_ep[CUE_ENDPT_MAX];
u_int8_t cue_mctab[CUE_MCAST_TABLE_LEN];
int cue_if_flags;
u_int16_t cue_rxfilt;
struct ue_cdata cue_cdata;
struct callout_handle cue_stat_ch;
struct mtx cue_mtx;
char cue_dying;
struct timeval cue_rx_notice;
struct usb_qdat cue_qdat;
};
#if 0
#define CUE_LOCK(_sc) mtx_lock(&(_sc)->cue_mtx)
#define CUE_UNLOCK(_sc) mtx_unlock(&(_sc)->cue_mtx)
#else
#define CUE_LOCK(_sc)
#define CUE_UNLOCK(_sc)
#endif

1024
sys/legacy/dev/usb/if_kue.c
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161
sys/legacy/dev/usb/if_kuereg.h
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/*-
* Copyright (c) 1997, 1998, 1999, 2000
* Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Bill Paul.
* 4. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*
* $FreeBSD$
*/
/*
* Definitions for the KLSI KL5KUSB101B USB to ethernet controller.
* The KLSI part is controlled via vendor control requests, the structure
* of which depend a bit on the firmware running on the internal
* microcontroller. The one exception is the 'send scan data' command,
* which is used to load the firmware.
*/
#define KUE_CMD_GET_ETHER_DESCRIPTOR 0x00
#define KUE_CMD_SET_MCAST_FILTERS 0x01
#define KUE_CMD_SET_PKT_FILTER 0x02
#define KUE_CMD_GET_ETHERSTATS 0x03
#define KUE_CMD_GET_GPIO 0x04
#define KUE_CMD_SET_GPIO 0x05
#define KUE_CMD_SET_MAC 0x06
#define KUE_CMD_GET_MAC 0x07
#define KUE_CMD_SET_URB_SIZE 0x08
#define KUE_CMD_SET_SOFS 0x09
#define KUE_CMD_SET_EVEN_PKTS 0x0A
#define KUE_CMD_SEND_SCAN 0xFF
struct kue_ether_desc {
u_int8_t kue_len;
u_int8_t kue_rsvd0;
u_int8_t kue_rsvd1;
u_int8_t kue_macaddr[ETHER_ADDR_LEN];
u_int8_t kue_etherstats[4];
u_int8_t kue_maxseg[2];
u_int8_t kue_mcastfilt[2];
u_int8_t kue_rsvd2;
};
#define KUE_ETHERSTATS(x) \
(*(u_int32_t *)&(x)->kue_desc.kue_etherstats)
#define KUE_MAXSEG(x) \
(*(u_int16_t *)&(x)->kue_desc.kue_maxseg)
#define KUE_MCFILTCNT(x) \
((*(u_int16_t *)&(x)->kue_desc.kue_mcastfilt) & 0x7FFF)
#define KUE_MCFILT(x, y) \
(char *)&(sc->kue_mcfilters[y * ETHER_ADDR_LEN])
#define KUE_STAT_TX_OK 0x00000001
#define KUE_STAT_RX_OK 0x00000002
#define KUE_STAT_TX_ERR 0x00000004
#define KUE_STAT_RX_ERR 0x00000008
#define KUE_STAT_RX_NOBUF 0x00000010
#define KUE_STAT_TX_UCAST_BYTES 0x00000020
#define KUE_STAT_TX_UCAST_FRAMES 0x00000040
#define KUE_STAT_TX_MCAST_BYTES 0x00000080
#define KUE_STAT_TX_MCAST_FRAMES 0x00000100
#define KUE_STAT_TX_BCAST_BYTES 0x00000200
#define KUE_STAT_TX_BCAST_FRAMES 0x00000400
#define KUE_STAT_RX_UCAST_BYTES 0x00000800
#define KUE_STAT_RX_UCAST_FRAMES 0x00001000
#define KUE_STAT_RX_MCAST_BYTES 0x00002000
#define KUE_STAT_RX_MCAST_FRAMES 0x00004000
#define KUE_STAT_RX_BCAST_BYTES 0x00008000
#define KUE_STAT_RX_BCAST_FRAMES 0x00010000
#define KUE_STAT_RX_CRCERR 0x00020000
#define KUE_STAT_TX_QUEUE_LENGTH 0x00040000
#define KUE_STAT_RX_ALIGNERR 0x00080000
#define KUE_STAT_TX_SINGLECOLL 0x00100000
#define KUE_STAT_TX_MULTICOLL 0x00200000
#define KUE_STAT_TX_DEFERRED 0x00400000
#define KUE_STAT_TX_MAXCOLLS 0x00800000
#define KUE_STAT_RX_OVERRUN 0x01000000
#define KUE_STAT_TX_UNDERRUN 0x02000000
#define KUE_STAT_TX_SQE_ERR 0x04000000
#define KUE_STAT_TX_CARRLOSS 0x08000000
#define KUE_STAT_RX_LATECOLL 0x10000000
#define KUE_RXFILT_PROMISC 0x0001
#define KUE_RXFILT_ALLMULTI 0x0002
#define KUE_RXFILT_UNICAST 0x0004
#define KUE_RXFILT_BROADCAST 0x0008
#define KUE_RXFILT_MULTICAST 0x0010
#define KUE_TIMEOUT 1000
#define KUE_MIN_FRAMELEN 60
#define KUE_CTL_READ 0x01
#define KUE_CTL_WRITE 0x02
#define KUE_CONFIG_NO 1
#define KUE_IFACE_IDX 0
/*
* The interrupt endpoint is currently unused
* by the KLSI part.
*/
#define KUE_ENDPT_RX 0x0
#define KUE_ENDPT_TX 0x1
#define KUE_ENDPT_INTR 0x2
#define KUE_ENDPT_MAX 0x3
struct kue_type {
u_int16_t kue_vid;
u_int16_t kue_did;
};
#define KUE_INC(x, y) (x) = (x + 1) % y
struct kue_softc {
struct ifnet *kue_ifp;
device_t kue_dev;
usbd_device_handle kue_udev;
usbd_interface_handle kue_iface;
struct kue_ether_desc kue_desc;
int kue_ed[KUE_ENDPT_MAX];
usbd_pipe_handle kue_ep[KUE_ENDPT_MAX];
int kue_if_flags;
u_int16_t kue_rxfilt;
u_int8_t *kue_mcfilters;
struct ue_cdata kue_cdata;
struct mtx kue_mtx;
char kue_dying;
struct timeval kue_rx_notice;
struct usb_qdat kue_qdat;
};
#if 0
#define KUE_LOCK(_sc) mtx_lock(&(_sc)->kue_mtx)
#define KUE_UNLOCK(_sc) mtx_unlock(&(_sc)->kue_mtx)
#else
#define KUE_LOCK(_sc)
#define KUE_UNLOCK(_sc)
#endif

1393
sys/legacy/dev/usb/if_rue.c
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226
sys/legacy/dev/usb/if_ruereg.h
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/*-
* Copyright (c) 2001-2003, Shunsuke Akiyama <akiyama@FreeBSD.org>.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef _IF_RUEREG_H_
#define _IF_RUEREG_H_
#define RUE_INTR_PIPE 1 /* Use INTR PIPE */
#define RUE_CONFIG_NO 1
#define RUE_IFACE_IDX 0
#define RUE_ENDPT_RX 0x0
#define RUE_ENDPT_TX 0x1
#define RUE_ENDPT_INTR 0x2
#define RUE_ENDPT_MAX 0x3
#define RUE_INTR_PKTLEN 0x8
#define RUE_TIMEOUT 1000
#define ETHER_ALIGN 2
#define RUE_MIN_FRAMELEN 60
#define RUE_INTR_INTERVAL 100 /* ms */
/*
* Registers
*/
#define RUE_IDR0 0x0120
#define RUE_IDR1 0x0121
#define RUE_IDR2 0x0122
#define RUE_IDR3 0x0123
#define RUE_IDR4 0x0124
#define RUE_IDR5 0x0125
#define RUE_MAR0 0x0126
#define RUE_MAR1 0x0127
#define RUE_MAR2 0x0128
#define RUE_MAR3 0x0129
#define RUE_MAR4 0x012A
#define RUE_MAR5 0x012B
#define RUE_MAR6 0x012C
#define RUE_MAR7 0x012D
#define RUE_CR 0x012E /* B, R/W */
#define RUE_CR_SOFT_RST 0x10
#define RUE_CR_RE 0x08
#define RUE_CR_TE 0x04
#define RUE_CR_EP3CLREN 0x02
#define RUE_TCR 0x012F /* B, R/W */
#define RUE_TCR_TXRR1 0x80
#define RUE_TCR_TXRR0 0x40
#define RUE_TCR_IFG1 0x10
#define RUE_TCR_IFG0 0x08
#define RUE_TCR_NOCRC 0x01
#define RUE_TCR_CONFIG (RUE_TCR_TXRR1|RUE_TCR_TXRR0|RUE_TCR_IFG1|RUE_TCR_IFG0)
#define RUE_RCR 0x0130 /* W, R/W */
#define RUE_RCR_TAIL 0x80
#define RUE_RCR_AER 0x40
#define RUE_RCR_AR 0x20
#define RUE_RCR_AM 0x10
#define RUE_RCR_AB 0x08
#define RUE_RCR_AD 0x04
#define RUE_RCR_AAM 0x02
#define RUE_RCR_AAP 0x01
#define RUE_RCR_CONFIG (RUE_RCR_TAIL|RUE_RCR_AD)
#define RUE_TSR 0x0132
#define RUE_RSR 0x0133
#define RUE_CON0 0x0135
#define RUE_CON1 0x0136
#define RUE_MSR 0x0137
#define RUE_PHYADD 0x0138
#define RUE_PHYDAT 0x0139
#define RUE_PHYCNT 0x013B /* B, R/W */
#define RUE_PHYCNT_PHYOWN 0x40
#define RUE_PHYCNT_RWCR 0x20
#define RUE_GPPC 0x013D
#define RUE_WAKECNT 0x013E
#define RUE_BMCR 0x0140
#define RUE_BMCR_SPD_SET 0x2000
#define RUE_BMCR_DUPLEX 0x0100
#define RUE_BMSR 0x0142
#define RUE_ANAR 0x0144 /* W, R/W */
#define RUE_ANAR_PAUSE 0x0400
#define RUE_ANLP 0x0146 /* W, R/O */
#define RUE_ANLP_PAUSE 0x0400
#define RUE_AER 0x0148
#define RUE_NWAYT 0x014A
#define RUE_CSCR 0x014C
#define RUE_CRC0 0x014E
#define RUE_CRC1 0x0150
#define RUE_CRC2 0x0152
#define RUE_CRC3 0x0154
#define RUE_CRC4 0x0156
#define RUE_BYTEMASK0 0x0158
#define RUE_BYTEMASK1 0x0160
#define RUE_BYTEMASK2 0x0168
#define RUE_BYTEMASK3 0x0170
#define RUE_BYTEMASK4 0x0178
#define RUE_PHY1 0x0180
#define RUE_PHY2 0x0184
#define RUE_TW1 0x0186
#define RUE_REG_MIN 0x0120
#define RUE_REG_MAX 0x0189
/*
* EEPROM address declarations
*/
#define RUE_EEPROM_BASE 0x1200
#define RUE_EEPROM_IDR0 (RUE_EEPROM_BASE + 0x02)
#define RUE_EEPROM_IDR1 (RUE_EEPROM_BASE + 0x03)
#define RUE_EEPROM_IDR2 (RUE_EEPROM_BASE + 0x03)
#define RUE_EEPROM_IDR3 (RUE_EEPROM_BASE + 0x03)
#define RUE_EEPROM_IDR4 (RUE_EEPROM_BASE + 0x03)
#define RUE_EEPROM_IDR5 (RUE_EEPROM_BASE + 0x03)
#define RUE_EEPROM_INTERVAL (RUE_EEPROM_BASE + 0x17)
struct rue_intrpkt {
u_int8_t rue_tsr;
u_int8_t rue_rsr;
u_int8_t rue_gep_msr;
u_int8_t rue_waksr;
u_int8_t rue_txok_cnt;
u_int8_t rue_rxlost_cnt;
u_int8_t rue_crcerr_cnt;
u_int8_t rue_col_cnt;
};
struct rue_rxpkt {
u_int16_t rue_pktlen : 12;
u_int16_t rue_rxstat : 4;
};
#define RUE_RXSTAT_VALID 0x01
#define RUE_RXSTAT_RUNT 0x02
#define RUE_RXSTAT_PMATCH 0x04
#define RUE_RXSTAT_MCAST 0x08
#define RUE_RXSTAT_MASK RUE_RXSTAT_VALID
struct rue_type {
u_int16_t rue_vid;
u_int16_t rue_did;
};
struct rue_softc {
struct ifnet *rue_ifp;
device_t rue_dev;
device_t rue_miibus;
usbd_device_handle rue_udev;
usbd_interface_handle rue_iface;
struct rue_type *rue_info;
int rue_ed[RUE_ENDPT_MAX];
usbd_pipe_handle rue_ep[RUE_ENDPT_MAX];
int rue_unit;
u_int8_t rue_link;
int rue_if_flags;
struct ue_cdata rue_cdata;
struct callout_handle rue_stat_ch;
struct mtx rue_mtx;
char rue_dying;
struct timeval rue_rx_notice;
struct usb_qdat rue_qdat;
struct usb_task rue_tick_task;
};
#if defined(__FreeBSD__)
#define GET_MII(sc) (device_get_softc((sc)->rue_miibus))
#elif defined(__NetBSD__)
#define GET_MII(sc) (&(sc)->rue_mii)
#elif defined(__OpenBSD__)
#define GET_MII(sc) (&(sc)->rue_mii)
#endif
#if 0
#define RUE_LOCK(_sc) mtx_lock(&(_sc)->rue_mtx)
#define RUE_UNLOCK(_sc) mtx_unlock(&(_sc)->rue_mtx)
#else
#define RUE_LOCK(_sc)
#define RUE_UNLOCK(_sc)
#endif
#endif /* _IF_RUEREG_H_ */

2560
sys/legacy/dev/usb/if_rum.c
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235
sys/legacy/dev/usb/if_rumreg.h
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/* $FreeBSD$ */
/*-
* Copyright (c) 2005, 2006 Damien Bergamini <damien.bergamini@free.fr>
* Copyright (c) 2006 Niall O'Higgins <niallo@openbsd.org>
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#define RT2573_NOISE_FLOOR -95
#define RT2573_TX_DESC_SIZE (sizeof (struct rum_tx_desc))
#define RT2573_RX_DESC_SIZE (sizeof (struct rum_rx_desc))
#define RT2573_CONFIG_NO 1
#define RT2573_IFACE_INDEX 0
#define RT2573_MCU_CNTL 0x01
#define RT2573_WRITE_MAC 0x02
#define RT2573_READ_MAC 0x03
#define RT2573_WRITE_MULTI_MAC 0x06
#define RT2573_READ_MULTI_MAC 0x07
#define RT2573_READ_EEPROM 0x09
#define RT2573_WRITE_LED 0x0a
/*
* Control and status registers.
*/
#define RT2573_AIFSN_CSR 0x0400
#define RT2573_CWMIN_CSR 0x0404
#define RT2573_CWMAX_CSR 0x0408
#define RT2573_MCU_CODE_BASE 0x0800
#define RT2573_HW_BEACON_BASE0 0x2400
#define RT2573_MAC_CSR0 0x3000
#define RT2573_MAC_CSR1 0x3004
#define RT2573_MAC_CSR2 0x3008
#define RT2573_MAC_CSR3 0x300c
#define RT2573_MAC_CSR4 0x3010
#define RT2573_MAC_CSR5 0x3014
#define RT2573_MAC_CSR6 0x3018
#define RT2573_MAC_CSR7 0x301c
#define RT2573_MAC_CSR8 0x3020
#define RT2573_MAC_CSR9 0x3024
#define RT2573_MAC_CSR10 0x3028
#define RT2573_MAC_CSR11 0x302c
#define RT2573_MAC_CSR12 0x3030
#define RT2573_MAC_CSR13 0x3034
#define RT2573_MAC_CSR14 0x3038
#define RT2573_MAC_CSR15 0x303c
#define RT2573_TXRX_CSR0 0x3040
#define RT2573_TXRX_CSR1 0x3044
#define RT2573_TXRX_CSR2 0x3048
#define RT2573_TXRX_CSR3 0x304c
#define RT2573_TXRX_CSR4 0x3050
#define RT2573_TXRX_CSR5 0x3054
#define RT2573_TXRX_CSR6 0x3058
#define RT2573_TXRX_CSR7 0x305c
#define RT2573_TXRX_CSR8 0x3060
#define RT2573_TXRX_CSR9 0x3064
#define RT2573_TXRX_CSR10 0x3068
#define RT2573_TXRX_CSR11 0x306c
#define RT2573_TXRX_CSR12 0x3070
#define RT2573_TXRX_CSR13 0x3074
#define RT2573_TXRX_CSR14 0x3078
#define RT2573_TXRX_CSR15 0x307c
#define RT2573_PHY_CSR0 0x3080
#define RT2573_PHY_CSR1 0x3084
#define RT2573_PHY_CSR2 0x3088
#define RT2573_PHY_CSR3 0x308c
#define RT2573_PHY_CSR4 0x3090
#define RT2573_PHY_CSR5 0x3094
#define RT2573_PHY_CSR6 0x3098
#define RT2573_PHY_CSR7 0x309c
#define RT2573_SEC_CSR0 0x30a0
#define RT2573_SEC_CSR1 0x30a4
#define RT2573_SEC_CSR2 0x30a8
#define RT2573_SEC_CSR3 0x30ac
#define RT2573_SEC_CSR4 0x30b0
#define RT2573_SEC_CSR5 0x30b4
#define RT2573_STA_CSR0 0x30c0
#define RT2573_STA_CSR1 0x30c4
#define RT2573_STA_CSR2 0x30c8
#define RT2573_STA_CSR3 0x30cc
#define RT2573_STA_CSR4 0x30d0
#define RT2573_STA_CSR5 0x30d4
/* possible flags for register RT2573_MAC_CSR1 */
#define RT2573_RESET_ASIC (1 << 0)
#define RT2573_RESET_BBP (1 << 1)
#define RT2573_HOST_READY (1 << 2)
/* possible flags for register MAC_CSR5 */
#define RT2573_ONE_BSSID 3
/* possible flags for register TXRX_CSR0 */
/* Tx filter flags are in the low 16 bits */
#define RT2573_AUTO_TX_SEQ (1 << 15)
/* Rx filter flags are in the high 16 bits */
#define RT2573_DISABLE_RX (1 << 16)
#define RT2573_DROP_CRC_ERROR (1 << 17)
#define RT2573_DROP_PHY_ERROR (1 << 18)
#define RT2573_DROP_CTL (1 << 19)
#define RT2573_DROP_NOT_TO_ME (1 << 20)
#define RT2573_DROP_TODS (1 << 21)
#define RT2573_DROP_VER_ERROR (1 << 22)
#define RT2573_DROP_MULTICAST (1 << 23)
#define RT2573_DROP_BROADCAST (1 << 24)
#define RT2573_DROP_ACKCTS (1 << 25)
/* possible flags for register TXRX_CSR4 */
#define RT2573_SHORT_PREAMBLE (1 << 18)
#define RT2573_MRR_ENABLED (1 << 19)
#define RT2573_MRR_CCK_FALLBACK (1 << 22)
/* possible flags for register TXRX_CSR9 */
#define RT2573_TSF_TICKING (1 << 16)
#define RT2573_TSF_MODE(x) (((x) & 0x3) << 17)
/* TBTT stands for Target Beacon Transmission Time */
#define RT2573_ENABLE_TBTT (1 << 19)
#define RT2573_GENERATE_BEACON (1 << 20)
/* possible flags for register PHY_CSR0 */
#define RT2573_PA_PE_2GHZ (1 << 16)
#define RT2573_PA_PE_5GHZ (1 << 17)
/* possible flags for register PHY_CSR3 */
#define RT2573_BBP_READ (1 << 15)
#define RT2573_BBP_BUSY (1 << 16)
/* possible flags for register PHY_CSR4 */
#define RT2573_RF_20BIT (20 << 24)
#define RT2573_RF_BUSY (1 << 31)
/* LED values */
#define RT2573_LED_RADIO (1 << 8)
#define RT2573_LED_G (1 << 9)
#define RT2573_LED_A (1 << 10)
#define RT2573_LED_ON 0x1e1e
#define RT2573_LED_OFF 0x0
#define RT2573_MCU_RUN (1 << 3)
#define RT2573_SMART_MODE (1 << 0)
#define RT2573_BBPR94_DEFAULT 6
#define RT2573_BBP_WRITE (1 << 15)
/* dual-band RF */
#define RT2573_RF_5226 1
#define RT2573_RF_5225 3
/* single-band RF */
#define RT2573_RF_2528 2
#define RT2573_RF_2527 4
#define RT2573_BBP_VERSION 0
struct rum_tx_desc {
uint32_t flags;
#define RT2573_TX_BURST (1 << 0)
#define RT2573_TX_VALID (1 << 1)
#define RT2573_TX_MORE_FRAG (1 << 2)
#define RT2573_TX_NEED_ACK (1 << 3)
#define RT2573_TX_TIMESTAMP (1 << 4)
#define RT2573_TX_OFDM (1 << 5)
#define RT2573_TX_IFS_SIFS (1 << 6)
#define RT2573_TX_LONG_RETRY (1 << 7)
uint16_t wme;
#define RT2573_QID(v) (v)
#define RT2573_AIFSN(v) ((v) << 4)
#define RT2573_LOGCWMIN(v) ((v) << 8)
#define RT2573_LOGCWMAX(v) ((v) << 12)
uint16_t xflags;
#define RT2573_TX_HWSEQ (1 << 12)
uint8_t plcp_signal;
uint8_t plcp_service;
#define RT2573_PLCP_LENGEXT 0x80
uint8_t plcp_length_lo;
uint8_t plcp_length_hi;
uint32_t iv;
uint32_t eiv;
uint8_t offset;
uint8_t qid;
uint8_t txpower;
#define RT2573_DEFAULT_TXPOWER 0
uint8_t reserved;
} __packed;
struct rum_rx_desc {
uint32_t flags;
#define RT2573_RX_BUSY (1 << 0)
#define RT2573_RX_DROP (1 << 1)
#define RT2573_RX_CRC_ERROR (1 << 6)
#define RT2573_RX_OFDM (1 << 7)
uint8_t rate;
uint8_t rssi;
uint8_t reserved1;
uint8_t offset;
uint32_t iv;
uint32_t eiv;
uint32_t reserved2[2];
} __packed;
#define RT2573_RF1 0
#define RT2573_RF2 2
#define RT2573_RF3 1
#define RT2573_RF4 3
#define RT2573_EEPROM_MACBBP 0x0000
#define RT2573_EEPROM_ADDRESS 0x0004
#define RT2573_EEPROM_ANTENNA 0x0020
#define RT2573_EEPROM_CONFIG2 0x0022
#define RT2573_EEPROM_BBP_BASE 0x0026
#define RT2573_EEPROM_TXPOWER 0x0046
#define RT2573_EEPROM_FREQ_OFFSET 0x005e
#define RT2573_EEPROM_RSSI_2GHZ_OFFSET 0x009a
#define RT2573_EEPROM_RSSI_5GHZ_OFFSET 0x009c

161
sys/legacy/dev/usb/if_rumvar.h
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/* $FreeBSD$ */
/*-
* Copyright (c) 2005, 2006 Damien Bergamini <damien.bergamini@free.fr>
* Copyright (c) 2006 Niall O'Higgins <niallo@openbsd.org>
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#define RUM_RX_LIST_COUNT 1
#define RUM_TX_LIST_COUNT 8
struct rum_rx_radiotap_header {
struct ieee80211_radiotap_header wr_ihdr;
uint8_t wr_flags;
uint8_t wr_rate;
uint16_t wr_chan_freq;
uint16_t wr_chan_flags;
uint8_t wr_antenna;
uint8_t wr_antsignal;
};
#define RT2573_RX_RADIOTAP_PRESENT \
((1 << IEEE80211_RADIOTAP_FLAGS) | \
(1 << IEEE80211_RADIOTAP_RATE) | \
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
(1 << IEEE80211_RADIOTAP_ANTENNA) | \
(1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL))
struct rum_tx_radiotap_header {
struct ieee80211_radiotap_header wt_ihdr;
uint8_t wt_flags;
uint8_t wt_rate;
uint16_t wt_chan_freq;
uint16_t wt_chan_flags;
uint8_t wt_antenna;
};
#define RT2573_TX_RADIOTAP_PRESENT \
((1 << IEEE80211_RADIOTAP_FLAGS) | \
(1 << IEEE80211_RADIOTAP_RATE) | \
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
(1 << IEEE80211_RADIOTAP_ANTENNA))
struct rum_softc;
struct rum_tx_data {
struct rum_softc *sc;
usbd_xfer_handle xfer;
uint8_t *buf;
struct mbuf *m;
struct ieee80211_node *ni;
};
struct rum_rx_data {
struct rum_softc *sc;
usbd_xfer_handle xfer;
uint8_t *buf;
struct mbuf *m;
};
struct rum_node {
struct ieee80211_node ni;
struct ieee80211_amrr_node amn;
};
#define RUM_NODE(ni) ((struct rum_node *)(ni))
struct rum_vap {
struct ieee80211vap vap;
struct ieee80211_beacon_offsets bo;
struct ieee80211_amrr amrr;
struct callout amrr_ch;
int (*newstate)(struct ieee80211vap *,
enum ieee80211_state, int);
};
#define RUM_VAP(vap) ((struct rum_vap *)(vap))
struct rum_softc {
struct ifnet *sc_ifp;
const struct ieee80211_rate_table *sc_rates;
device_t sc_dev;
usbd_device_handle sc_udev;
usbd_interface_handle sc_iface;
int sc_rx_no;
int sc_tx_no;
uint8_t rf_rev;
uint8_t rffreq;
usbd_xfer_handle amrr_xfer;
usbd_pipe_handle sc_rx_pipeh;
usbd_pipe_handle sc_tx_pipeh;
enum ieee80211_state sc_state;
int sc_arg;
struct usb_task sc_task;
struct usb_task sc_scantask;
int sc_scan_action;
#define RUM_SCAN_START 0
#define RUM_SCAN_END 1
#define RUM_SET_CHANNEL 2
struct rum_rx_data rx_data[RUM_RX_LIST_COUNT];
struct rum_tx_data tx_data[RUM_TX_LIST_COUNT];
int tx_queued;
int tx_cur;
struct mtx sc_mtx;
struct callout watchdog_ch;
int sc_tx_timer;
uint32_t sta[6];
uint32_t rf_regs[4];
uint8_t txpow[44];
struct {
uint8_t val;
uint8_t reg;
} __packed bbp_prom[16];
int hw_radio;
int rx_ant;
int tx_ant;
int nb_ant;
int ext_2ghz_lna;
int ext_5ghz_lna;
int rssi_2ghz_corr;
int rssi_5ghz_corr;
uint8_t bbp17;
struct rum_rx_radiotap_header sc_rxtap;
int sc_rxtap_len;
struct rum_tx_radiotap_header sc_txtap;
int sc_txtap_len;
};
#if 0
#define RUM_LOCK(sc) mtx_lock(&(sc)->sc_mtx)
#define RUM_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx)
#else
#define RUM_LOCK(sc) do { ((sc) = (sc)); mtx_lock(&Giant); } while (0)
#define RUM_UNLOCK(sc) mtx_unlock(&Giant)
#endif

1962
sys/legacy/dev/usb/if_udav.c
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210
sys/legacy/dev/usb/if_udavreg.h
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/* $NetBSD: if_udavreg.h,v 1.2 2003/09/04 15:17:39 tsutsui Exp $ */
/* $nabe: if_udavreg.h,v 1.2 2003/08/21 16:26:40 nabe Exp $ */
/* $FreeBSD$ */
/*-
* Copyright (c) 2003
* Shingo WATANABE <nabe@nabechan.org>. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
*/
#define UDAV_IFACE_INDEX 0
#define UDAV_CONFIG_NO 1
#define UDAV_TX_TIMEOUT 1000
#define UDAV_TIMEOUT 10000
#define ETHER_ALIGN 2
/* Packet length */
#define UDAV_MIN_FRAME_LEN 60
/* Request */
#define UDAV_REQ_REG_READ 0x00 /* Read from register(s) */
#define UDAV_REQ_REG_WRITE 0x01 /* Write to register(s) */
#define UDAV_REQ_REG_WRITE1 0x03 /* Write to a register */
#define UDAV_REQ_MEM_READ 0x02 /* Read from memory */
#define UDAV_REQ_MEM_WRITE 0x05 /* Write to memory */
#define UDAV_REQ_MEM_WRITE1 0x07 /* Write a byte to memory */
/* Registers */
#define UDAV_NCR 0x00 /* Network Control Register */
#define UDAV_NCR_EXT_PHY (1<<7) /* Select External PHY */
#define UDAV_NCR_WAKEEN (1<<6) /* Wakeup Event Enable */
#define UDAV_NCR_FCOL (1<<4) /* Force Collision Mode */
#define UDAV_NCR_FDX (1<<3) /* Full-Duplex Mode (RO on Int. PHY) */
#define UDAV_NCR_LBK1 (1<<2) /* Lookback Mode */
#define UDAV_NCR_LBK0 (1<<1) /* Lookback Mode */
#define UDAV_NCR_RST (1<<0) /* Software reset */
#define UDAV_RCR 0x05 /* RX Control Register */
#define UDAV_RCR_WTDIS (1<<6) /* Watchdog Timer Disable */
#define UDAV_RCR_DIS_LONG (1<<5) /* Discard Long Packet(over 1522Byte) */
#define UDAV_RCR_DIS_CRC (1<<4) /* Discard CRC Error Packet */
#define UDAV_RCR_ALL (1<<3) /* Pass All Multicast */
#define UDAV_RCR_RUNT (1<<2) /* Pass Runt Packet */
#define UDAV_RCR_PRMSC (1<<1) /* Promiscuous Mode */
#define UDAV_RCR_RXEN (1<<0) /* RX Enable */
#define UDAV_RSR 0x06 /* RX Status Register */
#define UDAV_RSR_RF (1<<7) /* Runt Frame */
#define UDAV_RSR_MF (1<<6) /* Multicast Frame */
#define UDAV_RSR_LCS (1<<5) /* Late Collision Seen */
#define UDAV_RSR_RWTO (1<<4) /* Receive Watchdog Time-Out */
#define UDAV_RSR_PLE (1<<3) /* Physical Layer Error */
#define UDAV_RSR_AE (1<<2) /* Alignment Error */
#define UDAV_RSR_CE (1<<1) /* CRC Error */
#define UDAV_RSR_FOE (1<<0) /* FIFO Overflow Error */
#define UDAV_RSR_ERR (UDAV_RSR_RF | UDAV_RSR_LCS | UDAV_RSR_RWTO |\
UDAV_RSR_PLE | UDAV_RSR_AE | UDAV_RSR_CE |\
UDAV_RSR_FOE)
#define UDAV_EPCR 0x0b /* EEPROM & PHY Control Register */
#define UDAV_EPCR_REEP (1<<5) /* Reload EEPROM */
#define UDAV_EPCR_WEP (1<<4) /* Write EEPROM enable */
#define UDAV_EPCR_EPOS (1<<3) /* EEPROM or PHY Operation Select */
#define UDAV_EPCR_ERPRR (1<<2) /* EEPROM/PHY Register Read Command */
#define UDAV_EPCR_ERPRW (1<<1) /* EEPROM/PHY Register Write Command */
#define UDAV_EPCR_ERRE (1<<0) /* EEPROM/PHY Access Status */
#define UDAV_EPAR 0x0c /* EEPROM & PHY Control Register */
#define UDAV_EPAR_PHY_ADR1 (1<<7) /* PHY Address bit 1 */
#define UDAV_EPAR_PHY_ADR0 (1<<6) /* PHY Address bit 0 */
#define UDAV_EPAR_EROA (1<<0) /* EEPROM Word/PHY Register Address */
#define UDAV_EPAR_EROA_MASK (0x1f) /* [5:0] */
#define UDAV_EPDRL 0x0d /* EEPROM & PHY Data Register */
#define UDAV_EPDRH 0x0e /* EEPROM & PHY Data Register */
#define UDAV_PAR0 0x10 /* Ethernet Address, load from EEPROM */
#define UDAV_PAR1 0x11 /* Ethernet Address, load from EEPROM */
#define UDAV_PAR2 0x12 /* Ethernet Address, load from EEPROM */
#define UDAV_PAR3 0x13 /* Ethernet Address, load from EEPROM */
#define UDAV_PAR4 0x14 /* Ethernet Address, load from EEPROM */
#define UDAV_PAR5 0x15 /* Ethernet Address, load from EEPROM */
#define UDAV_PAR UDAV_PAR0
#define UDAV_MAR0 0x16 /* Multicast Register */
#define UDAV_MAR1 0x17 /* Multicast Register */
#define UDAV_MAR2 0x18 /* Multicast Register */
#define UDAV_MAR3 0x19 /* Multicast Register */
#define UDAV_MAR4 0x1a /* Multicast Register */
#define UDAV_MAR5 0x1b /* Multicast Register */
#define UDAV_MAR6 0x1c /* Multicast Register */
#define UDAV_MAR7 0x1d /* Multicast Register */
#define UDAV_MAR UDAV_MAR0
#define UDAV_GPCR 0x1e /* General purpose control register */
#define UDAV_GPCR_GEP_CNTL6 (1<<6) /* General purpose control 6 */
#define UDAV_GPCR_GEP_CNTL5 (1<<5) /* General purpose control 5 */
#define UDAV_GPCR_GEP_CNTL4 (1<<4) /* General purpose control 4 */
#define UDAV_GPCR_GEP_CNTL3 (1<<3) /* General purpose control 3 */
#define UDAV_GPCR_GEP_CNTL2 (1<<2) /* General purpose control 2 */
#define UDAV_GPCR_GEP_CNTL1 (1<<1) /* General purpose control 1 */
#define UDAV_GPCR_GEP_CNTL0 (1<<0) /* General purpose control 0 */
#define UDAV_GPR 0x1f /* General purpose register */
#define UDAV_GPR_GEPIO6 (1<<6) /* General purpose 6 */
#define UDAV_GPR_GEPIO5 (1<<5) /* General purpose 5 */
#define UDAV_GPR_GEPIO4 (1<<4) /* General purpose 4 */
#define UDAV_GPR_GEPIO3 (1<<3) /* General purpose 3 */
#define UDAV_GPR_GEPIO2 (1<<2) /* General purpose 2 */
#define UDAV_GPR_GEPIO1 (1<<1) /* General purpose 1 */
#define UDAV_GPR_GEPIO0 (1<<0) /* General purpose 0 */
#if defined(__FreeBSD__)
#define GET_IFP(sc) ((sc)->sc_ifp)
#elif defined(__OpenBSD__)
#define GET_IFP(sc) (&(sc)->sc_ac.ac_if)
#elif defined(__NetBSD__)
#define GET_IFP(sc) (&(sc)->sc_ec.ec_if)
#endif
#if defined(__FreeBSD__)
#define GET_MII(sc) (device_get_softc((sc)->sc_miibus))
#else
#define GET_MII(sc) (&(sc)->sc_mii)
#endif
#if defined(__FreeBSD__)
#if 0
#define UDAV_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
#define UDAV_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
#else
#define UDAV_LOCK(_sc)
#define UDAV_UNLOCK(_sc)
#endif
#endif
struct udav_softc {
#if defined(__FreeBSD__)
struct ifnet *sc_ifp;
#endif
device_t sc_dev; /* base device */
usbd_device_handle sc_udev;
/* USB */
usbd_interface_handle sc_ctl_iface;
/* int sc_ctl_iface_no; */
int sc_bulkin_no; /* bulk in endpoint */
int sc_bulkout_no; /* bulk out endpoint */
int sc_intrin_no; /* intr in endpoint */
usbd_pipe_handle sc_pipe_rx;
usbd_pipe_handle sc_pipe_tx;
usbd_pipe_handle sc_pipe_intr;
usb_callout_t sc_stat_ch;
u_int sc_rx_errs;
/* u_int sc_intr_errs; */
struct timeval sc_rx_notice;
/* Ethernet */
#if defined(__FreeBSD__)
device_t sc_miibus ;
struct mtx sc_mtx ;
struct usb_qdat sc_qdat;
#elif defined(__NetBSD__)
struct ethercom sc_ec; /* ethernet common */
struct mii_data sc_mii;
#endif
struct lock sc_mii_lock;
int sc_link;
#define sc_media udav_mii.mii_media
#if defined(NRND) && NRND > 0
rndsource_element_t rnd_source;
#endif
struct ue_cdata sc_cdata;
int sc_attached;
int sc_dying;
int sc_refcnt;
struct usb_task sc_tick_task;
struct usb_task sc_stop_task;
u_int16_t sc_flags;
};

2505
sys/legacy/dev/usb/if_ural.c
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sys/legacy/dev/usb/if_uralreg.h
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/* $FreeBSD$ */
/*-
* Copyright (c) 2005, 2006
* Damien Bergamini <damien.bergamini@free.fr>
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#define RAL_NOISE_FLOOR -95
#define RAL_RSSI_CORR 120
#define RAL_RX_DESC_SIZE (sizeof (struct ural_rx_desc))
#define RAL_TX_DESC_SIZE (sizeof (struct ural_tx_desc))
#define RAL_CONFIG_NO 1
#define RAL_IFACE_INDEX 0
#define RAL_VENDOR_REQUEST 0x01
#define RAL_WRITE_MAC 0x02
#define RAL_READ_MAC 0x03
#define RAL_WRITE_MULTI_MAC 0x06
#define RAL_READ_MULTI_MAC 0x07
#define RAL_READ_EEPROM 0x09
/*
* MAC registers.
*/
#define RAL_MAC_CSR0 0x0400 /* ASIC Version */
#define RAL_MAC_CSR1 0x0402 /* System control */
#define RAL_MAC_CSR2 0x0404 /* MAC addr0 */
#define RAL_MAC_CSR3 0x0406 /* MAC addr1 */
#define RAL_MAC_CSR4 0x0408 /* MAC addr2 */
#define RAL_MAC_CSR5 0x040a /* BSSID0 */
#define RAL_MAC_CSR6 0x040c /* BSSID1 */
#define RAL_MAC_CSR7 0x040e /* BSSID2 */
#define RAL_MAC_CSR8 0x0410 /* Max frame length */
#define RAL_MAC_CSR9 0x0412 /* Timer control */
#define RAL_MAC_CSR10 0x0414 /* Slot time */
#define RAL_MAC_CSR11 0x0416 /* IFS */
#define RAL_MAC_CSR12 0x0418 /* EIFS */
#define RAL_MAC_CSR13 0x041a /* Power mode0 */
#define RAL_MAC_CSR14 0x041c /* Power mode1 */
#define RAL_MAC_CSR15 0x041e /* Power saving transition0 */
#define RAL_MAC_CSR16 0x0420 /* Power saving transition1 */
#define RAL_MAC_CSR17 0x0422 /* Power state control */
#define RAL_MAC_CSR18 0x0424 /* Auto wake-up control */
#define RAL_MAC_CSR19 0x0426 /* GPIO control */
#define RAL_MAC_CSR20 0x0428 /* LED control0 */
#define RAL_MAC_CSR22 0x042c /* XXX not documented */
/*
* Tx/Rx Registers.
*/
#define RAL_TXRX_CSR0 0x0440 /* Security control */
#define RAL_TXRX_CSR2 0x0444 /* Rx control */
#define RAL_TXRX_CSR5 0x044a /* CCK Tx BBP ID0 */
#define RAL_TXRX_CSR6 0x044c /* CCK Tx BBP ID1 */
#define RAL_TXRX_CSR7 0x044e /* OFDM Tx BBP ID0 */
#define RAL_TXRX_CSR8 0x0450 /* OFDM Tx BBP ID1 */
#define RAL_TXRX_CSR10 0x0454 /* Auto responder control */
#define RAL_TXRX_CSR11 0x0456 /* Auto responder basic rate */
#define RAL_TXRX_CSR18 0x0464 /* Beacon interval */
#define RAL_TXRX_CSR19 0x0466 /* Beacon/sync control */
#define RAL_TXRX_CSR20 0x0468 /* Beacon alignment */
#define RAL_TXRX_CSR21 0x046a /* XXX not documented */
/*
* Security registers.
*/
#define RAL_SEC_CSR0 0x0480 /* Shared key 0, word 0 */
/*
* PHY registers.
*/
#define RAL_PHY_CSR2 0x04c4 /* Tx MAC configuration */
#define RAL_PHY_CSR4 0x04c8 /* Interface configuration */
#define RAL_PHY_CSR5 0x04ca /* BBP Pre-Tx CCK */
#define RAL_PHY_CSR6 0x04cc /* BBP Pre-Tx OFDM */
#define RAL_PHY_CSR7 0x04ce /* BBP serial control */
#define RAL_PHY_CSR8 0x04d0 /* BBP serial status */
#define RAL_PHY_CSR9 0x04d2 /* RF serial control0 */
#define RAL_PHY_CSR10 0x04d4 /* RF serial control1 */
/*
* Statistics registers.
*/
#define RAL_STA_CSR0 0x04e0 /* FCS error */
#define RAL_DISABLE_RX (1 << 0)
#define RAL_DROP_CRC (1 << 1)
#define RAL_DROP_PHY (1 << 2)
#define RAL_DROP_CTL (1 << 3)
#define RAL_DROP_NOT_TO_ME (1 << 4)
#define RAL_DROP_TODS (1 << 5)
#define RAL_DROP_BAD_VERSION (1 << 6)
#define RAL_DROP_MULTICAST (1 << 9)
#define RAL_DROP_BROADCAST (1 << 10)
#define RAL_SHORT_PREAMBLE (1 << 2)
#define RAL_RESET_ASIC (1 << 0)
#define RAL_RESET_BBP (1 << 1)
#define RAL_HOST_READY (1 << 2)
#define RAL_ENABLE_TSF (1 << 0)
#define RAL_ENABLE_TSF_SYNC(x) (((x) & 0x3) << 1)
#define RAL_ENABLE_TBCN (1 << 3)
#define RAL_ENABLE_BEACON_GENERATOR (1 << 4)
#define RAL_RF_AWAKE (3 << 7)
#define RAL_BBP_AWAKE (3 << 5)
#define RAL_BBP_WRITE (1 << 15)
#define RAL_BBP_BUSY (1 << 0)
#define RAL_RF1_AUTOTUNE 0x08000
#define RAL_RF3_AUTOTUNE 0x00040
#define RAL_RF_2522 0x00
#define RAL_RF_2523 0x01
#define RAL_RF_2524 0x02
#define RAL_RF_2525 0x03
#define RAL_RF_2525E 0x04
#define RAL_RF_2526 0x05
/* dual-band RF */
#define RAL_RF_5222 0x10
#define RAL_BBP_VERSION 0
#define RAL_BBP_TX 2
#define RAL_BBP_RX 14
#define RAL_BBP_ANTA 0x00
#define RAL_BBP_DIVERSITY 0x01
#define RAL_BBP_ANTB 0x02
#define RAL_BBP_ANTMASK 0x03
#define RAL_BBP_FLIPIQ 0x04
#define RAL_JAPAN_FILTER 0x08
struct ural_tx_desc {
uint32_t flags;
#define RAL_TX_RETRY(x) ((x) << 4)
#define RAL_TX_MORE_FRAG (1 << 8)
#define RAL_TX_ACK (1 << 9)
#define RAL_TX_TIMESTAMP (1 << 10)
#define RAL_TX_OFDM (1 << 11)
#define RAL_TX_NEWSEQ (1 << 12)
#define RAL_TX_IFS_MASK 0x00006000
#define RAL_TX_IFS_BACKOFF (0 << 13)
#define RAL_TX_IFS_SIFS (1 << 13)
#define RAL_TX_IFS_NEWBACKOFF (2 << 13)
#define RAL_TX_IFS_NONE (3 << 13)
uint16_t wme;
#define RAL_LOGCWMAX(x) (((x) & 0xf) << 12)
#define RAL_LOGCWMIN(x) (((x) & 0xf) << 8)
#define RAL_AIFSN(x) (((x) & 0x3) << 6)
#define RAL_IVOFFSET(x) (((x) & 0x3f))
uint16_t reserved1;
uint8_t plcp_signal;
uint8_t plcp_service;
#define RAL_PLCP_LENGEXT 0x80
uint8_t plcp_length_lo;
uint8_t plcp_length_hi;
uint32_t iv;
uint32_t eiv;
} __packed;
struct ural_rx_desc {
uint32_t flags;
#define RAL_RX_CRC_ERROR (1 << 5)
#define RAL_RX_OFDM (1 << 6)
#define RAL_RX_PHY_ERROR (1 << 7)
uint8_t rssi;
uint8_t rate;
uint16_t reserved;
uint32_t iv;
uint32_t eiv;
} __packed;
#define RAL_RF_LOBUSY (1 << 15)
#define RAL_RF_BUSY (1 << 31)
#define RAL_RF_20BIT (20 << 24)
#define RAL_RF1 0
#define RAL_RF2 2
#define RAL_RF3 1
#define RAL_RF4 3
#define RAL_EEPROM_ADDRESS 0x0004
#define RAL_EEPROM_TXPOWER 0x003c
#define RAL_EEPROM_CONFIG0 0x0016
#define RAL_EEPROM_BBP_BASE 0x001c

157
sys/legacy/dev/usb/if_uralvar.h
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@ -1,157 +0,0 @@
/* $FreeBSD$ */
/*-
* Copyright (c) 2005
* Damien Bergamini <damien.bergamini@free.fr>
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#define RAL_RX_LIST_COUNT 1
#define RAL_TX_LIST_COUNT 8
#define URAL_SCAN_START 1
#define URAL_SCAN_END 2
#define URAL_SET_CHANNEL 3
struct ural_rx_radiotap_header {
struct ieee80211_radiotap_header wr_ihdr;
uint8_t wr_flags;
uint8_t wr_rate;
uint16_t wr_chan_freq;
uint16_t wr_chan_flags;
uint8_t wr_antenna;
uint8_t wr_antsignal;
};
#define RAL_RX_RADIOTAP_PRESENT \
((1 << IEEE80211_RADIOTAP_FLAGS) | \
(1 << IEEE80211_RADIOTAP_RATE) | \
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
(1 << IEEE80211_RADIOTAP_ANTENNA) | \
(1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL))
struct ural_tx_radiotap_header {
struct ieee80211_radiotap_header wt_ihdr;
uint8_t wt_flags;
uint8_t wt_rate;
uint16_t wt_chan_freq;
uint16_t wt_chan_flags;
uint8_t wt_antenna;
};
#define RAL_TX_RADIOTAP_PRESENT \
((1 << IEEE80211_RADIOTAP_FLAGS) | \
(1 << IEEE80211_RADIOTAP_RATE) | \
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
(1 << IEEE80211_RADIOTAP_ANTENNA))
struct ural_softc;
struct ural_tx_data {
struct ural_softc *sc;
usbd_xfer_handle xfer;
uint8_t *buf;
struct mbuf *m;
struct ieee80211_node *ni;
};
struct ural_rx_data {
struct ural_softc *sc;
usbd_xfer_handle xfer;
uint8_t *buf;
struct mbuf *m;
};
struct ural_node {
struct ieee80211_node ni;
struct ieee80211_amrr_node amn;
};
#define URAL_NODE(ni) ((struct ural_node *)(ni))
struct ural_vap {
struct ieee80211vap vap;
struct ieee80211_beacon_offsets bo;
struct ieee80211_amrr amrr;
struct callout amrr_ch;
int (*newstate)(struct ieee80211vap *,
enum ieee80211_state, int);
};
#define URAL_VAP(vap) ((struct ural_vap *)(vap))
struct ural_softc {
struct ifnet *sc_ifp;
device_t sc_dev;
usbd_device_handle sc_udev;
usbd_interface_handle sc_iface;
const struct ieee80211_rate_table *sc_rates;
int sc_rx_no;
int sc_tx_no;
uint32_t asic_rev;
uint8_t rf_rev;
usbd_xfer_handle amrr_xfer;
usbd_pipe_handle sc_rx_pipeh;
usbd_pipe_handle sc_tx_pipeh;
enum ieee80211_state sc_state;
int sc_arg;
int sc_scan_action; /* should be an enum */
struct usb_task sc_task;
struct usb_task sc_scantask;
struct ural_rx_data rx_data[RAL_RX_LIST_COUNT];
struct ural_tx_data tx_data[RAL_TX_LIST_COUNT];
int tx_queued;
int tx_cur;
struct mtx sc_mtx;
struct callout watchdog_ch;
int sc_tx_timer;
uint16_t sta[11];
uint32_t rf_regs[4];
uint8_t txpow[14];
struct {
uint8_t val;
uint8_t reg;
} __packed bbp_prom[16];
int led_mode;
int hw_radio;
int rx_ant;
int tx_ant;
int nb_ant;
struct ural_rx_radiotap_header sc_rxtap;
int sc_rxtap_len;
struct ural_tx_radiotap_header sc_txtap;
int sc_txtap_len;
};
#if 0
#define RAL_LOCK(sc) mtx_lock(&(sc)->sc_mtx)
#define RAL_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx)
#else
#define RAL_LOCK(sc) do { ((sc) = (sc)); mtx_lock(&Giant); } while (0)
#define RAL_UNLOCK(sc) mtx_unlock(&Giant)
#endif

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sys/legacy/dev/usb/if_zyd.c
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sys/legacy/dev/usb/if_zydfw.h
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sys/legacy/dev/usb/if_zydreg.h
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