From 83d54b590f5330a71037fcd0648f3f829d96218d Mon Sep 17 00:00:00 2001 From: Andrew Gallatin Date: Wed, 30 Sep 2009 14:42:06 +0000 Subject: [PATCH] Two more mxge watchdog fixes: 1) Restore the PCI Express control register after a watchdog reset. This is required because the device will come out of watchdog reset with the pectl reg at its default state, and important BIOS configuration (like max payload size) could be lost. 2) Call mxge_start_locked() for every tx queue before dropping the lock in the watchdog handler. This is required, as the queue's buf ring may have filled during the reset. --- sys/dev/mxge/if_mxge.c | 17 +++++++++++++---- sys/dev/mxge/if_mxge_var.h | 1 + 2 files changed, 14 insertions(+), 4 deletions(-) diff --git a/sys/dev/mxge/if_mxge.c b/sys/dev/mxge/if_mxge.c index 6e8ca67eb98..8a71c330609 100644 --- a/sys/dev/mxge/if_mxge.c +++ b/sys/dev/mxge/if_mxge.c @@ -3701,10 +3701,16 @@ mxge_setup_cfg_space(mxge_softc_t *sc) if (pci_find_extcap(dev, PCIY_EXPRESS, ®) == 0) { lnk = pci_read_config(dev, reg + 0x12, 2); sc->link_width = (lnk >> 4) & 0x3f; - - pectl = pci_read_config(dev, reg + 0x8, 2); - pectl = (pectl & ~0x7000) | (5 << 12); - pci_write_config(dev, reg + 0x8, pectl, 2); + + if (sc->pectl == 0) { + pectl = pci_read_config(dev, reg + 0x8, 2); + pectl = (pectl & ~0x7000) | (5 << 12); + pci_write_config(dev, reg + 0x8, pectl, 2); + sc->pectl = pectl; + } else { + /* restore saved pectl after watchdog reset */ + pci_write_config(dev, reg + 0x8, sc->pectl, 2); + } } /* Enable DMA and Memory space access */ @@ -3816,6 +3822,9 @@ mxge_watchdog_reset(mxge_softc_t *sc, int slice) /* release all TX locks */ for (s = 0; s < num_tx_slices; s++) { ss = &sc->ss[s]; +#ifdef IFNET_BUF_RING + mxge_start_locked(ss); +#endif mtx_unlock(&ss->tx.mtx); } } diff --git a/sys/dev/mxge/if_mxge_var.h b/sys/dev/mxge/if_mxge_var.h index b25adb4363c..698265b4abe 100644 --- a/sys/dev/mxge/if_mxge_var.h +++ b/sys/dev/mxge/if_mxge_var.h @@ -274,6 +274,7 @@ struct mxge_softc { struct sysctl_ctx_list slice_sysctl_ctx; char *mac_addr_string; uint8_t mac_addr[6]; /* eeprom mac address */ + uint16_t pectl; /* save PCIe CTL state */ char product_code_string[64]; char serial_number_string[64]; char cmd_mtx_name[16];