From 80ba994bfacd8a843af4eb9cb7558b62e8de26ee Mon Sep 17 00:00:00 2001 From: Andrew Turner Date: Mon, 14 Nov 2022 15:48:43 +0000 Subject: [PATCH] Add the arch field to the arm64 MIDR macros For completeness add accessors for the MIDR field. As the field is always 0xf on arm64 it is unneeded in the current MICR handling, but will be used in the vmm module for bhyve. Obtained from: https://github.com/FreeBSD-UPB/freebsd-src (earlier version) Sponsored by: The FreeBSD Foundation --- sys/arm64/include/cpu.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sys/arm64/include/cpu.h b/sys/arm64/include/cpu.h index 7dee5fa4cd2..2318c9d54cf 100644 --- a/sys/arm64/include/cpu.h +++ b/sys/arm64/include/cpu.h @@ -129,16 +129,19 @@ #define CPU_IMPL(midr) (((midr) >> 24) & 0xff) #define CPU_PART(midr) (((midr) >> 4) & 0xfff) #define CPU_VAR(midr) (((midr) >> 20) & 0xf) +#define CPU_ARCH(midr) (((midr) >> 16) & 0xf) #define CPU_REV(midr) (((midr) >> 0) & 0xf) #define CPU_IMPL_TO_MIDR(val) (((val) & 0xff) << 24) #define CPU_PART_TO_MIDR(val) (((val) & 0xfff) << 4) #define CPU_VAR_TO_MIDR(val) (((val) & 0xf) << 20) +#define CPU_ARCH_TO_MIDR(val) (((val) & 0xf) << 16) #define CPU_REV_TO_MIDR(val) (((val) & 0xf) << 0) #define CPU_IMPL_MASK (0xff << 24) #define CPU_PART_MASK (0xfff << 4) #define CPU_VAR_MASK (0xf << 20) +#define CPU_ARCH_MASK (0xf << 16) #define CPU_REV_MASK (0xf << 0) #define CPU_ID_RAW(impl, part, var, rev) \