mirror of
https://github.com/opnsense/src.git
synced 2026-05-28 04:12:45 -04:00
Add defines for the LAPIC TSC deadline timer mode. The LVT timer mode
field is two-bit, extend the mask. Also add comments about all MSRs writes to which are not serializing. Sponsored by: The FreeBSD Foundation
This commit is contained in:
parent
78b127f2fc
commit
7c4e76935e
2 changed files with 6 additions and 3 deletions
|
|
@ -399,10 +399,11 @@ typedef struct IOAPIC ioapic_t;
|
|||
#define APIC_LVTT_VECTOR 0x000000ff
|
||||
#define APIC_LVTT_DS 0x00001000
|
||||
#define APIC_LVTT_M 0x00010000
|
||||
#define APIC_LVTT_TM 0x00020000
|
||||
#define APIC_LVTT_TM 0x00060000
|
||||
# define APIC_LVTT_TM_ONE_SHOT 0x00000000
|
||||
# define APIC_LVTT_TM_PERIODIC 0x00020000
|
||||
|
||||
# define APIC_LVTT_TM_TSCDLT 0x00040000
|
||||
# define APIC_LVTT_TM_RSRV 0x00060000
|
||||
|
||||
/* APIC timer current count */
|
||||
#define APIC_TIMER_MAX_COUNT 0xffffffff
|
||||
|
|
|
|||
|
|
@ -457,6 +457,7 @@
|
|||
#define MSR_DRAM_ENERGY_STATUS 0x619
|
||||
#define MSR_PP0_ENERGY_STATUS 0x639
|
||||
#define MSR_PP1_ENERGY_STATUS 0x641
|
||||
#define MSR_TSC_DEADLINE 0x6e0 /* Writes are not serializing */
|
||||
|
||||
/*
|
||||
* VMX MSRs
|
||||
|
|
@ -478,7 +479,8 @@
|
|||
#define MSR_VMX_TRUE_ENTRY_CTLS 0x490
|
||||
|
||||
/*
|
||||
* X2APIC MSRs
|
||||
* X2APIC MSRs.
|
||||
* Writes are not serializing.
|
||||
*/
|
||||
#define MSR_APIC_000 0x800
|
||||
#define MSR_APIC_ID 0x802
|
||||
|
|
|
|||
Loading…
Reference in a new issue