From 77ffc4c1fcbdd32b61df26a47ca55ba2bd6be1d8 Mon Sep 17 00:00:00 2001 From: Adrian Chadd Date: Thu, 13 Sep 2012 07:24:14 +0000 Subject: [PATCH] Flip on half/quarter rate support. No, this isn't HT/5 and HT/10 support. This is the 11a half/quarter rate support primarily used by the 4.9GHz and GSM band regulatory domains. This is definitely a work in progress. TODO: * everything in the last commit; * lots more interoperability testing with the AR5212 half/quarter rate support for the relevant chips; * Do some interop testing on half/quarter rate support between _all_ the 11n chips - AR5416, AR9160, AR9280 (and AR9285/AR9287 when 2GHz half/quarter rate support is coded up.) --- sys/dev/ath/ath_hal/ar5416/ar5416_attach.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c b/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c index 8312c458e5b..10b68db9295 100644 --- a/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c +++ b/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c @@ -911,9 +911,9 @@ ar5416FillCapabilityInfo(struct ath_hal *ah) else pCap->halKeyCacheSize = AR5416_KEYTABLE_SIZE; - /* XXX not needed */ - pCap->halChanHalfRate = AH_FALSE; /* XXX ? */ - pCap->halChanQuarterRate = AH_FALSE; /* XXX ? */ + /* XXX Which chips? */ + pCap->halChanHalfRate = AH_TRUE; + pCap->halChanQuarterRate = AH_TRUE; pCap->halTstampPrecision = 32; pCap->halHwPhyCounterSupport = AH_TRUE;