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Fix TXFIFO register write and timeout message

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Changes:
- Fixed incorrect register write for TXFIFO invalidation (FSPI_IPRXFCR → FSPI_IPTXFCR).
- Corrected error message for TXFIFO wait timeout (FSPI_INTR_IPRXWA → FSPI_INTR_IPTXWE).
- Corrected comment for TXFIFO available (RXFIFO -> TXFIFO)

Reviewed-by: imp@FreeBSD.org
Reviewed-by: jlduran@FreeBSD.org
Pull-request: https://github.com/freebsd/freebsd-src/pull/1604
This commit is contained in:
Premal Gajjar 2025-02-24 19:16:13 +05:30 committed by Warner Losh
parent fa38579f31
commit 77be1f2fa6
1 changed files with 3 additions and 3 deletions
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6
sys/dev/flash/flexspi/flex_spi.c
View file

@ -329,20 +329,20 @@ flex_spi_write_txfifo(struct flex_spi_softc *sc, uint8_t *buf, uint8_t size)
int i, ret, reg;
/* invalid the TXFIFO */
write_reg(sc, FSPI_IPRXFCR, FSPI_IPTXFCR_CLR);
write_reg(sc, FSPI_IPTXFCR, FSPI_IPTXFCR_CLR);
/*
* Default value of water mark level is 8 bytes, hence in single
* read request controller can read max 8 bytes of data.
*/
for (i = 0; i < size; i += 4) {
/* Wait for RXFIFO available */
/* Wait for TXFIFO available */
if (i % 8 == 0) {
ret = reg_read_poll_tout(sc, FSPI_INTR, FSPI_INTR_IPTXWE,
1, 50000, 1);
if (ret)
device_printf(sc->dev,
"timed out waiting for FSPI_INTR_IPRXWA\n");
"timed out waiting for FSPI_INTR_IPTXWE\n");
}
if (size >= (i + 4))