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hwpmc_amd: simplify counter descriptor definitions
No functional change intended. Reviewed by: jkoshy MFC after: 1 week Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D41273
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d9e3fe3226
commit
75780146d6
1 changed files with 30 additions and 177 deletions
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@ -63,184 +63,37 @@ struct amd_descr {
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uint32_t pm_perfctr; /* address of PERFCTR register */
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};
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static struct amd_descr amd_pmcdesc[AMD_NPMCS] =
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/* Counter hardware. */
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#define PMCDESC(evsel, perfctr) \
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{ \
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.pm_descr = { \
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.pd_name = "", \
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.pd_class = -1, \
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.pd_caps = AMD_PMC_CAPS, \
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.pd_width = 48 \
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}, \
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.pm_evsel = (evsel), \
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.pm_perfctr = (perfctr) \
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}
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static struct amd_descr amd_pmcdesc[AMD_NPMCS] =
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{
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{
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.pm_descr =
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{
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.pd_name = "",
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.pd_class = -1,
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.pd_caps = AMD_PMC_CAPS,
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.pd_width = 48
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},
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.pm_evsel = AMD_PMC_EVSEL_0,
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.pm_perfctr = AMD_PMC_PERFCTR_0
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},
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{
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.pm_descr =
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{
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.pd_name = "",
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.pd_class = -1,
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.pd_caps = AMD_PMC_CAPS,
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.pd_width = 48
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},
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.pm_evsel = AMD_PMC_EVSEL_1,
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.pm_perfctr = AMD_PMC_PERFCTR_1
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},
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{
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.pm_descr =
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{
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.pd_name = "",
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.pd_class = -1,
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.pd_caps = AMD_PMC_CAPS,
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.pd_width = 48
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},
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.pm_evsel = AMD_PMC_EVSEL_2,
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.pm_perfctr = AMD_PMC_PERFCTR_2
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},
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{
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.pm_descr =
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{
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.pd_name = "",
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.pd_class = -1,
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.pd_caps = AMD_PMC_CAPS,
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.pd_width = 48
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},
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.pm_evsel = AMD_PMC_EVSEL_3,
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.pm_perfctr = AMD_PMC_PERFCTR_3
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},
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{
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.pm_descr =
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{
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.pd_name = "",
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.pd_class = -1,
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.pd_caps = AMD_PMC_CAPS,
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.pd_width = 48
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},
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.pm_evsel = AMD_PMC_EVSEL_4,
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.pm_perfctr = AMD_PMC_PERFCTR_4
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},
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{
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.pm_descr =
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{
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.pd_name = "",
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.pd_class = -1,
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.pd_caps = AMD_PMC_CAPS,
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.pd_width = 48
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},
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.pm_evsel = AMD_PMC_EVSEL_5,
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.pm_perfctr = AMD_PMC_PERFCTR_5
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},
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{
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.pm_descr =
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{
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.pd_name = "",
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.pd_class = -1,
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.pd_caps = AMD_PMC_CAPS,
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.pd_width = 48
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},
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.pm_evsel = AMD_PMC_EVSEL_EP_L3_0,
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.pm_perfctr = AMD_PMC_PERFCTR_EP_L3_0
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},
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{
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.pm_descr =
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{
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.pd_name = "",
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.pd_class = -1,
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.pd_caps = AMD_PMC_CAPS,
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.pd_width = 48
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},
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.pm_evsel = AMD_PMC_EVSEL_EP_L3_1,
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.pm_perfctr = AMD_PMC_PERFCTR_EP_L3_1
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},
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{
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.pm_descr =
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{
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.pd_name = "",
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.pd_class = -1,
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.pd_caps = AMD_PMC_CAPS,
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.pd_width = 48
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},
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.pm_evsel = AMD_PMC_EVSEL_EP_L3_2,
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.pm_perfctr = AMD_PMC_PERFCTR_EP_L3_2
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},
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{
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.pm_descr =
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{
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.pd_name = "",
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.pd_class = -1,
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.pd_caps = AMD_PMC_CAPS,
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.pd_width = 48
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},
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.pm_evsel = AMD_PMC_EVSEL_EP_L3_3,
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.pm_perfctr = AMD_PMC_PERFCTR_EP_L3_3
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},
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{
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.pm_descr =
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{
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.pd_name = "",
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.pd_class = -1,
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.pd_caps = AMD_PMC_CAPS,
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.pd_width = 48
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},
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.pm_evsel = AMD_PMC_EVSEL_EP_L3_4,
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.pm_perfctr = AMD_PMC_PERFCTR_EP_L3_4
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},
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{
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.pm_descr =
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{
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.pd_name = "",
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.pd_class = -1,
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.pd_caps = AMD_PMC_CAPS,
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.pd_width = 48
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},
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.pm_evsel = AMD_PMC_EVSEL_EP_L3_5,
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.pm_perfctr = AMD_PMC_PERFCTR_EP_L3_5
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},
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{
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.pm_descr =
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{
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.pd_name = "",
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.pd_class = -1,
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.pd_caps = AMD_PMC_CAPS,
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.pd_width = 48
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},
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.pm_evsel = AMD_PMC_EVSEL_EP_DF_0,
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.pm_perfctr = AMD_PMC_PERFCTR_EP_DF_0
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},
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{
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.pm_descr =
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{
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.pd_name = "",
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.pd_class = -1,
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.pd_caps = AMD_PMC_CAPS,
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.pd_width = 48
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},
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.pm_evsel = AMD_PMC_EVSEL_EP_DF_1,
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.pm_perfctr = AMD_PMC_PERFCTR_EP_DF_1
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},
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{
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.pm_descr =
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{
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.pd_name = "",
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.pd_class = -1,
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.pd_caps = AMD_PMC_CAPS,
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.pd_width = 48
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},
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.pm_evsel = AMD_PMC_EVSEL_EP_DF_2,
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.pm_perfctr = AMD_PMC_PERFCTR_EP_DF_2
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},
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{
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.pm_descr =
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{
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.pd_name = "",
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.pd_class = -1,
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.pd_caps = AMD_PMC_CAPS,
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.pd_width = 48
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},
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.pm_evsel = AMD_PMC_EVSEL_EP_DF_3,
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.pm_perfctr = AMD_PMC_PERFCTR_EP_DF_3
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}
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PMCDESC(AMD_PMC_EVSEL_0, AMD_PMC_PERFCTR_0),
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PMCDESC(AMD_PMC_EVSEL_1, AMD_PMC_PERFCTR_1),
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PMCDESC(AMD_PMC_EVSEL_2, AMD_PMC_PERFCTR_2),
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PMCDESC(AMD_PMC_EVSEL_3, AMD_PMC_PERFCTR_3),
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PMCDESC(AMD_PMC_EVSEL_4, AMD_PMC_PERFCTR_4),
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PMCDESC(AMD_PMC_EVSEL_5, AMD_PMC_PERFCTR_5),
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PMCDESC(AMD_PMC_EVSEL_EP_L3_0, AMD_PMC_PERFCTR_EP_L3_0),
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PMCDESC(AMD_PMC_EVSEL_EP_L3_1, AMD_PMC_PERFCTR_EP_L3_1),
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PMCDESC(AMD_PMC_EVSEL_EP_L3_2, AMD_PMC_PERFCTR_EP_L3_2),
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PMCDESC(AMD_PMC_EVSEL_EP_L3_3, AMD_PMC_PERFCTR_EP_L3_3),
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PMCDESC(AMD_PMC_EVSEL_EP_L3_4, AMD_PMC_PERFCTR_EP_L3_4),
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PMCDESC(AMD_PMC_EVSEL_EP_L3_5, AMD_PMC_PERFCTR_EP_L3_5),
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PMCDESC(AMD_PMC_EVSEL_EP_DF_0, AMD_PMC_PERFCTR_EP_DF_0),
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PMCDESC(AMD_PMC_EVSEL_EP_DF_1, AMD_PMC_PERFCTR_EP_DF_1),
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PMCDESC(AMD_PMC_EVSEL_EP_DF_2, AMD_PMC_PERFCTR_EP_DF_2),
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PMCDESC(AMD_PMC_EVSEL_EP_DF_3, AMD_PMC_PERFCTR_EP_DF_3)
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};
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struct amd_event_code_map {
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