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qat: fix typos and formatting issues

Browse source 
Multiple typos are corrected across the source code.
Formatting corrections are done to improve code quality
and maintainability. Some files which did not have proper
Copyright license are updated.

Reviewed by:	markj, ziaee
MFC after:	2 weeks
Sponsored by:   Intel Corporation
Differential Revision:  https://reviews.freebsd.org/D50379

(cherry picked from commit 25f09d4a9c)
This commit is contained in:
Hareshx Sankar Raj 2025-04-29 19:13:11 -04:00 committed by Franco Fichtner
parent 8204109737
commit 72d092010b
80 changed files with 385 additions and 467 deletions
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3
sys/dev/qat/include/common/adf_uio_cleanup.h
View file

@ -1,10 +1,9 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2023 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
#ifndef ADF_UIO_CLEANUP_H
#define ADF_UIO_CLEANUP_H
void adf_uio_do_cleanup_orphan(int bank,
struct adf_uio_control_accel *accel);
#endif

3
sys/dev/qat/include/common/adf_uio_control.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2023 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
#ifndef QAT_UIO_CONTROL_H
#define QAT_UIO_CONTROL_H
#include <sys/condvar.h>
@ -38,5 +38,4 @@ struct adf_uio_control_accel {
};
#endif /* end of include guard: QAT_UIO_CONTROL_H */

3
sys/dev/qat/qat/qat_ocf.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/* System headers */
#include <sys/param.h>
#include <sys/systm.h>
@ -1282,7 +1282,6 @@ static driver_t qat_ocf_driver = {
.size = sizeof(struct qat_ocf_softc),
};
DRIVER_MODULE_ORDERED(qat,
nexus,
qat_ocf_driver,

12
sys/dev/qat/qat_api/common/compression/dc_datapath.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
*****************************************************************************
* @file dc_datapath.c
@ -523,7 +523,7 @@ dcCheckOpData(sal_compression_service_t *pService, CpaDcOpData *pOpData)
if (CPA_TRUE == pOpData->integrityCrcCheck &&
NULL == pOpData->pCrcData) {
LAC_INVALID_PARAM_LOG("Integrity CRC data structure "
"not intialized in CpaDcOpData");
"not initialized in CpaDcOpData");
return CPA_STATUS_INVALID_PARAM;
}
@ -1401,7 +1401,6 @@ cpaDcCompressData(CpaInstanceHandle dcInstance,
CpaInstanceHandle insHandle = NULL;
Cpa64U srcBuffSize = 0;
if (CPA_INSTANCE_HANDLE_SINGLE == dcInstance) {
insHandle = dcGetFirstHandle();
} else {
@ -1507,7 +1506,6 @@ cpaDcCompressData2(CpaInstanceHandle dcInstance,
return CPA_STATUS_INVALID_PARAM;
}
if ((CPA_TRUE == pOpData->compressAndVerify) &&
(CPA_TRUE == pOpData->compressAndVerifyAndRecover) &&
(CPA_FALSE == pOpData->integrityCrcCheck)) {
@ -1526,7 +1524,6 @@ cpaDcCompressData2(CpaInstanceHandle dcInstance,
return CPA_STATUS_UNSUPPORTED;
}
if (CPA_INSTANCE_HANDLE_SINGLE == dcInstance) {
insHandle = dcGetFirstHandle();
} else {
@ -1703,7 +1700,6 @@ dcDecompressDataCheck(CpaInstanceHandle insHandle,
return CPA_STATUS_INVALID_PARAM;
}
*srcBufferSize = srcBuffSize;
return CPA_STATUS_SUCCESS;
@ -1724,7 +1720,6 @@ cpaDcDecompressData(CpaInstanceHandle dcInstance,
Cpa64U srcBuffSize = 0;
CpaStatus status = CPA_STATUS_SUCCESS;
if (CPA_INSTANCE_HANDLE_SINGLE == dcInstance) {
insHandle = dcGetFirstHandle();
} else {
@ -1783,7 +1778,6 @@ cpaDcDecompressData(CpaInstanceHandle dcInstance,
return CPA_STATUS_INVALID_PARAM;
}
if (CPA_DC_STATEFUL == pSessionDesc->sessState) {
/* Lock the session to check if there are in-flight stateful
* requests */
@ -1864,7 +1858,6 @@ cpaDcDecompressData2(CpaInstanceHandle dcInstance,
callbackTag);
}
if (CPA_INSTANCE_HANDLE_SINGLE == dcInstance) {
insHandle = dcGetFirstHandle();
} else {
@ -1931,7 +1924,6 @@ cpaDcDecompressData2(CpaInstanceHandle dcInstance,
return CPA_STATUS_INVALID_PARAM;
}
if (CPA_DC_STATEFUL == pSessionDesc->sessState) {
/* Lock the session to check if there are in-flight stateful
* requests */

26
sys/dev/qat/qat_api/common/crypto/sym/include/lac_session.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
*****************************************************************************
@ -56,7 +56,7 @@
* while there are requests in flight.
*
* <b>Reference Count</b>\n
* - The perform funcion increments the reference count for the session.
* - The perform function increments the reference count for the session.
* - The callback function decrements the reference count for the session.
* - The Remove function checks the reference count to ensure that it is 0.
*
@ -256,14 +256,14 @@ typedef struct lac_session_desc_s {
/**< Cipher slice type to be used, set at init session time */
Cpa8U cipherAesXtsKey1Forward[LAC_CIPHER_AES_XTS_KEY_MAX_LENGTH];
/**< Cached AES XTS Forward key
* For CPM2.0 AES XTS key convertion need to be done in SW.
* For CPM2.0 AES XTS key conversions need to be done in SW.
* Because use can update session direction at any time,
* also forward key needs to be cached
*/
Cpa8U cipherAesXtsKey1Reverse[LAC_CIPHER_AES_XTS_KEY_MAX_LENGTH];
/**< AES XTS Reverse key
* For CPM2.0 AES XTS key convertion need to be done in SW.
* Reverse key always will be calcilated at session setup time and
* For CPM2.0 AES XTS key conversions need to be done in SW.
* Reverse key always will be calculated at session setup time and
* cached to be used when needed */
Cpa8U cipherAesXtsKey2[LAC_CIPHER_AES_XTS_KEY_MAX_LENGTH];
/**< For AES XTS session need to store Key2 value in order to generate
@ -442,14 +442,14 @@ typedef struct lac_session_desc_d1_s {
/**< Cipher slice type to be used, set at init session time */
Cpa8U cipherAesXtsKey1Forward[LAC_CIPHER_AES_XTS_KEY_MAX_LENGTH];
/**< Cached AES XTS Forward key
* For CPM2.0 AES XTS key convertion need to be done in SW.
* For CPM2.0 AES XTS key conversions need to be done in SW.
* Because use can update session direction at any time,
* also forward key needs to be cached
*/
Cpa8U cipherAesXtsKey1Reverse[LAC_CIPHER_AES_XTS_KEY_MAX_LENGTH];
/**< AES XTS Reverse key
* For CPM2.0 AES XTS key convertion need to be done in SW.
* Reverse key always will be calcilated at session setup time and
* For CPM2.0 AES XTS key conversions need to be done in SW.
* Reverse key always will be calculated at session setup time and
* cached to be used when needed */
Cpa8U cipherAesXtsKey2[LAC_CIPHER_AES_XTS_KEY_MAX_LENGTH];
/**< For AES XTS session need to store Key2 value in order to generate
@ -594,14 +594,14 @@ typedef struct lac_session_desc_d2_s {
/**< Cipher slice type to be used, set at init session time */
Cpa8U cipherAesXtsKey1Forward[LAC_CIPHER_AES_XTS_KEY_MAX_LENGTH];
/**< Cached AES XTS Forward key
* For CPM2.0 AES XTS key convertion need to be done in SW.
* For CPM2.0 AES XTS key conversions need to be done in SW.
* Because use can update session direction at any time,
* also forward key needs to be cached
*/
Cpa8U cipherAesXtsKey1Reverse[LAC_CIPHER_AES_XTS_KEY_MAX_LENGTH];
/**< AES XTS Reverse key
* For CPM2.0 AES XTS key convertion need to be done in SW.
* Reverse key always will be calcilated at session setup time and
* For CPM2.0 AES XTS key conversions need to be done in SW.
* Reverse key always will be calculated at session setup time and
* cached to be used when needed */
Cpa8U cipherAesXtsKey2[LAC_CIPHER_AES_XTS_KEY_MAX_LENGTH];
/**< For AES XTS session need to store Key2 value in order to generate
@ -625,7 +625,7 @@ typedef struct lac_session_desc_d2_s {
sizeof(LAC_ARCH_UINT))
/**< @ingroup LacSym_Session
* Size of the memory that the client has to allocate for a session. Extra
* memory is needed to internally re-align the data. The pointer to the algined
* memory is needed to internally re-align the data. The pointer to the aligned
* data is stored at the start of the user allocated memory hence the extra
* space for an LAC_ARCH_UINT */
@ -669,7 +669,7 @@ typedef struct lac_session_desc_d2_s {
*
* @param[in] instanceHandle_in Instance Handle
* @param[in] pSymCb callback function
* @param[in] pSessionSetupData pointer to the strucutre containing the setup
* @param[in] pSessionSetupData pointer to the structure containing the setup
*data
* @param[in] isDpSession CPA_TRUE for a data plane session
* @param[out] pSessionCtx Pointer to session context

12
sys/dev/qat/qat_api/common/crypto/sym/include/lac_sym.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
***************************************************************************
@ -18,7 +18,7 @@
* The symmetric component demuliplexes the following crypto operations to
* the appropriate sub-components: cipher, hash, algorithm chaining and
* authentication encryption. It is a common layer between the above
* mentioned components where common resources are allocated and paramater
* mentioned components where common resources are allocated and parameter
* checks are done. The operation specific resource allocation and parameter
* checks are done in the sub-component itself.
*
@ -32,15 +32,15 @@
* chain to ensure it is valid.
* - \ref LacSymStats "Statistics": Manages statistics for symmetric
* - \ref LacSymQat "Symmetric QAT": The symmetric qat component is
* initialiased by the symmetric component.
* - \ref LacCipher "Cipher" : demultiplex cipher opertions to this component.
* - \ref LacHash "Hash" : demultiplex hash opertions to this component.
* initialised by the symmetric component.
* - \ref LacCipher "Cipher" : demultiplex cipher operations to this component.
* - \ref LacHash "Hash" : demultiplex hash operations to this component.
* to this component.
* - \ref LacAlgChain "Algorithm Chaining": The algorithm chaining component
* - OSAL : Memory allocation, Mutex's, atomics
*
* @lld_initialisation
* This component is initialied during the LAC initialisation sequence. It
* This component is initialized during the LAC initialisation sequence. It
* initialises the session table, statistics, symmetric QAT, initialises the
* hash definitions lookup table, the hash alg supported lookup table and
* registers a callback function with the symmetric response handler to process

7
sys/dev/qat/qat_api/common/crypto/sym/include/lac_sym_alg_chain.h
View file

@ -1,8 +1,5 @@
/***************************************************************************
*
* <COPYRIGHT_TAG>
*
***************************************************************************/
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
*****************************************************************************

6
sys/dev/qat/qat_api/common/crypto/sym/include/lac_sym_cb.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
***************************************************************************
@ -21,7 +21,7 @@
* Dequeue pending requests
* @description
* This function is called by a callback function of a blocking
* operation (either a partial packet or a hash precompute operaion)
* operation (either a partial packet or a hash precompute operation)
* in softIRQ context. It dequeues requests for the following reasons:
* 1. All pre-computes that happened when initialising a session
* have completed. Dequeue any requests that were queued on the
@ -40,7 +40,7 @@ CpaStatus LacSymCb_PendingReqsDequeue(lac_session_desc_t *pSessionDesc);
/**
*****************************************************************************
* @ingroup LacSym
* Register symmetric callback funcion handlers
* Register symmetric callback function handlers
*
* @description
* This function registers the symmetric callback handler functions with

6
sys/dev/qat/qat_api/common/crypto/sym/include/lac_sym_cipher.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
*****************************************************************************
@ -23,14 +23,14 @@
* and Triple-DES cipher algorithms, in ECB, CBC and CTR modes. The ARC4 stream
* cipher algorithm is also supported. Data may be provided as a full packet,
* or as a sequence of partial packets. The result of the operation can be
* written back to the source buffer (in-place) or to a seperate output buffer
* written back to the source buffer (in-place) or to a separate output buffer
* (out-of-place). Data must be encapsulated in ICP buffers.
*
* The cipher component is responsible for implementing the cipher-specific
* functionality for registering and de-registering a session, for the perform
* operation and for processing the QAT responses to cipher requests. Statistics
* are maintained for cipher in the symmetric \ref CpaCySymStats64 "stats"
* structure. This module has been seperated out into two. The cipher QAT module
* structure. This module has been separated out into two. The cipher QAT module
* deals entirely with QAT data structures. The cipher module itself has minimal
* exposure to the QAT data structures.
*

13
sys/dev/qat/qat_api/common/crypto/sym/include/lac_sym_hash.h
View file

@ -1,8 +1,5 @@
/***************************************************************************
*
* <COPYRIGHT_TAG>
*
***************************************************************************/
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
*****************************************************************************
@ -24,7 +21,7 @@
*
* The hash component supports hashing in 3 modes. PLAIN, AUTH and NESTED.
* Plain mode is used to provide data integrity while auth mode is used to
* provide integrity as well as its authenticity. Nested mode is inteded
* provide integrity as well as its authenticity. Nested mode is intended
* for use by non standard HMAC like algorithms such as for the SSL master
* key secret. Partial packets is supported for both plain and auth modes.
* In-place and out-of-place processing is supported for all modes. The
@ -33,7 +30,7 @@
* The hash component is responsible for implementing the hash specific
* functionality for initialising a session and for a perform operation.
* Statistics are maintained in the symmetric \ref CpaCySymStats64 "stats"
* structure. This module has been seperated out into two. The hash QAT module
* structure. This module has been separated out into two. The hash QAT module
* deals entirely with QAT data structures. The hash module itself has minimal
* exposure to the QAT data structures.
*
@ -62,7 +59,7 @@
* the data path by the length of time it takes to do two hashes on a block
* size of data. Note: a partial packet operation generates an intermediate
* state. The final operation on a partial packet or when a full packet is
* used applies padding and gives the final hash result. Esentially for the
* used applies padding and gives the final hash result. Essentially for the
* inner hash, a partial packet final is issued on the data, using the
* precomputed intermediate state and returns the digest.
*

4
sys/dev/qat/qat_api/common/crypto/sym/include/lac_sym_hash_defs.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
***************************************************************************
@ -313,7 +313,7 @@
/**< @ingroup LacSymQatHash
* Macro to check for qat hash mode is set to 2 and the hash mode is
* Auth. This applies to HMAC algorithms (no pre compute). This is used
* to differntiate between TLS and HMAC */
* to differentiate between TLS and HMAC */
#define IS_HASH_MODE_2_NESTED(qatHashMode, hashMode) \
((IS_HASH_MODE_2(qatHashMode)) && \

6
sys/dev/qat/qat_api/common/crypto/sym/include/lac_sym_hash_precomputes.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
***************************************************************************
@ -34,7 +34,7 @@
/**< maximum size of the working data for the HMAC precompute operations
*
* Maximum size of lac_sym_hash_precomp_op_data_t is 264 bytes. For hash
* precomputes there are 2 of these structrues and a further
* precomputes there are 2 of these structures and a further
* lac_sym_hash_precomp_op_t structure required. This comes to a total of 536
* bytes.
* For the asynchronous version of the precomputes, the memory for the hash
@ -122,7 +122,7 @@ typedef struct lac_sym_hash_aes_precomp_qat_s {
Cpa8U contentDesc[LAC_SYM_QAT_MAX_CIPHER_SETUP_BLK_SZ];
/**< Content descriptor for a cipher operation */
Cpa8U data[LAC_SYM_HASH_PRECOMP_MAX_AES_ECB_DATA];
/**< The data to be ciphered is conatined here and the result is
/**< The data to be ciphered is contained here and the result is
* written in place back into this buffer */
icp_qat_fw_la_cipher_req_params_t cipherReqParams;
/**< Request parameters as read in by the QAT */

21
sys/dev/qat/qat_api/common/crypto/sym/include/lac_sym_key.h
View file

@ -1,8 +1,5 @@
/***************************************************************************
*
* <COPYRIGHT_TAG>
*
***************************************************************************/
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
*****************************************************************************
@ -16,7 +13,7 @@
*
* @lld_overview
*
* Key generation component is reponsible for SSL, TLS & MGF operations. All
* Key generation component is responsible for SSL, TLS & MGF operations. All
* memory required for the keygen operations is got from the keygen cookie
* structure which is carved up as required.
*
@ -24,8 +21,8 @@
* outer hash and SHA1 as the inner hash.
*
* Refer to sections in draft-freier-ssl-version3-02.txt:
* 6.1 Asymmetric cryptographic computations - This refers to coverting
* the pre master secret to the master secret.
* 6.1 Asymmetric cryptographic computations - This refers to converting
* the pre-master secret to the master secret.
* 6.2.2 Converting the master secret into keys and MAC secrets - Using
* the master secret to generate the key material.
*
@ -40,11 +37,11 @@
*
* @lld_dependencies
* \ref LacSymQatHash: for building up hash content descriptor
* \ref LacMem: for virt to phys coversions
* \ref LacMem: for virt to phys conversions
*
* @lld_initialisation
* The reponse handler is registered with Symmetric. The Maximum SSL is
* allocated. A structure is allocated containing all the TLS lables that
* The response handler is registered with Symmetric. The Maximum SSL is
* allocated. A structure is allocated containing all the TLS labels that
* are supported. On shutdown the memory for these structures are freed.
*
* @lld_module_algorithms
@ -115,7 +112,7 @@
*
* @description
* This structure is used to hold the various TLS labels. Each field is
* on an 8 byte boundary provided the structure itslef is 8 bytes aligned.
* on an 8 byte boundary provided the structure itself is 8 bytes aligned.
*****************************************************************************/
typedef struct lac_sym_key_tls_labels_s {
Cpa8U masterSecret[ICP_QAT_FW_LA_TLS_LABEL_LEN_MAX];

4
sys/dev/qat/qat_api/common/crypto/sym/include/lac_sym_partial.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
***************************************************************************
@ -20,7 +20,7 @@
* proceed where they would get an incorrect digest, cipher result.
*
* Maintain a SpinLock for partials in flight per session. Try and acquire this
* SpinLock. If it cant be acquired return an error straight away to the client
* SpinLock. If it can't be acquired return an error straight away to the client
* as there is already a partial in flight. There is no blocking in the data
* path for this.
*

4
sys/dev/qat/qat_api/common/crypto/sym/include/lac_sym_qat.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
*****************************************************************************
@ -24,7 +24,7 @@
* - \ref LacMem "Memory" - Inline memory functions
*
* @lld_initialisation
* This component is initialied during the LAC initialisation sequence. It
* This component is initialized during the LAC initialisation sequence. It
* is called by the Symmetric Initialisation function.
*
* @lld_module_algorithms

4
sys/dev/qat/qat_api/common/crypto/sym/include/lac_sym_qat_cipher.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
*****************************************************************************
@ -172,7 +172,7 @@ void LacSymQat_CipherXTSModeUpdateKeyLen(lac_session_desc_t *pSessionDesc,
* LacSymQat_CipherCtrlBlockInitialize()
*
* @description
* intialize the cipher control block with all zeros
* initialize the cipher control block with all zeros
*
* @param[in] pMsg Pointer to the common request message
*

6
sys/dev/qat/qat_api/common/crypto/sym/include/lac_sym_qat_hash.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
*****************************************************************************
@ -42,7 +42,7 @@
* hash precomputes
*
* @description
* This structure contains infomation on the hash precomputes
* This structure contains information on the hash precomputes
*
*****************************************************************************/
typedef struct lac_sym_qat_hash_precompute_info_s {
@ -62,7 +62,7 @@ typedef struct lac_sym_qat_hash_precompute_info_s {
* hash state prefix buffer info
*
* @description
* This structure contains infomation on the hash state prefix aad buffer
* This structure contains information on the hash state prefix aad buffer
*
*****************************************************************************/
typedef struct lac_sym_qat_hash_state_buffer_info_s {

4
sys/dev/qat/qat_api/common/crypto/sym/include/lac_sym_qat_hash_defs_lookup.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
*****************************************************************************
@ -117,7 +117,7 @@ void LacSymQat_HashAlgLookupGet(CpaInstanceHandle instanceHandle,
/**
*******************************************************************************
* @ingroup LacSymQatHashDefsLookup
* get hash defintions from lookup table.
* get hash definitions from lookup table.
*
* @description
* This function looks up the hash lookup array for a structure

6
sys/dev/qat/qat_api/common/crypto/sym/include/lac_sym_stats.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
***************************************************************************
@ -9,7 +9,7 @@
*
* @ingroup LacSym
*
* Symetric Common consists of common statistics, buffer and partial packet
* Symmetric Common consists of common statistics, buffer and partial packet
* functionality.
*
***************************************************************************/
@ -123,7 +123,7 @@ void LacSym_StatsFree(CpaInstanceHandle instanceHandle);
/**
*******************************************************************************
* @ingroup LacSymStats
* Inrement a stat
* Increment a stat
*
* @description
* This function incrementes a stat for a specific engine.

22
sys/dev/qat/qat_api/common/crypto/sym/key/lac_sym_key.c
View file

@ -1,8 +1,5 @@
/***************************************************************************
*
* <COPYRIGHT_TAG>
*
***************************************************************************/
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
*****************************************************************************
@ -365,7 +362,6 @@ cpaCyKeyGenQueryStats(CpaInstanceHandle instanceHandle_in,
{
CpaInstanceHandle instanceHandle = NULL;
if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle_in) {
instanceHandle =
Lac_GetFirstHandle(SAL_SERVICE_TYPE_CRYPTO_SYM);
@ -393,7 +389,6 @@ cpaCyKeyGenQueryStats64(CpaInstanceHandle instanceHandle_in,
{
CpaInstanceHandle instanceHandle = NULL;
if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle_in) {
instanceHandle =
Lac_GetFirstHandle(SAL_SERVICE_TYPE_CRYPTO_SYM);
@ -917,7 +912,6 @@ cpaCyKeyGenMgf(const CpaInstanceHandle instanceHandle_in,
{
CpaInstanceHandle instanceHandle = NULL;
if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle_in) {
instanceHandle =
Lac_GetFirstHandle(SAL_SERVICE_TYPE_CRYPTO_SYM);
@ -956,7 +950,6 @@ cpaCyKeyGenMgfExt(const CpaInstanceHandle instanceHandle_in,
{
CpaInstanceHandle instanceHandle = NULL;
if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle_in) {
instanceHandle =
Lac_GetFirstHandle(SAL_SERVICE_TYPE_CRYPTO_SYM);
@ -2194,11 +2187,11 @@ LacSymKey_CheckParamSslTls(const void *pKeyGenOpData,
/* Api max value */
/* ICP_QAT_FW_LA_TLS_V1_1_SECRET_LEN_MAX needs to be
* multiplied
* by 4 in order to verifiy the 512 conditions. We did
* by 4 in order to verify the 512 conditions. We did
* not change
* ICP_QAT_FW_LA_TLS_V1_1_SECRET_LEN_MAX as it
* represents
* the max value tha firmware can handle.
* the max value that firmware can handle.
*/
maxSecretLen =
ICP_QAT_FW_LA_TLS_V1_1_SECRET_LEN_MAX * 4;
@ -2206,11 +2199,11 @@ LacSymKey_CheckParamSslTls(const void *pKeyGenOpData,
/* Api max value */
/* ICP_QAT_FW_LA_TLS_V1_2_SECRET_LEN_MAX needs to be
* multiplied
* by 8 in order to verifiy the 512 conditions. We did
* by 8 in order to verify the 512 conditions. We did
* not change
* ICP_QAT_FW_LA_TLS_V1_2_SECRET_LEN_MAX as it
* represents
* the max value tha firmware can handle.
* the max value that firmware can handle.
*/
maxSecretLen =
ICP_QAT_FW_LA_TLS_V1_2_SECRET_LEN_MAX * 8;
@ -2596,7 +2589,6 @@ cpaCyKeyGenTls(const CpaInstanceHandle instanceHandle_in,
{
CpaInstanceHandle instanceHandle = NULL;
if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle_in) {
instanceHandle =
Lac_GetFirstHandle(SAL_SERVICE_TYPE_CRYPTO_SYM);
@ -2669,7 +2661,6 @@ cpaCyKeyGenTls2(const CpaInstanceHandle instanceHandle_in,
{
CpaInstanceHandle instanceHandle = NULL;
if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle_in) {
instanceHandle =
Lac_GetFirstHandle(SAL_SERVICE_TYPE_CRYPTO_SYM);
@ -2756,7 +2747,6 @@ cpaCyKeyGenTls3(const CpaInstanceHandle instanceHandle_in,
return CPA_STATUS_INVALID_PARAM;
}
return LacSymKey_KeyGenSslTls(instanceHandle_in,
pKeyGenCb,
pCallbackTag,

10
sys/dev/qat/qat_api/common/crypto/sym/lac_sym_alg_chain.c
View file

@ -1,8 +1,5 @@
/***************************************************************************
*
* <COPYRIGHT_TAG>
*
***************************************************************************/
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
***************************************************************************
@ -403,7 +400,6 @@ LacAlgChain_HashCDBuild(
&sizeInBytes);
}
}
static Cpa16U
LacAlgChain_GetCipherConfigSize(lac_session_desc_t *pSessionDesc)
{
@ -1178,7 +1174,7 @@ LacAlgChain_SessionInit(const CpaInstanceHandle instanceHandle,
&cipherOffsetInConstantsTable,
&hashOffsetInConstantsTable);
/* for a certain combination of Algorthm Chaining we want to
/* for a certain combination of Algorithm Chaining we want to
use an optimised cd block */
if (pSessionDesc->symOperation ==

14
sys/dev/qat/qat_api/common/crypto/sym/lac_sym_api.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
***************************************************************************
@ -336,7 +336,6 @@ LacSymSession_ParamCheck(const CpaInstanceHandle instanceHandle,
return CPA_STATUS_SUCCESS;
}
/**
* @ingroup LacSym
* Function which perform parameter checks on data buffers for symmetric
@ -445,7 +444,7 @@ LacSymPerform_BufferParamCheck(const CpaBufferList *const pSrcBuffer,
}
}
/* check for partial packet suport for the session operation */
/* check for partial packet support for the session operation */
if (CPA_CY_SYM_PACKET_TYPE_FULL != pOpData->packetType) {
if (CPA_FALSE == pSessionDesc->isPartialSupported) {
/* return out here to simplify cleanup */
@ -569,7 +568,6 @@ LacSym_InitSession(const CpaInstanceHandle instanceHandle,
return CPA_STATUS_INVALID_PARAM;
}
pCipherSetupData = &pSessionSetupData->cipherSetupData;
pHashSetupData = &pSessionSetupData->hashSetupData;
@ -673,7 +671,6 @@ cpaCySymRemoveSession(const CpaInstanceHandle instanceHandle_in,
CpaInstanceHandle instanceHandle = NULL;
Cpa64U numPendingRequests = 0;
if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle_in) {
instanceHandle =
Lac_GetFirstHandle(SAL_SERVICE_TYPE_CRYPTO_SYM);
@ -794,7 +791,6 @@ LacSym_Perform(const CpaInstanceHandle instanceHandle,
}
}
/* If synchronous Operation - Callback function stored in the session
* descriptor so a flag is set in the perform to indicate that
* the perform is being re-called for the synchronous operation */
@ -872,7 +868,7 @@ LacSym_Perform(const CpaInstanceHandle instanceHandle,
pVerifyResult);
if (CPA_STATUS_SUCCESS == status) {
/* check for partial packet suport for the session operation */
/* check for partial packet support for the session operation */
if (CPA_CY_SYM_PACKET_TYPE_FULL != pOpData->packetType) {
LacSym_PartialPacketStateUpdate(
pOpData->packetType, &pSessionDesc->partialState);
@ -923,7 +919,6 @@ cpaCySymQueryStats(const CpaInstanceHandle instanceHandle_in,
CpaInstanceHandle instanceHandle = NULL;
if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle_in) {
instanceHandle =
Lac_GetFirstHandle(SAL_SERVICE_TYPE_CRYPTO_SYM);
@ -955,7 +950,6 @@ cpaCySymQueryStats64(const CpaInstanceHandle instanceHandle_in,
CpaInstanceHandle instanceHandle = NULL;
if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle_in) {
instanceHandle =
Lac_GetFirstHandle(SAL_SERVICE_TYPE_CRYPTO_SYM);
@ -1037,7 +1031,6 @@ cpaCySymSessionCtxGetDynamicSize(
/* Choose Session Context size */
getCtxSize(pSessionSetupData, pSessionCtxSizeInBytes);
return CPA_STATUS_SUCCESS;
}
@ -1116,6 +1109,5 @@ cpaCyBufferListGetMetaSize(const CpaInstanceHandle instanceHandle_in,
(sizeof(icp_flat_buffer_desc_t) * numBuffers) +
ICP_DESCRIPTOR_ALIGNMENT_BYTES;
return CPA_STATUS_SUCCESS;
}

3
sys/dev/qat/qat_api/common/crypto/sym/lac_sym_auth_enc.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
***************************************************************************
@ -91,7 +91,6 @@ LacSymAlgChain_CheckCCMData(Cpa8U *pAdditionalAuthData,
return CPA_STATUS_SUCCESS;
}
/**
* @ingroup LacAuthEnc
*/

15
sys/dev/qat/qat_api/common/crypto/sym/lac_sym_cb.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
***************************************************************************
@ -296,7 +296,7 @@ LacSymCb_ProcessDpCallback(CpaCySymDpOpData *pResponse,
/* For CCM and GCM, if qatRespStatusOkFlag is false, the data has to be
* cleaned as stated in RFC 3610; in DP mode, it is the user
* responsability to do so */
* responsibility to do so */
if (((CPA_CY_SYM_OP_CIPHER == pSessionDesc->symOperation) &&
SPC != pSessionDesc->singlePassState) ||
@ -450,12 +450,11 @@ LacSymCb_PendingReqsDequeue(lac_session_desc_t *pSessionDesc)
}
/*
* Now we'll attempt to send the message directly to QAT. We'll
* keep looing until it succeeds (or at least a very high number
* of retries), as the failure only happens when the ring is
* full, and this is only a temporary situation. After a few
* retries, space will become availble, allowing the putMsg to
* succeed.
* Now we'll attempt to send the message directly to QAT. We'll keep
* looking until it succeeds (or at least a very high number of
* retries), as the failure only happens when the ring is full,
* and this is only a temporary situation. After a few retries,
* space will become available, allowing the putMsg to succeed.
*/
retries = 0;
do {

7
sys/dev/qat/qat_api/common/crypto/sym/lac_sym_cipher.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
***************************************************************************
@ -143,7 +143,7 @@ LacCipher_PerformIvCheck(sal_service_t *pService,
CPA_TRUE;
}
/* For subsequent partials in a sequence, we'll
* re-use the IV that was written back by the
* reuse the IV that was written back by the
* QAT, using internal request queueing if
* necessary to ensure that the next partial
* request isn't issued to the QAT until the
@ -215,7 +215,6 @@ LacCipher_PerformIvCheck(sal_service_t *pService,
return CPA_STATUS_SUCCESS;
}
CpaStatus
LacCipher_SessionSetupDataCheck(const CpaCySymCipherSetupData *pCipherSetupData,
Cpa32U capabilitiesMask)
@ -440,7 +439,7 @@ LacCipher_GetCipherSliceType(sal_crypto_service_t *pService,
Cpa32U capabilitiesMask =
pService->generic_service_info.capabilitiesMask;
/* UCS Slice is supproted only in Gen4 */
/* UCS Slice is supported only in Gen4 */
if (isCyGen4x(pService)) {
if (LAC_CIPHER_IS_XTS_MODE(cipherAlgorithm) ||
LAC_CIPHER_IS_CHACHA(cipherAlgorithm) ||

7
sys/dev/qat/qat_api/common/crypto/sym/lac_sym_compile_check.c
View file

@ -1,8 +1,5 @@
/***************************************************************************
*
* <COPYRIGHT_TAG>
*
***************************************************************************/
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
***************************************************************************

7
sys/dev/qat/qat_api/common/crypto/sym/lac_sym_dp.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
***************************************************************************
@ -962,7 +962,6 @@ cpaCySymDpInitSession(CpaInstanceHandle instanceHandle,
CpaStatus status = CPA_STATUS_FAIL;
sal_service_t *pService = NULL;
LAC_CHECK_INSTANCE_HANDLE(instanceHandle);
SAL_CHECK_INSTANCE_TYPE(instanceHandle,
(SAL_SERVICE_TYPE_CRYPTO |
@ -999,7 +998,6 @@ cpaCySymDpRegCbFunc(const CpaInstanceHandle instanceHandle,
{
sal_crypto_service_t *pService = (sal_crypto_service_t *)instanceHandle;
LAC_CHECK_INSTANCE_HANDLE(instanceHandle);
SAL_CHECK_INSTANCE_TYPE(instanceHandle,
(SAL_SERVICE_TYPE_CRYPTO |
@ -1021,7 +1019,6 @@ cpaCySymDpEnqueueOp(CpaCySymDpOpData *pRequest, const CpaBoolean performOpNow)
CpaStatus status = CPA_STATUS_SUCCESS;
LAC_CHECK_NULL_PARAM(pRequest);
status = LacDp_EnqueueParamCheck(pRequest);
if (CPA_STATUS_SUCCESS != status) {
@ -1064,7 +1061,6 @@ cpaCySymDpPerformOpNow(const CpaInstanceHandle instanceHandle)
{
icp_comms_trans_handle trans_handle = NULL;
LAC_CHECK_INSTANCE_HANDLE(instanceHandle);
SAL_CHECK_INSTANCE_TYPE(instanceHandle,
(SAL_SERVICE_TYPE_CRYPTO |
@ -1097,7 +1093,6 @@ cpaCySymDpEnqueueOpBatch(const Cpa32U numberRequests,
CpaStatus status = CPA_STATUS_SUCCESS;
sal_crypto_service_t *pService = NULL;
LAC_CHECK_NULL_PARAM(pRequests);
LAC_CHECK_NULL_PARAM(pRequests[0]);
LAC_CHECK_NULL_PARAM(pRequests[0]->instanceHandle);

3
sys/dev/qat/qat_api/common/crypto/sym/lac_sym_hash.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
***************************************************************************
@ -366,7 +366,6 @@ LacHash_PrecomputeDataCreate(const CpaInstanceHandle instanceHandle,
return status;
}
/** @ingroup LacHash */
CpaStatus
LacHash_HashContextCheck(CpaInstanceHandle instanceHandle,

4
sys/dev/qat/qat_api/common/crypto/sym/lac_sym_hash_sw_precomputes.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
***************************************************************************
@ -53,7 +53,7 @@ LacSymHash_Compute(CpaCySymHashAlgorithm hashAlgorithm,
* Note: from SHA hashes appropriate endian swapping is required.
* For sha1, sha224 and sha256 double words based swapping.
* For sha384 and sha512 quad words swapping.
* No endianes swapping for md5 is required.
* No endianness swapping for md5 is required.
*/
CpaStatus status = CPA_STATUS_FAIL;
Cpa32U i = 0;

4
sys/dev/qat/qat_api/common/crypto/sym/lac_sym_queue.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
***************************************************************************
@ -111,7 +111,7 @@ LacSymQueue_RequestSend(const CpaInstanceHandle instanceHandle,
*/
if (CPA_CY_SYM_PACKET_TYPE_FULL !=
pRequest->pOpData->packetType) {
/* Select blocking operations which this reqest will
/* Select blocking operations which this request will
* complete */
pSessionDesc->nonBlockingOpsInProgress = CPA_FALSE;
}

6
sys/dev/qat/qat_api/common/crypto/sym/qat/lac_sym_qat.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
*****************************************************************************
@ -244,7 +244,7 @@ LacSymQat_UseSymConstantsTable(lac_session_desc_t *pSession,
*pCipherOffset = 0;
*pHashOffset = 0;
/* for chaining can we use the optimised content descritor */
/* for chaining can we use the optimised content descriptor */
if (pSession->laCmdId == ICP_QAT_FW_LA_CMD_CIPHER_HASH ||
pSession->laCmdId == ICP_QAT_FW_LA_CMD_HASH_CIPHER) {
useOptimisedContentDesc =
@ -297,7 +297,7 @@ LacSymQat_UseSymConstantsTable(lac_session_desc_t *pSession,
(pSession->qatHashMode == ICP_QAT_HW_AUTH_MODE1)) {
/* we can only use the SHA1-mode1 in the SHRAM constants
* table when
* we are using the opimised content desc */
* we are using the optimised content desc */
return CPA_FALSE;
}

23
sys/dev/qat/qat_api/common/crypto/sym/qat/lac_sym_qat_cipher.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
***************************************************************************
@ -478,7 +478,7 @@ LacSymQat_CipherCtrlBlockWrite(icp_qat_la_bulk_req_ftr_t *pMsg,
in this case, and add padding. It makes no sense
to force applications to provide such key length for couple reasons:
1. It won't be possible to distinguish between AES 192 and 256 based
on key lenght only
on key length only
2. Only some modes of AES will use UCS slice, then application will
have to know which ones */
if (ICP_QAT_FW_LA_USE_UCS_SLICE_TYPE == sliceType &&
@ -657,12 +657,11 @@ LacSymQat_CipherHwBlockPopulateKeySetup(
/* Special handling of AES 192 key for UCS slice.
UCS requires it to have 32 bytes - set is as targetKeyLen
in this case, and add padding. It makes no sense
to force applications to provide such key length for couple
reasons:
1. It won't be possible to distinguish between AES 192 and
256 based on key lenght only
2. Only some modes of AES will use UCS slice, then
application will have to know which ones */
to force applications to provide such key length for couple reasons:
1. It won't be possible to distinguish between AES 192 and 256 based
on key length only
2. Only some modes of AES will use UCS slice, then application will
have to know which ones */
if (ICP_QAT_FW_LA_USE_UCS_SLICE_TYPE == sliceType &&
ICP_QAT_HW_AES_192_KEY_SZ == targetKeyLenInBytes) {
targetKeyLenInBytes = ICP_QAT_HW_UCS_AES_192_KEY_SZ;
@ -918,10 +917,10 @@ LacSymQat_CipherRequestParamsPopulate(lac_session_desc_t *pSessionDesc,
/* Populate the field with the contents of the buffer,
* zero field first as data may be smaller than the field */
/* In case of XTS mode using UCS slice always embedd IV.
* IV provided by user needs to be encrypted to calculate
* initial tweak, use pCipherReqParams->u.cipher_IV_array as
* destination buffer for tweak value */
/* In case of XTS mode using UCS slice always encrypt the embedded IV.
* IV provided by user needs to be encrypted to calculate initial tweak,
* use pCipherReqParams->u.cipher_IV_array as destination buffer for
* tweak value */
if (ICP_QAT_FW_LA_USE_UCS_SLICE_TYPE ==
pSessionDesc->cipherSliceType &&
LAC_CIPHER_IS_XTS_MODE(pSessionDesc->cipherAlgorithm)) {

8
sys/dev/qat/qat_api/common/crypto/sym/qat/lac_sym_qat_hash_defs_lookup.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
***************************************************************************
@ -42,7 +42,7 @@ typedef struct lac_sym_qat_hash_def_map_s {
CpaCySymHashAlgorithm hashAlgorithm;
/* hash algorithm */
lac_sym_qat_hash_defs_t hashDefs;
/* hash defintions pointers */
/* hash definitions pointers */
} lac_sym_qat_hash_def_map_t;
/*
@ -219,7 +219,7 @@ static lac_sym_qat_hash_alg_info_t sm3Info = { LAC_HASH_SM3_DIGEST_SIZE,
static lac_sym_qat_hash_alg_info_t polyInfo = { LAC_HASH_POLY_DIGEST_SIZE,
LAC_HASH_POLY_BLOCK_SIZE,
NULL, /* intial state */
NULL, /* initial state */
LAC_HASH_POLY_STATE_SIZE };
static lac_sym_qat_hash_alg_info_t xcbcMacInfo = {
@ -239,7 +239,7 @@ static lac_sym_qat_hash_alg_info_t aesCmacInfo = {
static lac_sym_qat_hash_alg_info_t aesCcmInfo = {
LAC_HASH_AES_CCM_DIGEST_SIZE,
LAC_HASH_AES_CCM_BLOCK_SIZE,
NULL, /* intial state */
NULL, /* initial state */
0 /* state size */
};

22
sys/dev/qat/qat_api/common/ctrl/sal_crypto.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
***************************************************************************
@ -88,7 +88,6 @@ Lac_CryptoGetFirstHandle(void)
return instHandle;
}
/* Function to release the sym handles. */
static CpaStatus
SalCtrl_SymReleaseTransHandle(sal_service_t *service)
@ -116,7 +115,6 @@ SalCtrl_SymReleaseTransHandle(sal_service_t *service)
return ret_status;
}
/*
* @ingroup sal_crypto
* Frees resources (memory and transhandles) if allocated
@ -153,7 +151,6 @@ SalCtrl_SymFreeResources(sal_crypto_service_t *pCryptoService)
return status;
}
/**
***********************************************************************
* @ingroup SalCtrl
@ -175,7 +172,6 @@ SalCtrl_SymFreeResources(sal_crypto_service_t *pCryptoService)
} \
} while (0)
/* Function that creates the Sym Handles. */
static CpaStatus
SalCtrl_SymCreateTransHandle(icp_accel_dev_t *device,
@ -325,7 +321,6 @@ SalCtrl_CryptoDebug(void *private_data, char *data, int size, int offset)
return ++offset;
}
static CpaStatus
SalCtrl_SymInit(icp_accel_dev_t *device, sal_service_t *service)
{
@ -342,7 +337,6 @@ SalCtrl_SymInit(icp_accel_dev_t *device, sal_service_t *service)
section = icpGetProcessName();
}
/* Register callbacks for the symmetric services
* (Hash, Cipher, Algorithm-Chaining) (returns void)*/
LacSymCb_CallbacksRegister();
@ -581,7 +575,6 @@ SalCtr_InstInit(icp_accel_dev_t *device, sal_service_t *service)
section = icpGetProcessName();
}
/* Get Config Info: Accel Num, bank Num, packageID,
coreAffinity, nodeAffinity and response mode */
@ -847,7 +840,6 @@ SalCtrl_CryptoShutdown(icp_accel_dev_t *device, sal_service_t *service)
return CPA_STATUS_FAIL;
}
/* Free memory and transhandles */
switch (svc_type) {
case SAL_SERVICE_TYPE_CRYPTO_ASYM:
@ -886,7 +878,6 @@ cpaCyGetStatusText(const CpaInstanceHandle instanceHandle,
{
CpaStatus status = CPA_STATUS_SUCCESS;
LAC_CHECK_NULL_PARAM(pStatusText);
switch (errStatus) {
@ -969,7 +960,6 @@ cpaCyStartInstance(CpaInstanceHandle instanceHandle_in)
CpaStatus status = CPA_STATUS_SUCCESS;
sal_crypto_service_t *pService = NULL;
if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle_in) {
instanceHandle = Lac_GetFirstHandle(SAL_SERVICE_TYPE_CRYPTO);
if (!instanceHandle) {
@ -1021,7 +1011,6 @@ cpaCyStopInstance(CpaInstanceHandle instanceHandle_in)
CpaStatus status = CPA_STATUS_SUCCESS;
sal_crypto_service_t *pService = NULL;
if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle_in) {
instanceHandle = Lac_CryptoGetFirstHandle();
} else {
@ -1066,7 +1055,6 @@ cpaCyInstanceSetNotificationCb(
CpaStatus status = CPA_STATUS_SUCCESS;
sal_service_t *gen_handle = instanceHandle;
LAC_CHECK_NULL_PARAM(gen_handle);
gen_handle->notification_cb = pInstanceNotificationCb;
gen_handle->cb_tag = pCallbackTag;
@ -1359,7 +1347,6 @@ cpaCyInstanceGetInfo2(const CpaInstanceHandle instanceHandle_in,
char valStr[ADF_CFG_MAX_VAL_LEN_IN_BYTES] = { 0 };
char *section = DYN_SEC;
if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle_in) {
instanceHandle = Lac_CryptoGetFirstHandle();
} else {
@ -1423,7 +1410,7 @@ cpaCyInstanceGetInfo2(const CpaInstanceHandle instanceHandle_in,
}
pInstanceInfo2->isOffloaded = CPA_TRUE;
/* Get the instance name and part name*/
/* Get the instance name and part name */
dev = icp_adf_getAccelDevByAccelId(pCryptoService->pkgID);
if (NULL == dev) {
LAC_LOG_ERROR("Can not find device for the instance\n");
@ -1474,7 +1461,6 @@ cpaCyQueryCapabilities(const CpaInstanceHandle instanceHandle_in,
/* Verify Instance exists */
CpaInstanceHandle instanceHandle = NULL;
if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle_in) {
instanceHandle = Lac_CryptoGetFirstHandle();
} else {
@ -1634,7 +1620,6 @@ cpaCySetAddressTranslation(const CpaInstanceHandle instanceHandle_in,
CpaInstanceHandle instanceHandle = NULL;
sal_service_t *pService = NULL;
if (CPA_INSTANCE_HANDLE_SINGLE == instanceHandle_in) {
instanceHandle = Lac_CryptoGetFirstHandle();
} else {
@ -1756,7 +1741,6 @@ icp_sal_CyPollSymRing(CpaInstanceHandle instanceHandle_in,
return status;
}
/**
******************************************************************************
* @ingroup cpaCyCommon
@ -1978,7 +1962,6 @@ icp_sal_SymGetInflightRequests(CpaInstanceHandle instanceHandle,
numInflightRequests);
}
CpaStatus
icp_sal_dp_SymGetInflightRequests(CpaInstanceHandle instanceHandle,
Cpa32U *maxInflightRequests,
@ -1994,7 +1977,6 @@ icp_sal_dp_SymGetInflightRequests(CpaInstanceHandle instanceHandle,
numInflightRequests);
}
CpaStatus
icp_sal_setForceAEADMACVerify(CpaInstanceHandle instanceHandle,
CpaBoolean forceAEADMacVerify)

3
sys/dev/qat/qat_api/common/include/lac_common.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
*****************************************************************************
* @file lac_common.h Common macros
@ -574,7 +574,6 @@ typedef enum lac_expected_size_s {
******************************************************************************/
#define LAC_QUADWORDS_TO_BYTES(x) ((x) << 3)
/******************************************************************************/
/*

4
sys/dev/qat/qat_api/common/include/lac_hooks.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
*******************************************************************************
* @file lac_hooks.h
@ -9,7 +9,7 @@
* @ingroup LacCommon
*
* Component Init/Shutdown functions. These are:
* - an init function which is called during the intialisation sequence,
* - an init function which is called during the initialisation sequence,
* - a shutdown function which is called by the overall shutdown function,
*
******************************************************************************/

6
sys/dev/qat/qat_api/common/include/lac_mem.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
***************************************************************************
* @file lac_mem.h
@ -351,7 +351,7 @@ LacMem_OsContigAlignMemAlloc(void **ppMemAddr,
* results in following entry:
* static const unsigned int highest_bit_of_lac_mem_blk_t = 3
*
* CAUTION!!
* CAUTION!
* Macro is prepared only for type names NOT-containing ANY
* special characters. Types as amongst others:
* - void *
@ -481,7 +481,7 @@ LacMem_OsContigAlignMemFree(void **ppMemAddr)
* This is because pInternalMem describes the memory that will be sent to
* QAT.
*
* The caller must keep the original buffer pointer. The alllocated buffer
* The caller must keep the original buffer pointer. The allocated buffer
*is
* freed (as necessary) using icp_LacBufferRestore().
*

14
sys/dev/qat/qat_api/common/include/lac_mem_pools.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
***************************************************************************
* @file lac_mem_pools.h
@ -15,20 +15,20 @@
* This component is designed as a set of utility functions for the
* creation of pre-allocated memory pools. Each pool will be created using OS
* memory with a user specified number of elements, element size and element
* alignment(alignmnet is at byte granularity).
* alignment(alignment is at byte granularity).
* @lld_dependencies
* These utilities rely on QAT Utils for locking mechanisms and memory
*allocation
* allocation
* @lld_initialisation
* Pool creation needs to be done by each component. There is no specific
* initialisation required for this feature.
* @lld_module_algorithms
* The following is a diagram of how the memory is layed out for each block
* The following is a diagram of how the memory is laid out for each block
* in a pool. Each element must be aligned on the boundary requested for in the
* create call. In order to hide the management of the pools from the user,
* the memory block data is hidden prior to the
* data pointer. This way it can be accessed easily on a free call with pointer
* arithmatic. The Padding at the start is simply there for alignment and is
* arithmetic. The Padding at the start is simply there for alignment and is
* unused in the pools.
*
* -------------------------------------------------------
@ -73,7 +73,7 @@ typedef struct lac_mem_blk_s {
CpaBoolean isInUse;
/**< indicates if the pool item is in use */
struct lac_mem_blk_s *pNext;
/**< link to next blcok in the pool */
/**< link to next block in the pool */
struct lac_mem_pool_hdr_s *pPoolID;
/**< identifier of the pool that this block was allocated from */
} lac_mem_blk_t;
@ -82,7 +82,7 @@ typedef struct lac_mem_blk_s {
(((lac_mem_blk_t *)((LAC_ARCH_UINT)pVirtAddr - sizeof(lac_mem_blk_t))) \
->physDataPtr)
/**< @ingroup LacMemPool
* macro for retreiving the physical address of the memory block. */
* macro for retrieving the physical address of the memory block. */
#define LAC_MEM_POOL_INIT_POOL_ID 0
/**< @ingroup LacMemPool

10
sys/dev/qat/qat_api/common/include/lac_sal.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
*****************************************************************************
* @file lac_sal.h
@ -57,7 +57,7 @@ CpaStatus SalCtrl_ServiceCreate(sal_service_type_t service,
* @ingroup SalCtl
* @description
* This macro goes through the 'list' passed in as a parameter. For each
* element found in the list, it peforms a cast to the type of the element
* element found in the list, it performs a cast to the type of the element
* given by the 'type' parameter. Finally, it calls the function given by
* the 'function' parameter, passing itself and the device as parameters.
*
@ -114,7 +114,7 @@ CpaStatus SalCtrl_ServiceCreate(sal_service_type_t service,
* @ingroup SalCtl
* @description
* This macro goes through the 'list' passed in as a parameter. For each
* element found in the list, it peforms a cast to the type of the element
* element found in the list, it performs a cast to the type of the element
* given by the 'type' parameter. Finally, it checks the state of the
* element and if it is in state 'state_check' then it calls the
* function given by the 'function' parameter, passing itself
@ -212,7 +212,7 @@ CpaStatus SalCtrl_CryptoStart(icp_accel_dev_t *device, sal_service_t *service);
* @ingroup SalCtrl
* @description
* This function is used to stop an instance of crypto service.
* It checks for inflight messages to the FW. If no messages are pending
* It checks for in-flight messages to the FW. If no messages are pending
* it returns success. If messages are pending it returns retry.
*
* @context
@ -340,7 +340,7 @@ CpaStatus SalCtrl_CompressionStart(icp_accel_dev_t *device,
* @ingroup SalCtrl
* @description
* This function is used to stop an instance of compression service.
* It checks for inflight messages to the FW. If no messages are pending
* It checks for in-flight messages to the FW. If no messages are pending
* it returns success. If messages are pending it returns retry.
*
* @context

6
sys/dev/qat/qat_api/common/include/lac_sal_types.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
***************************************************************************
* @file lac_sal_types.h
@ -195,8 +195,8 @@ typedef struct sal_service_debug_s {
* @param[in] pService pointer to service instance
* @param[in] service_type service type to check againstx.
*
* @return CPA_STATUS_FAIL Parameter is incorrect type
*
* @return CPA_STATUS_FAIL Parameter is incorrect type
*
******************************************************************************/
#define SAL_CHECK_INSTANCE_TYPE(pService, service_type) \
do { \

4
sys/dev/qat/qat_api/common/include/sal_qat_cmn_msg.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
*****************************************************************************
* @file sal_qat_cmn_msg.c
@ -147,7 +147,7 @@ void SalQatMsg_CmnMidWrite(icp_qat_fw_la_bulk_req_t *pReq,
* section of the Request Msg.
*
* @param[in] pMsg Pointer to 128B Request Msg buffer.
* @param[in] pContentDescInfo content descripter info.
* @param[in] pContentDescInfo content descriptor info.
*
* @return
* none

4
sys/dev/qat/qat_api/common/qat_comms/sal_qat_cmn_msg.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
*****************************************************************************
* @file sal_qat_cmn_msg.h
@ -145,7 +145,7 @@ void inline SalQatMsg_CmnMidWrite(icp_qat_fw_la_bulk_req_t *pReq,
* icp_qat_fw_comn_req_hdr_cd_pars_t section of the Request Msg.
*
* @param[in] pMsg Pointer to 128B Request Msg buffer.
* @param[in] pContentDescInfo content descripter info.
* @param[in] pContentDescInfo content descriptor info.
*
* @return
* none

6
sys/dev/qat/qat_api/common/utils/lac_buffer_desc.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
*****************************************************************************
* @file lac_buffer_desc.c Utility functions for setting buffer descriptors
@ -31,7 +31,7 @@
/* Invalid physical address value */
#define INVALID_PHYSICAL_ADDRESS 0
/* Indicates what type of buffer writes need to be perfomed */
/* Indicates what type of buffer writes need to be performed */
typedef enum lac_buff_write_op_e {
WRITE_NORMAL = 0,
WRITE_AND_GET_SIZE,
@ -153,7 +153,7 @@ LacBuffDesc_CommonBufferListDescWrite(const CpaBufferList *pUserBufferList,
/* This function implements the buffer description writes for the traditional
* APIs Zero length buffers are allowed, should be used for CHA-CHA-POLY and
* GCM aglorithms */
* GCM algorithms */
CpaStatus
LacBuffDesc_BufferListDescWriteAndAllowZeroBuffer(
const CpaBufferList *pUserBufferList,

7
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
*****************************************************************************
* @file icp_qat_fw.h
@ -241,13 +241,12 @@ typedef struct icp_qat_fw_comn_req_mid_s {
* field */
uint32_t src_length;
/** < Length of source flat buffer incase src buffer
/** < Length of source flat buffer in case src buffer
* type is flat */
uint32_t dst_length;
/** < Length of source flat buffer incase dst buffer
/** < Length of source flat buffer in case dst buffer
* type is flat */
} icp_qat_fw_comn_req_mid_t;
/**

15
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_comp.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
*****************************************************************************
* @file icp_qat_fw_comp.h
@ -47,7 +47,6 @@ typedef enum {
} icp_qat_fw_comp_cmd_id_t;
/*
* REQUEST FLAGS IN COMMON COMPRESSION
* In common message it is named as SERVICE SPECIFIC FLAGS.
@ -65,7 +64,6 @@ typedef enum {
* are don't care. i.e., these features are removed from QAT 2.0.
*/
/**< Flag usage */
#define ICP_QAT_FW_COMP_STATELESS_SESSION 0
@ -410,7 +408,6 @@ typedef struct icp_qat_fw_comp_req_params_s {
((crc & ICP_QAT_FW_COMP_CRC_MODE_MASK) \
<< ICP_QAT_FW_COMP_CRC_MODE_BITPOS))
/*
* REQUEST FLAGS IN REQUEST PARAMETERS COMPRESSION
*
@ -423,7 +420,6 @@ typedef struct icp_qat_fw_comp_req_params_s {
* +=====+-----+----- + --- + ----+-----+ --- + ----- + --- + ---- + -- + -- +
*/
/**
*****************************************************************************
* @ingroup icp_qat_fw_comp
@ -446,18 +442,17 @@ typedef enum {
ICP_QAT_FW_COMP_20_CMD_LZ4S_DECOMPRESS = 6,
/*!< LZ4S Decompress Request */
ICP_QAT_FW_COMP_20_CMD_XP10_COMPRESS = 7,
/*!< XP10 Compress Request -- Placeholder */
ICP_QAT_FW_COMP_20_CMD_RESERVED_1 = 7,
/*!< Placeholder */
ICP_QAT_FW_COMP_20_CMD_XP10_DECOMPRESS = 8,
/*!< XP10 Decompress Request -- Placeholder */
ICP_QAT_FW_COMP_20_CMD_RESERVED_2 = 8,
/*!< Placeholder */
ICP_QAT_FW_COMP_20_CMD_DELIMITER
/**< Delimiter type */
} icp_qat_fw_comp_20_cmd_id_t;
/*
* REQUEST FLAGS IN REQUEST PARAMETERS COMPRESSION
*

10
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
*****************************************************************************
* @file icp_qat_fw_la.h
@ -451,7 +451,7 @@ typedef struct icp_qat_fw_la_bulk_req_s {
* the case of partial processing. See the HLD for further details
*
* + ====== + ------------------------- + ----------------------- +
* | Parial | Prefix Addr | Hash State Sz |
* | Partial| Prefix Addr | Hash State Sz |
* | State | | |
* + ====== + ------------------------- + ----------------------- +
* | FULL | Points to the prefix data | Prefix size as below. |
@ -509,7 +509,7 @@ typedef struct icp_qat_fw_la_bulk_req_s {
* is required
* @param ciphIV Cipher IV field contents
* @param ciphcfg Cipher/Auth Config offset type
* @param partial Inidicate if the packet is a partial part
* @param partial Indicate if the packet is a partial part
*
*****************************************************************************/
#define ICP_QAT_FW_LA_FLAGS_BUILD(zuc_proto, \
@ -1042,7 +1042,7 @@ typedef struct icp_qat_fw_cipher_cd_ctrl_hdr_s {
/**< LW 27 */
uint8_t cipher_state_sz;
/**< State size in quad words of the cipher algorithm used in this
* session. Set to zero if the algorithm doesnt provide any state */
* session. Set to zero if the algorithm doesn't provide any state */
uint8_t cipher_key_sz;
/**< Key size in quad words of the cipher algorithm used in this session
@ -1179,7 +1179,7 @@ typedef struct icp_qat_fw_cipher_auth_cd_ctrl_hdr_s {
/**< LW 27 */
uint8_t cipher_state_sz;
/**< State size in quad words of the cipher algorithm used in this
* session. Set to zero if the algorithm doesnt provide any state */
* session. Set to zero if the algorithm doesn't provide any state */
uint8_t cipher_key_sz;
/**< Key size in quad words of the cipher algorithm used in this session

14
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_mmp.h
View file

@ -1,9 +1,8 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/* --- (Automatically generated (build v. 2.7), do not modify manually) --- */
/**
* @file icp_qat_fw_mmp.h
* @defgroup icp_qat_fw_mmp ICP QAT FW MMP Processing Definitions
@ -12,10 +11,9 @@
* @brief
* This file documents the external interfaces that the QAT FW running
* on the QAT Acceleration Engine provides to clients wanting to
* accelerate crypto assymetric applications
* accelerate crypto asymmetric applications
*/
#ifndef __ICP_QAT_FW_MMP__
#define __ICP_QAT_FW_MMP__
@ -33,12 +31,12 @@
* Local constants
**************************************************************************
*/
#define ICP_QAT_FW_PKE_INPUT_COUNT_MAX 7
#define ICP_QAT_FW_PKE_INPUT_COUNT_MAX 7
/**< @ingroup icp_qat_fw_pke
* Maximum number of input paramaters in all PKE request */
#define ICP_QAT_FW_PKE_OUTPUT_COUNT_MAX 5
* Maximum number of input parameters in all PKE request */
#define ICP_QAT_FW_PKE_OUTPUT_COUNT_MAX 5
/**< @ingroup icp_qat_fw_pke
* Maximum number of output paramaters in all PKE request */
* Maximum number of output parameters in all PKE request */
/**
* @ingroup icp_qat_fw_mmp

5
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_mmp_ids.h
View file

@ -1,6 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/* --- (Automatically generated (relocation v. 1.3), do not modify manually) --- */
@ -11,7 +10,7 @@
* @brief
* This file documents the external interfaces that the QAT FW running
* on the QAT Acceleration Engine provides to clients wanting to
* accelerate crypto assymetric applications
* accelerate crypto asymmetric applications
*/
#ifndef __ICP_QAT_FW_MMP_IDS__

4
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_pke.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
* @file icp_qat_fw_pke.h
* @defgroup icp_qat_fw_pke ICP QAT FW PKE Processing Definitions
@ -8,7 +8,7 @@
* @brief
* This file documents the external interfaces that the QAT FW running
* on the QAT Acceleration Engine provides to clients wanting to
* accelerate crypto assymetric applications
* accelerate crypto asymmetric applications
*/
#ifndef _ICP_QAT_FW_PKE_

6
sys/dev/qat/qat_api/firmware/include/icp_qat_hw.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
*****************************************************************************
* @file icp_qat_hw.h
@ -163,7 +163,7 @@ typedef struct icp_qat_hw_auth_config_s {
#define QAT_AUTH_MODE_MASK 0xF
/**< @ingroup icp_qat_hw_defs
* Four bit mask used for determing the Auth mode */
* Four bit mask used for determining the Auth mode */
#define QAT_AUTH_ALGO_BITPOS 0
/**< @ingroup icp_qat_hw_defs
@ -1277,7 +1277,7 @@ typedef struct icp_qat_hw_trng_test_status_s {
#define QAT_TRNG_TEST_STATUS_MASK 0x1
/**< @ingroup icp_qat_hw_defs
* Mask of one bit used to determine the TRNG Test staus */
* Mask of one bit used to determine the TRNG Test status */
#define QAT_TRNG_TEST_STATUS_BITPOS 1
/**< @ingroup icp_qat_hw_defs

3
sys/dev/qat/qat_api/firmware/include/icp_qat_hw_20_comp.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
*****************************************************************************
* @file icp_qat_hw_2x_comp.h
@ -17,7 +17,6 @@
#include "icp_qat_hw_20_comp_defs.h" /* For HW definitions */
#include "icp_qat_fw.h" /* For Set Field Macros. */
#define BYTE_SWAP_32 __builtin_bswap32
/**

12
sys/dev/qat/qat_api/include/cpa.h
View file

@ -1,14 +1,14 @@
/***************************************************************************
*
* BSD LICENSE
*
* Copyright(c) 2007-2023 Intel Corporation. All rights reserved.
*
* Copyright(c) 2007-2025 Intel Corporation. All rights reserved.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
@ -18,7 +18,7 @@
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
@ -30,7 +30,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*
***************************************************************************/

18
sys/dev/qat/qat_api/include/cpa_dev.h
View file

@ -1,14 +1,14 @@
/****************************************************************************
/***************************************************************************
*
* BSD LICENSE
*
* Copyright(c) 2007-2023 Intel Corporation. All rights reserved.
*
* Copyright(c) 2007-2025 Intel Corporation. All rights reserved.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
@ -18,7 +18,7 @@
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
@ -30,7 +30,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*
***************************************************************************/
@ -101,9 +101,9 @@ typedef struct _CpaDeviceInfo {
CpaBoolean dcEnabled;
/**< Compression service enabled */
CpaBoolean cySymEnabled;
/**< Symetric crypto service enabled */
/**< Symmetric crypto service enabled */
CpaBoolean cyAsymEnabled;
/**< Asymetric crypto service enabled */
/**< Asymmetric crypto service enabled */
CpaBoolean inlineEnabled;
/**< Inline service enabled */
Cpa32U deviceMemorySizeAvailable;

12
sys/dev/qat/qat_api/include/cpa_types.h
View file

@ -1,14 +1,14 @@
/***************************************************************************
*
* BSD LICENSE
*
* Copyright(c) 2007-2023 Intel Corporation. All rights reserved.
*
* Copyright(c) 2007-2025 Intel Corporation. All rights reserved.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
@ -18,7 +18,7 @@
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
@ -30,7 +30,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*
***************************************************************************/

23
sys/dev/qat/qat_api/include/dc/cpa_dc.h
View file

@ -1,14 +1,14 @@
/****************************************************************************
/***************************************************************************
*
* BSD LICENSE
*
* Copyright(c) 2007-2023 Intel Corporation. All rights reserved.
*
* Copyright(c) 2007-2025 Intel Corporation. All rights reserved.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
@ -18,7 +18,7 @@
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
@ -30,7 +30,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*
***************************************************************************/
@ -135,6 +135,7 @@ extern"C" {
(CPA_DC_API_VERSION_NUM_MAJOR == major && \
CPA_DC_API_VERSION_NUM_MINOR < minor))
/**
*****************************************************************************
* @ingroup cpaDc
@ -999,7 +1000,7 @@ typedef struct _CpaCrcData {
/**< CRC32 calculated on the input buffer during compression
* requests and on the output buffer during decompression requests. */
Cpa32U adler32;
/**< ADLER32 calculated on the input buffer during compression
/**< Adler32 calculated on the input buffer during compression
* requests and on the output buffer during decompression requests. */
CpaIntegrityCrc integrityCrc;
/**< 32bit Integrity CRCs */
@ -1289,7 +1290,7 @@ cpaDcResetSession(const CpaInstanceHandle dcInstance,
* This function will reset the internal xxHash state maintained within a
* session. This would be used in conjunction with the
* CpaDcSessionSetupData.accumulateXXHash flag being set to TRUE for this
* session. It will enable reseting (reinitialising) just the xxHash
* session. It will enable resetting (reinitialising) just the xxHash
* calculation back to the state when the session was first initialised.
*
* @context
@ -1761,7 +1762,7 @@ cpaDcLZ4SCompressBound(const CpaInstanceHandle dcInstance,
* session, the checksum passed to cpaDcCompressData should be set to the
* checksum value produced by the previous call to cpaDcCompressData().
* When the last block of input data is passed to cpaDcCompressData(), the
* flush flag should be set to CP_DC_FLUSH_FINAL. This will cause the BFINAL
* flush flag should be set to CPA_DC_FLUSH_FINAL. This will cause the BFINAL
* bit to be set in a deflate stream. It is the responsibility of the calling
* application to maintain overall lengths across the stateless requests
* and to pass the checksum produced by one request into the next request.
@ -2286,7 +2287,7 @@ cpaDcNsDecompressData( CpaInstanceHandle dcInstance,
* - Content size = 0
* - Dictionary ID = 0
* - Header checksum = 1 byte representing the second byte of the
* XXH32 of the frame decriptor field.
* XXH32 of the frame descriptor field.
*
* The counter parameter will be set to the number of bytes added to the
* buffer. The pData will be not be changed.

14
sys/dev/qat/qat_api/include/dc/cpa_dc_bp.h
View file

@ -1,14 +1,14 @@
/****************************************************************************
/***************************************************************************
*
* BSD LICENSE
*
* Copyright(c) 2007-2023 Intel Corporation. All rights reserved.
*
* Copyright(c) 2007-2025 Intel Corporation. All rights reserved.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
@ -18,7 +18,7 @@
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
@ -30,7 +30,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*
***************************************************************************/

56
sys/dev/qat/qat_api/include/dc/cpa_dc_chain.h
View file

@ -1,8 +1,8 @@
/****************************************************************************
/***************************************************************************
*
* BSD LICENSE
*
* Copyright(c) 2007-2023 Intel Corporation. All rights reserved.
* Copyright(c) 2007-2025 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@ -77,21 +77,21 @@ extern"C" {
*****************************************************************************/
typedef enum _CpaDcChainOperations
{
CPA_DC_CHAIN_COMPRESS_THEN_HASH,
CPA_DC_CHAIN_COMPRESS_THEN_HASH = 0,
/**< 2 operations for chaining:
* 1st operation is to perform compression on plain text
* 2nd operation is to perform hash on compressed text
**< 2 entries in CpaDcChainSessionSetupData array:
* 1st entry is for compression setup data
* 2nd entry is for hash setup data*/
CPA_DC_CHAIN_COMPRESS_THEN_ENCRYPT,
CPA_DC_CHAIN_COMPRESS_THEN_ENCRYPT = 1,
/**< 2 operations for chaining:
* 1st operation is to perform compression on plain text
* 2nd operation is to perform encryption on compressed text
**< 2 entries in CpaDcChainSessionSetupData array:
* 1st entry is for compression setup data
* 2nd entry is for encryption setup data*/
CPA_DC_CHAIN_COMPRESS_THEN_HASH_ENCRYPT,
CPA_DC_CHAIN_COMPRESS_THEN_HASH_ENCRYPT = 2,
/**< 2 operations for chaining:
* 1st operation is to perform compression on plain text
* 2nd operation is to perform hash on compressed text and
@ -99,7 +99,7 @@ typedef enum _CpaDcChainOperations
**< 2 entries in CpaDcChainSessionSetupData array:
* 1st entry is for compression setup data
* 2nd entry is for hash and encryption setup data*/
CPA_DC_CHAIN_COMPRESS_THEN_ENCRYPT_HASH,
CPA_DC_CHAIN_COMPRESS_THEN_ENCRYPT_HASH = 3,
/**< 2 operations for chaining:
* 1st operation is to perform compression on plain text
* 2nd operation is to perform encryption on compressed text and
@ -107,35 +107,35 @@ typedef enum _CpaDcChainOperations
**< 2 entries in CpaDcChainSessionSetupData array:
* 1st entry is for compression setup data
* 2nd entry is for encryption and hash setup data*/
CPA_DC_CHAIN_COMPRESS_THEN_AEAD,
CPA_DC_CHAIN_COMPRESS_THEN_AEAD = 4,
/**< 2 operations for chaining:
* 1st operation is to perform compression on plain text
* 2nd operation is to perform AEAD encryption on compressed text
**< 2 entries in CpaDcChainSessionSetupData array:
* 1st entry is for compression setup data
* 2nd entry is for AEAD encryption setup data*/
CPA_DC_CHAIN_HASH_THEN_COMPRESS,
CPA_DC_CHAIN_HASH_THEN_COMPRESS = 5,
/**< 2 operations for chaining:
* 1st operation is to perform hash on plain text
* 2nd operation is to perform compression on plain text
**< 2 entries in CpaDcChainSessionSetupData array:
* 1st entry is for hash setup data
* 2nd entry is for compression setup data*/
CPA_DC_CHAIN_HASH_VERIFY_THEN_DECOMPRESS,
CPA_DC_CHAIN_HASH_VERIFY_THEN_DECOMPRESS = 6,
/**< 2 operations for chaining:
* 1st operation is to perform hash verify on compressed text
* 2nd operation is to perform decompression on compressed text
**< 2 entries in CpaDcChainSessionSetupData array:
* 1st entry is for hash setup data
* 2nd entry is for decompression setup data*/
CPA_DC_CHAIN_DECRYPT_THEN_DECOMPRESS,
CPA_DC_CHAIN_DECRYPT_THEN_DECOMPRESS = 7,
/**< 2 operations for chaining:
* 1st operation is to perform decryption on compressed & encrypted text
* 2nd operation is to perform decompression on compressed text
**< 2 entries in CpaDcChainSessionSetupData array:
* 1st entry is for decryption setup data
* 2nd entry is for decompression setup data*/
CPA_DC_CHAIN_HASH_VERIFY_DECRYPT_THEN_DECOMPRESS,
CPA_DC_CHAIN_HASH_VERIFY_DECRYPT_THEN_DECOMPRESS = 8,
/**< 2 operations for chaining:
* 1st operation is to perform hash verify on compressed & encrypted text
* and decryption on compressed & encrypted text
@ -143,7 +143,7 @@ typedef enum _CpaDcChainOperations
**< 2 entries in CpaDcChainSessionSetupData array:
* 1st entry is for hash and decryption setup data
* 2nd entry is for decompression setup data*/
CPA_DC_CHAIN_DECRYPT_HASH_VERIFY_THEN_DECOMPRESS,
CPA_DC_CHAIN_DECRYPT_HASH_VERIFY_THEN_DECOMPRESS = 9,
/**< 2 operations for chaining:
* 1st operation is to perform decryption on compressed & encrypted text
* and hash verify on compressed text
@ -151,25 +151,25 @@ typedef enum _CpaDcChainOperations
**< 2 entries in CpaDcChainSessionSetupData array:
* 1st entry is for decryption and hash setup data
* 2nd entry is for decompression setup data*/
CPA_DC_CHAIN_AEAD_THEN_DECOMPRESS,
CPA_DC_CHAIN_AEAD_THEN_DECOMPRESS = 10,
/**< 2 operations for chaining:
* 1st operation is to perform AEAD decryption on compressed & encrypted text
* 2nd operation is to perform decompression on compressed text
**< 2 entries in CpaDcChainSessionSetupData array:
* 1st entry is for AEAD decryption setup data
* 2nd entry is for decompression setup data*/
CPA_DC_CHAIN_DECOMPRESS_THEN_HASH_VERIFY,
CPA_DC_CHAIN_DECOMPRESS_THEN_HASH_VERIFY = 11,
/**< 2 operations for chaining:
* 1st operation is to perform decompression on compressed text
* 2nd operation is to perform hash verify on plain text
**< 2 entries in CpaDcChainSessionSetupData array:
* 1st entry is for decompression setup data
* 2nd entry is for hash setup data*/
CPA_DC_CHAIN_COMPRESS_THEN_AEAD_THEN_HASH,
CPA_DC_CHAIN_COMPRESS_THEN_AEAD_THEN_HASH = 12,
/**< 3 operations for chaining:
* 1st operation is to perform compression on plain text
* 2nd operation is to perform AEAD encryption compressed text
* 3rd operation is to perfom hash on compressed & encrypted text
* 2nd operation is to perform AEAD encryption on compressed text
* 3rd operation is to perform hash on compressed & encrypted text
**< 3 entries in CpaDcChainSessionSetupData array:
* 1st entry is for compression setup data
* 2nd entry is for AEAD encryption setup data
@ -187,9 +187,9 @@ typedef enum _CpaDcChainOperations
*****************************************************************************/
typedef enum _CpaDcChainSessionType
{
CPA_DC_CHAIN_COMPRESS_DECOMPRESS,
CPA_DC_CHAIN_COMPRESS_DECOMPRESS = 0,
/**< Indicate the session is for compression or decompression */
CPA_DC_CHAIN_SYMMETRIC_CRYPTO,
CPA_DC_CHAIN_SYMMETRIC_CRYPTO
/**< Indicate the session is for symmetric crypto */
} CpaDcChainSessionType;
@ -210,7 +210,7 @@ typedef struct _CpaDcChainSessionSetupData {
CpaDcSessionSetupData *pDcSetupData;
/**< Pointer to compression session setup data */
CpaCySymSessionSetupData *pCySetupData;
/**< Pointer to symmectric crypto session setup data */
/**< Pointer to symmetric crypto session setup data */
};
} CpaDcChainSessionSetupData;
@ -230,7 +230,7 @@ typedef struct _CpaDcChainOpData {
CpaDcOpData *pDcOp;
/**< Pointer to compression operation data */
CpaCySymOpData *pCySymOp;
/**< Pointer to symmectric crypto operation data */
/**< Pointer to symmetric crypto operation data */
};
} CpaDcChainOpData;
@ -259,7 +259,7 @@ typedef struct _CpaDcChainRqResults {
Cpa32U crc32;
/**< crc32 checksum produced by chaining operations */
Cpa32U adler32;
/**< adler32 checksum produced by chaining operations */
/**< Adler32 checksum produced by chaining operations */
}CpaDcChainRqResults;
/**
@ -366,8 +366,6 @@ cpaDcChainGetSessionSize(CpaInstanceHandle dcInstance,
* @retval CPA_STATUS_FAIL Function failed.
* @retval CPA_STATUS_INVALID_PARAM Invalid parameter passed in.
* @retval CPA_STATUS_RESOURCE Error related to system resources.
* @retval CPA_STATUS_RESTARTING API implementation is restarting. Resubmit
* the request.
* @retval CPA_STATUS_UNSUPPORTED Function is not supported.
*
* @pre
@ -563,7 +561,7 @@ cpaDcChainRemoveSession(const CpaInstanceHandle dcInstance,
* @param[in] pChainOpData Pointer to an array of CpaDcChainOpData
* structures. There should be numOpDatas
* entries in the array.
* @param[in,out] pResults Pointer to CpaDcChainRqResults structure.
* @param[in,out] pResults Pointer to CpaDcChainRqResults
* @param[in] callbackTag User supplied value to help correlate
* the callback with its associated request.
*
@ -593,9 +591,9 @@ cpaDcChainRemoveSession(const CpaInstanceHandle dcInstance,
* -# The order of entries in pChainOpData[] must be consistent with the
* order of operations described for the chaining operation in
* CpaDcChainOperations.
* As an example, for CPA_DC_CHAIN_COMPRESS_THEN_ENCRYPT, pChainOpData[0]
* must contain the compression operation data and pChainOpData[1] must
* contain the encryption operation data.
* As an example, for CPA_DC_CHAIN_HASH_THEN_COMPRESS, pChainOpData[0]
* must contain the hash operation data and pChainOpData[1] must
* contain the compress operation data.
*
* -# The numOpDatas for each chaining operation are specified in the
* comments for the operation in CpaDcChainOperations.
@ -610,8 +608,6 @@ cpaDcChainRemoveSession(const CpaInstanceHandle dcInstance,
* CPA_DC_CHAIN_SYMMETRIC_CRYPTO and pChainOpData[]->pCySymOp should
* point to a CpaCySymOpData structure.
*
* -# Stateful compression is not supported for chaining.
*
* -# Partial packet processing is not supported.
*
* This function has identical buffer processing rules as

12
sys/dev/qat/qat_api/include/dc/cpa_dc_dp.h
View file

@ -1,14 +1,14 @@
/***************************************************************************
*
* BSD LICENSE
*
* Copyright(c) 2007-2023 Intel Corporation. All rights reserved.
*
* Copyright(c) 2007-2025 Intel Corporation. All rights reserved.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
@ -18,7 +18,7 @@
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
@ -30,7 +30,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*
***************************************************************************/

9
sys/dev/qat/qat_api/include/icp_buffer_desc.h
View file

@ -1,5 +1,6 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
*****************************************************************************
* @file icp_buffer_desc.h
@ -20,7 +21,7 @@
typedef Cpa64U icp_qat_addr_width_t; // hi32 first, lo32 second
// Alignement constraint of the buffer list.
/* Alignment constraint of the buffer list. */
#define ICP_DESCRIPTOR_ALIGNMENT_BYTES 8
/**
@ -31,7 +32,7 @@ typedef Cpa64U icp_qat_addr_width_t; // hi32 first, lo32 second
*
* @description
* A QAT friendly buffer descriptor.
* All buffer descriptor described in this structure are physcial
* All buffer descriptor described in this structure are physical
* and are 64 bit wide.
*
* Updates in the CpaFlatBuffer should be also reflected in this
@ -55,7 +56,7 @@ typedef struct icp_flat_buffer_desc_s {
*
* @description
* A QAT friendly buffer descriptor.
* All buffer descriptor described in this structure are physcial
* All buffer descriptor described in this structure are physical
* and are 64 bit wide.
*
* Updates in the CpaBufferList should be also reflected in this structure

6
sys/dev/qat/qat_api/include/icp_sal_user.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/**
***************************************************************************
* @file icp_sal_user.h
@ -75,7 +75,7 @@ CpaStatus icp_sal_userStart(const char *pProcessName);
*
* @param[in] limitDevAccess Specifies if the address space is limited
* to one device (true) or if it spans
* accross multiple devices.
* across multiple devices.
*
* @retval CPA_STATUS_SUCCESS No error
* @retval CPA_STATUS_FAIL Operation failed. In this case user
@ -478,7 +478,7 @@ CpaStatus icp_sal_find_new_devices(void);
* @assumptions
* None
* @sideEffects
* In case a device has beed stoped or restarted the application
* In case a device has been stopped or restarted the application
* will get restarting/stop/shutdown events
* @reentrant
* No

12
sys/dev/qat/qat_api/include/lac/cpa_cy_common.h
View file

@ -1,14 +1,14 @@
/***************************************************************************
*
* BSD LICENSE
*
* Copyright(c) 2007-2023 Intel Corporation. All rights reserved.
*
* Copyright(c) 2007-2025 Intel Corporation. All rights reserved.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
@ -18,7 +18,7 @@
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
@ -30,7 +30,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*
***************************************************************************/

12
sys/dev/qat/qat_api/include/lac/cpa_cy_dh.h
View file

@ -1,14 +1,14 @@
/***************************************************************************
*
* BSD LICENSE
*
* Copyright(c) 2007-2023 Intel Corporation. All rights reserved.
*
* Copyright(c) 2007-2025 Intel Corporation. All rights reserved.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
@ -18,7 +18,7 @@
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
@ -30,7 +30,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*
***************************************************************************/

12
sys/dev/qat/qat_api/include/lac/cpa_cy_dsa.h
View file

@ -1,14 +1,14 @@
/***************************************************************************
*
* BSD LICENSE
*
* Copyright(c) 2007-2023 Intel Corporation. All rights reserved.
*
* Copyright(c) 2007-2025 Intel Corporation. All rights reserved.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
@ -18,7 +18,7 @@
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
@ -30,7 +30,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*
***************************************************************************/

20
sys/dev/qat/qat_api/include/lac/cpa_cy_ec.h
View file

@ -1,14 +1,14 @@
/***************************************************************************
*
* BSD LICENSE
*
* Copyright(c) 2007-2023 Intel Corporation. All rights reserved.
*
* Copyright(c) 2007-2025 Intel Corporation. All rights reserved.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
@ -18,7 +18,7 @@
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
@ -30,7 +30,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*
***************************************************************************/
@ -266,7 +266,7 @@ typedef struct _CpaCyEcCurveParametersWeierstrass
*
* @description
* This union allows for the characterisation of different curve types
* encapsulted in one data type. The intention is that new curve types
* encapsulated in one data type. The intention is that new curve types
* will be added in the future.
*
* @note
@ -451,7 +451,7 @@ typedef struct _CpaCyEcGenericPointVerifyOpData {
*****************************************************************************
* @ingroup cpaCyEc
* EC Point Multiplication Operation Data for Edwards or
* Montgomery curves as specificied in RFC#7748.
* Montgomery curves as specified in RFC#7748.
*
* @description
* This structure contains the operation data for the
@ -486,11 +486,11 @@ typedef struct _CpaCyEcMontEdwdsPointMultiplyOpData {
/**< field type for the operation */
CpaBoolean generator;
/**< True if the operation is a generator multiplication (kG)
* False if it is a variable point multiplcation (kP). */
* False if it is a variable point multiplication (kP). */
CpaFlatBuffer k;
/**< k scalar multiplier for the operation */
CpaFlatBuffer x;
/**< x value. Used in scalar varable point multiplication operations.
/**< x value. Used in scalar variable point multiplication operations.
* Not required if the generator is True. Must be NULL if not required.
* The size of the buffer MUST be 32B for 25519 curves and 64B for 448
* curves */

12
sys/dev/qat/qat_api/include/lac/cpa_cy_ecdh.h
View file

@ -1,14 +1,14 @@
/***************************************************************************
*
* BSD LICENSE
*
* Copyright(c) 2007-2023 Intel Corporation. All rights reserved.
*
* Copyright(c) 2007-2025 Intel Corporation. All rights reserved.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
@ -18,7 +18,7 @@
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
@ -30,7 +30,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*
***************************************************************************/

12
sys/dev/qat/qat_api/include/lac/cpa_cy_ecdsa.h
View file

@ -1,14 +1,14 @@
/***************************************************************************
*
* BSD LICENSE
*
* Copyright(c) 2007-2023 Intel Corporation. All rights reserved.
*
* Copyright(c) 2007-2025 Intel Corporation. All rights reserved.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
@ -18,7 +18,7 @@
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
@ -30,7 +30,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*
***************************************************************************/

12
sys/dev/qat/qat_api/include/lac/cpa_cy_im.h
View file

@ -1,14 +1,14 @@
/***************************************************************************
*
* BSD LICENSE
*
* Copyright(c) 2007-2023 Intel Corporation. All rights reserved.
*
* Copyright(c) 2007-2025 Intel Corporation. All rights reserved.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
@ -18,7 +18,7 @@
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
@ -30,7 +30,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*
***************************************************************************/

12
sys/dev/qat/qat_api/include/lac/cpa_cy_key.h
View file

@ -1,14 +1,14 @@
/***************************************************************************
*
* BSD LICENSE
*
* Copyright(c) 2007-2023 Intel Corporation. All rights reserved.
*
* Copyright(c) 2007-2025 Intel Corporation. All rights reserved.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
@ -18,7 +18,7 @@
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
@ -30,7 +30,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*
***************************************************************************/

20
sys/dev/qat/qat_api/include/lac/cpa_cy_kpt.h
View file

@ -2,7 +2,7 @@
*
* BSD LICENSE
*
* Copyright(c) 2007-2023 Intel Corporation. All rights reserved.
* Copyright(c) 2007-2025 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@ -96,14 +96,14 @@ typedef Cpa64U CpaCyKptHandle;
typedef enum CpaCyKptKeyManagementStatus_t
{
CPA_CY_KPT_SUCCESS = 0,
/**< Generic success status for all KPT wrapping key handling functions*/
/**< Generic success status for all KPT wrapping key handling functions */
CPA_CY_KPT_LOADKEY_FAIL_QUOTA_EXCEEDED_PER_VFID,
/**< SWK count exceeds the configured maxmium value per VFID*/
/**< SWK count exceeds the configured maximum value per VFID */
CPA_CY_KPT_LOADKEY_FAIL_QUOTA_EXCEEDED_PER_PASID,
/**< SWK count exceeds the configured maxmium value per PASID*/
/**< SWK count exceeds the configured maximum value per PASID */
CPA_CY_KPT_LOADKEY_FAIL_QUOTA_EXCEEDED,
/**< SWK count exceeds the configured maxmium value when not scoped to
* VFID or PASID*/
/**< SWK count exceeds the configured maximum value when not scoped to
* VFID or PASID */
CPA_CY_KPT_SWK_FAIL_NOT_FOUND,
/**< Unable to find SWK entry by handle */
CPA_CY_KPT_FAILED,
@ -277,7 +277,7 @@ typedef struct CpaCyKptRsaPrivateKeyRep1_t
* describing the RSA private key. The quintuple of p, q, dP, dQ, and qInv
* (explained below and in the spec) are required for the second
* representation. For KPT the parameters are Encrypted
* with the assoicated SWK as follows:
* with the associated SWK as follows:
* Encrypt - AES-256-GCM (Key, AAD, Input)
* "||" - denotes concatenation
* Key = SWK
@ -584,11 +584,11 @@ typedef struct CpaCyKptEcdsaSignRSOpData_t
* enumerate type CpaCyKptKeyManagementStatus
* CPA_CY_KPT_SUCCESS Key Loaded successfully
* CPA_CY_KPT_LOADKEY_FAIL_QUOTA_EXCEEDED_PER_VFID
* SWK count exceeds the configured maxmium value per VFID
* SWK count exceeds the configured maximum value per VFID
* CPA_CY_KPT_LOADKEY_FAIL_QUOTA_EXCEEDED_PER_PASID
* SWK count exceeds the configured maxmium value per PASID
* SWK count exceeds the configured maximum value per PASID
* CPA_CY_KPT_LOADKEY_FAIL_QUOTA_EXCEEDED
* SWK count exceeds the configured maxmium value when not scoped to
* SWK count exceeds the configured maximum value when not scoped to
* VFID or PASID
* CPA_CY_KPT_FAILED Operation failed due to unspecified reason
*

12
sys/dev/qat/qat_api/include/lac/cpa_cy_ln.h
View file

@ -1,14 +1,14 @@
/***************************************************************************
*
* BSD LICENSE
*
* Copyright(c) 2007-2023 Intel Corporation. All rights reserved.
*
* Copyright(c) 2007-2025 Intel Corporation. All rights reserved.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
@ -18,7 +18,7 @@
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
@ -30,7 +30,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*
***************************************************************************/

12
sys/dev/qat/qat_api/include/lac/cpa_cy_prime.h
View file

@ -1,14 +1,14 @@
/***************************************************************************
*
* BSD LICENSE
*
* Copyright(c) 2007-2023 Intel Corporation. All rights reserved.
*
* Copyright(c) 2007-2025 Intel Corporation. All rights reserved.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
@ -18,7 +18,7 @@
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
@ -30,7 +30,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*
***************************************************************************/

12
sys/dev/qat/qat_api/include/lac/cpa_cy_rsa.h
View file

@ -1,14 +1,14 @@
/***************************************************************************
*
* BSD LICENSE
*
* Copyright(c) 2007-2023 Intel Corporation. All rights reserved.
*
* Copyright(c) 2007-2025 Intel Corporation. All rights reserved.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
@ -18,7 +18,7 @@
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
@ -30,7 +30,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*
***************************************************************************/

62
sys/dev/qat/qat_api/include/lac/cpa_cy_sym.h
View file

@ -1,14 +1,14 @@
/***************************************************************************
*
* BSD LICENSE
*
* Copyright(c) 2007-2023 Intel Corporation. All rights reserved.
*
* Copyright(c) 2007-2025 Intel Corporation. All rights reserved.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
@ -18,7 +18,7 @@
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
@ -30,7 +30,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*
***************************************************************************/
@ -71,7 +71,7 @@ extern "C" {
* is allocated by the client. The size of the memory that the client needs
* to allocate is determined by a call to the @ref
* cpaCySymSessionCtxGetSize or @ref cpaCySymSessionCtxGetDynamicSize
* functions. The session context memory is initialized with a call to
* functions. The session context memory is initialized with a call to
* the @ref cpaCySymInitSession function.
* This memory MUST not be freed until a call to @ref
* cpaCySymRemoveSession has completed successfully.
@ -253,7 +253,7 @@ typedef enum _CpaCySymCipherDirection
* Symmetric Cipher Setup Data.
* @description
* This structure contains data relating to Cipher (Encryption and
* Decryption) to set up a session.
* Decryption) to setup a session.
*
*****************************************************************************/
typedef struct _CpaCySymCipherSetupData {
@ -272,7 +272,8 @@ typedef struct _CpaCySymCipherSetupData {
* - Two keys must be provided and cipherKeyLenInBytes refers to total
* length of the two keys.
* - Each key can be either 128 bits (16 bytes) or 256 bits (32 bytes).
* - Both keys must have the same size. */
* - Both keys must have the same size.
*/
Cpa8U *pCipherKey;
/**< Cipher key
* For the CPA_CY_SYM_CIPHER_AES_F8 mode of operation, pCipherKey will
@ -281,7 +282,9 @@ typedef struct _CpaCySymCipherSetupData {
* bytes to match the length of the encryption key used.
* For AES-XTS mode of operation, two keys must be provided and pCipherKey
* must point to the two keys concatenated together (Key1 || Key2).
* cipherKeyLenInBytes will contain the total size of both keys. */
* cipherKeyLenInBytes will contain the total size of both keys.
* These fields are set to NULL if key derivation will be used.
*/
CpaCySymCipherDirection cipherDirection;
/**< This parameter determines if the cipher operation is an encrypt or
* a decrypt operation.
@ -651,11 +654,11 @@ typedef enum _CpaCySymAlgChainOrder
* setup a session.
*
****************************************************************************/
typedef struct _CpaCySymSessionSetupData {
typedef struct _CpaCySymSessionSetupData {
CpaCyPriority sessionPriority;
/**< Priority of this session */
CpaCySymOp symOperation;
/**< Operation to perfom */
/**< Operation to perform */
CpaCySymCipherSetupData cipherSetupData;
/**< Cipher Setup Data for the session. This member is ignored for the
* CPA_CY_SYM_OP_HASH operation. */
@ -665,7 +668,7 @@ typedef struct _CpaCySymSessionSetupData {
CpaCySymAlgChainOrder algChainOrder;
/**< If this operation data structure relates to an algorithm chaining
* session then this parameter determines the order in which the chained
* operations are performed. If this structure does not relate to an
* operations are performed. If this structure does not relate to an
* algorithm chaining session then this parameter will be ignored.
*
* @note In the case of authenticated ciphers (GCM and CCM), which are
@ -674,7 +677,7 @@ typedef struct _CpaCySymSessionSetupData {
* cases. */
CpaBoolean digestIsAppended;
/**< Flag indicating whether the digest is appended immediately following
* the region over which the digest is computed. This is true for both
* the region over which the digest is computed. This is true for both
* IPsec packets and SSL/TLS records.
*
* If this flag is set, then the value of the pDigestResult field of
@ -689,7 +692,7 @@ typedef struct _CpaCySymSessionSetupData {
*/
CpaBoolean verifyDigest;
/**< This flag is relevant only for operations which generate a message
* digest. If set to true, the computed digest will not be written back
* digest. If set to true, the computed digest will not be written back
* to the buffer location specified by other parameters, but instead will
* be verified (i.e. compared to the value passed in at that location).
* The number of bytes to be written or compared is indicated by the
@ -697,7 +700,7 @@ typedef struct _CpaCySymSessionSetupData {
* @note This option is only valid for full packets and for final
* partial packets when using partials without algorithm chaining.
* @note The value of this field is ignored for the authenticated ciphers
* (AES_CCM and AES_GCM). Digest verification is always done for these
* (AES_CCM and AES_GCM). Digest verification is always done for these
* (when the direction is decrypt) and unless the DP API is used,
* the message buffer will be zeroed if verification fails. When using the
* DP API, it is the API clients responsibility to clear the message
@ -938,6 +941,7 @@ typedef struct _CpaCySymOpData {
* operation, this field is not used and should be set to 0. Instead
* the AAD data should be placed in the source buffer.
*/
} CpaCySymOpData;
/**
@ -961,7 +965,7 @@ typedef struct _CpaCySymOpData {
* @description
* This macro sets the additional authentication data in the
* appropriate location of the@ref CpaCySymOpData struct for the
* authenticated encryptionalgorithm @ref CPA_CY_SYM_HASH_AES_CCM.
* authenticated encryption algorithm @ref CPA_CY_SYM_HASH_AES_CCM.
****************************************************************************/
#define CPA_CY_SYM_CCM_SET_AAD(pOpData, pAad, aadLen) do { \
memcpy(&pOpData->pAdditionalAuthData[18], pAad, aadLen); \
@ -1122,10 +1126,10 @@ typedef void (*CpaCySymCbFunc)(void *pCallbackTag,
* implementations)
* (2) between different releases of the same API implementation.
*
* The size returned by this function is the smallest size needed to
* The size returned by this function is the smallest size needed to
* support all possible combinations of setup data parameters. Some
* setup data parameter combinations may fit within a smaller session
* context size. The alternate cpaCySymSessionCtxGetDynamicSize()
* setup data parameter combinations may fit within a smaller session
* context size. The alternate cpaCySymSessionCtxGetDynamicSize()
* function will return the smallest size needed to fit the
* provided setup data parameters.
*
@ -1183,17 +1187,17 @@ cpaCySymSessionCtxGetSize(const CpaInstanceHandle instanceHandle,
* Gets the minimum size required to store a session context.
*
* @description
* This function is used by the client to determine the smallest size of
* the memory it must allocate in order to store the session context.
* This MUST be called before the client allocates the memory for the
* session context and before the client calls the @ref cpaCySymInitSession
* This function is used by the client to determine the smallest size of
* the memory it must allocate in order to store the session context.
* This MUST be called before the client allocates the memory for the
* session context and before the client calls the @ref cpaCySymInitSession
* function.
*
* This function is an alternate to cpaCySymSessionGetSize().
* cpaCySymSessionCtxGetSize() will return a fixed size which is the
* minimum memory size needed to support all possible setup data parameter
* combinations. cpaCySymSessionCtxGetDynamicSize() will return the
* minimum memory size needed to support the specific session setup
* cpaCySymSessionCtxGetSize() will return a fixed size which is the
* minimum memory size needed to support all possible setup data parameter
* combinations. cpaCySymSessionCtxGetDynamicSize() will return the
* minimum memory size needed to support the specific session setup
* data parameters provided. This size may be different for different setup
* data parameters.
*
@ -1564,7 +1568,7 @@ cpaCySymSessionInUse(CpaCySymSessionCtx sessionCtx,
* a multiple of the relevant block size.
* i.e. padding WILL NOT be applied to the data.
* For optimum performance, the buffer should
* only contain the data region that the
* only contain the data region that the
* cryptographic operation(s) must be performed on.
* Any additional data in the source buffer may be
* copied to the destination buffer and this copy

16
sys/dev/qat/qat_api/include/lac/cpa_cy_sym_dp.h
View file

@ -1,14 +1,14 @@
/***************************************************************************
*
* BSD LICENSE
*
* Copyright(c) 2007-2023 Intel Corporation. All rights reserved.
*
* Copyright(c) 2007-2025 Intel Corporation. All rights reserved.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
@ -18,7 +18,7 @@
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
@ -30,7 +30,7 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*
***************************************************************************/
@ -376,7 +376,7 @@ typedef struct _CpaCySymDpOpData {
* @description
* This is the callback function prototype. The callback function is
* registered by the application using the @ref cpaCySymDpRegCbFunc
* function call, and called back on completion of asycnhronous
* function call, and called back on completion of asynchronous
* requests made via calls to @ref cpaCySymDpEnqueueOp or @ref
* cpaCySymDpEnqueueOpBatch.
*
@ -428,7 +428,7 @@ typedef void (*CpaCySymDpCbFunc)(CpaCySymDpOpData *pOpData,
* @description
* This function allows a completion callback function to be registered.
* The registered callback function is invoked on completion of
* asycnhronous requests made via calls to @ref cpaCySymDpEnqueueOp
* asynchronous requests made via calls to @ref cpaCySymDpEnqueueOp
* or @ref cpaCySymDpEnqueueOpBatch.
*
* If a callback function was previously registered, it is overwritten.

4
sys/dev/qat/qat_api/qat_direct/include/icp_accel_devices.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/*****************************************************************************
* @file icp_accel_devices.h
*
@ -126,7 +126,7 @@ typedef struct accel_dev_s {
QatUtilsAtomic usageCounter; /* Usage counter. Prevents
shutting down the dev if not 0*/
Cpa32U deviceMemAvail; /* Device memory for intermediate buffers */
/* Component specific fields - cast to relevent layer */
/* Component specific fields - cast to relevant layer */
void *pRingInflight; /* For offload optimization */
void *pSalHandle; /* For SAL*/
void *pQatStats; /* For QATAL/SAL stats */

4
sys/dev/qat/qat_api/qat_direct/include/icp_adf_init.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
/*****************************************************************************
* @file icp_adf_init.h
*
@ -40,7 +40,7 @@ typedef enum icp_adf_ringInfoOperation_e {
} icp_adf_ringInfoOperation_t;
/*
* Ring generic serivce info private data
* Ring generic service info private data
*/
typedef enum icp_adf_ringInfoService_e {
ICP_ADF_RING_SERVICE_0 = 0,

6
sys/dev/qat/qat_api/qat_kernel/src/lac_adf_interface_freebsd.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
#include "adf_cfg.h"
#include "cpa.h"
#include "icp_accel_devices.h"
@ -288,8 +288,8 @@ icp_amgr_getAccelDevByCapabilities(Cpa32U capabilitiesMask,
/*
* icp_amgr_getAllAccelDevByEachCapabilities
* Returns table of accel devices that are started and implement
* each of the capabilities specified in capabilitiesMask.
* Returns table of accel devices that are started and that implement
* at least one of the capabilities specified in capabilitiesMask.
*/
CpaStatus
icp_amgr_getAllAccelDevByEachCapability(Cpa32U capabilitiesMask,

7
sys/dev/qat/qat_api/qat_utils/include/qat_utils.h
View file

@ -1,9 +1,8 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
#ifndef QAT_UTILS_H
#define QAT_UTILS_H
#include <sys/param.h>
#include <sys/ctype.h>
#include <sys/endian.h>
@ -830,7 +829,7 @@ CpaStatus qatUtilsHashSHA512Full(uint8_t *in, uint8_t *out, uint32_t len);
*
* @brief Single block AES encrypt
*
* @param key - pointer to symetric key.
* @param key - pointer to symmetric key.
* keyLenInBytes - key length
* in - pointer to data to encrypt
* out - pointer to output buffer for encrypted text
@ -853,7 +852,7 @@ CpaStatus qatUtilsAESEncrypt(uint8_t *key,
*
* @brief Converts AES forward key to reverse key
*
* @param key - pointer to symetric key.
* @param key - pointer to symmetric key.
* keyLenInBytes - key length
* out - pointer to output buffer for reversed key
* The in and out buffers need to be at least AES block size long

4
sys/dev/qat/qat_api/qat_utils/src/QatUtilsServices.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
#include "qat_utils.h"
#include <sys/param.h>
@ -20,7 +20,7 @@
*
* Data struct to store the information on the
* memory allocated. This structure is stored at the beginning of
* the allocated chunck of memory
* the allocated chunk of memory
* size is the no of byte passed to the memory allocation functions
* mSize is the real size of the memory required to the OS
*

1
sys/dev/qat/qat_common/qat_uclo.c
View file

@ -1623,6 +1623,7 @@ qat_uclo_map_auth_fw(struct icp_qat_fw_loader_handle *handle,
pr_err("QAT: error, input image size overflow %d\n", size);
return EINVAL;
}
length = (css_hdr->fw_type == CSS_AE_FIRMWARE) ?
ICP_QAT_CSS_AE_SIMG_LEN(device_id) + simg_offset :
size + ICP_QAT_CSS_FWSK_PAD_LEN(device_id) + simg_offset;