From 6d2a9bd669b395905085eed17a0d10c586dded02 Mon Sep 17 00:00:00 2001
From: Doug Ambrisko <ambrisko@FreeBSD.org>
Date: Wed, 20 Aug 2003 04:06:00 +0000
Subject: [PATCH] On Dell boxes such as the PE2650 we need to disable 3 led
 mode for the link LED to work.

Reviewed by:	wpaul
Obtained from:	Linux driver
---
 sys/dev/bge/if_bge.c    | 2 ++
 sys/dev/bge/if_bgereg.h | 7 +++++++
 sys/dev/mii/brgphy.c    | 7 +++++++
 3 files changed, 16 insertions(+)

diff --git a/sys/dev/bge/if_bge.c b/sys/dev/bge/if_bge.c
index 928fe3c5f26..838ba2b053c 100644
--- a/sys/dev/bge/if_bge.c
+++ b/sys/dev/bge/if_bge.c
@@ -1736,6 +1736,8 @@ bge_probe(dev)
 			    "%s, ASIC rev. %#04x", t->bge_name,
 			    pci_read_config(dev, BGE_PCI_MISC_CTL, 4) >> 16);
 			device_set_desc_copy(dev, descbuf);
+			if (pci_get_subvendor(dev) == DELL_VENDORID)
+				sc->bge_no_3_led = 1;
 			free(descbuf, M_TEMP);
 			return(0);
 		}
diff --git a/sys/dev/bge/if_bgereg.h b/sys/dev/bge/if_bgereg.h
index 330fb507cfd..53f22c798df 100644
--- a/sys/dev/bge/if_bgereg.h
+++ b/sys/dev/bge/if_bgereg.h
@@ -1856,6 +1856,12 @@ struct bge_status_block {
 #define ALTIMA_DEVICE_AC1000		0x03e8
 #define ALTIMA_DEVICE_AC9100	 	0x03ea			
 
+/*
+ * Dell PCI vendor ID
+ */
+
+#define DELL_VENDORID			0x1028
+
 /*
  * Offset of MAC address inside EEPROM.
  */
@@ -2267,6 +2273,7 @@ struct bge_softc {
 	u_int32_t		bge_chipid;
 	u_int8_t		bge_asicrev;
 	u_int8_t		bge_chiprev;
+	u_int8_t		bge_no_3_led;
 	struct bge_ring_data	bge_ldata;	/* rings */
 	struct bge_chain_data	bge_cdata;	/* mbufs */
 	u_int16_t		bge_tx_saved_considx;
diff --git a/sys/dev/mii/brgphy.c b/sys/dev/mii/brgphy.c
index ed86ca8afda..987de9553ec 100644
--- a/sys/dev/mii/brgphy.c
+++ b/sys/dev/mii/brgphy.c
@@ -620,4 +620,11 @@ brgphy_reset(struct mii_softc *sc)
 	PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7007);
 	val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
 	PHY_WRITE(sc, BRGPHY_MII_AUXCTL, val | (1 << 15) || (1 << 4));
+
+	/* Enable Link LED on Dell boxes */
+	if (bge_sc->bge_no_3_led) {
+		PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL, 
+		    PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL)
+		    & ~BRGPHY_PHY_EXTCTL_3_LED);
+	}
 }