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Add a comment documenting where the WMAC hangs off of.

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At some point it would be nice to correctly update the bus glue to make
this "correct", including having the DDR flush occur in the right spot
(ie, any AHB interrupt.)
This commit is contained in:
Adrian Chadd 2011-11-24 04:23:42 +00:00
parent 4a66e3c76d
commit 68d31a0864
1 changed files with 1 additions and 0 deletions
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sys/mips/conf/AR91XX_BASE.hints
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@ -32,6 +32,7 @@ hint.arge.1.maddr=0x1a000000
hint.arge.1.msize=0x1000
hint.arge.1.irq=3
# XXX The ath device hangs off of the AHB, rather than the Nexus.
hint.ath.0.at="nexus0"
hint.ath.0.maddr=0x180c0000
hint.ath.0.msize=0x30000