mirror of
https://github.com/opnsense/src.git
synced 2026-06-09 08:43:19 -04:00
Based in info gleaned from the web and other drivers (including the Linux
sx driver), change a magic value in the PLX bridge chip. Apparently later builds of the PCI cards had corrected values in the configuration eeprom. This change supposedly fixes some pci bus problems.
This commit is contained in:
parent
d31fc8ce59
commit
66e7bdd4dc
1 changed files with 23 additions and 0 deletions
|
|
@ -105,6 +105,29 @@ si_pci_attach(device_t dev)
|
|||
goto fail;
|
||||
}
|
||||
|
||||
if (pci_get_devid(dev) == 0x200011cb) {
|
||||
int rid;
|
||||
struct resource *plx_res;
|
||||
uint32_t *addr;
|
||||
uint32_t oldvalue;
|
||||
|
||||
/* Perform a PLX control register fixup */
|
||||
rid = PCIR_BAR(0);
|
||||
plx_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
|
||||
RF_ACTIVE);
|
||||
if (plx_res == NULL) {
|
||||
device_printf(dev, "couldn't map plx registers\n");
|
||||
} else {
|
||||
addr = rman_get_virtual(plx_res);
|
||||
oldvalue = addr[0x50 / 4];
|
||||
if (oldvalue != 0x18260000) {
|
||||
device_printf(dev, "PLX register 0x50: 0x%08x changed to 0x%08x\n", oldvalue, 0x18260000);
|
||||
addr[0x50 / 4] = 0x18260000;
|
||||
}
|
||||
bus_release_resource(dev, SYS_RES_MEMORY, rid, plx_res);
|
||||
}
|
||||
}
|
||||
|
||||
error = siattach(dev);
|
||||
if (error)
|
||||
goto fail;
|
||||
|
|
|
|||
Loading…
Reference in a new issue