diff --git a/sys/arm/arm/cpufunc.c b/sys/arm/arm/cpufunc.c index 6412357aebf..7f178a4eed0 100644 --- a/sys/arm/arm/cpufunc.c +++ b/sys/arm/arm/cpufunc.c @@ -1056,7 +1056,10 @@ set_cpufuncs() cputype == CPU_ID_CORTEXA9R1 || cputype == CPU_ID_CORTEXA9R2 || cputype == CPU_ID_CORTEXA9R3 || - cputype == CPU_ID_CORTEXA15 || + cputype == CPU_ID_CORTEXA15R0 || + cputype == CPU_ID_CORTEXA15R1 || + cputype == CPU_ID_CORTEXA15R2 || + cputype == CPU_ID_CORTEXA15R3 || cputype == CPU_ID_KRAIT ) { cpufuncs = cortexa_cpufuncs; cpu_reset_needs_v4_MMU_disable = 1; /* V4 or higher */ diff --git a/sys/arm/arm/identcpu.c b/sys/arm/arm/identcpu.c index 938f3219d14..955b9f53086 100644 --- a/sys/arm/arm/identcpu.c +++ b/sys/arm/arm/identcpu.c @@ -185,7 +185,13 @@ const struct cpuidtab cpuids[] = { generic_steppings }, { CPU_ID_CORTEXA9R3, CPU_CLASS_CORTEXA, "Cortex A9-r3", generic_steppings }, - { CPU_ID_CORTEXA15, CPU_CLASS_CORTEXA, "Cortex A15", + { CPU_ID_CORTEXA15R0, CPU_CLASS_CORTEXA, "Cortex A15-r0", + generic_steppings }, + { CPU_ID_CORTEXA15R1, CPU_CLASS_CORTEXA, "Cortex A15-r1", + generic_steppings }, + { CPU_ID_CORTEXA15R2, CPU_CLASS_CORTEXA, "Cortex A15-r2", + generic_steppings }, + { CPU_ID_CORTEXA15R3, CPU_CLASS_CORTEXA, "Cortex A15-r3", generic_steppings }, { CPU_ID_KRAIT, CPU_CLASS_KRAIT, "Krait", generic_steppings }, diff --git a/sys/arm/include/armreg.h b/sys/arm/include/armreg.h index d892f216845..2f21f7c58d1 100644 --- a/sys/arm/include/armreg.h +++ b/sys/arm/include/armreg.h @@ -123,7 +123,10 @@ #define CPU_ID_CORTEXA9R1 0x411fc090 #define CPU_ID_CORTEXA9R2 0x412fc090 #define CPU_ID_CORTEXA9R3 0x413fc090 -#define CPU_ID_CORTEXA15 0x410fc0f0 +#define CPU_ID_CORTEXA15R0 0x410fc0f0 +#define CPU_ID_CORTEXA15R1 0x411fc0f0 +#define CPU_ID_CORTEXA15R2 0x412fc0f0 +#define CPU_ID_CORTEXA15R3 0x413fc0f0 #define CPU_ID_KRAIT 0x510f06f0 /* Snapdragon S4 Pro/APQ8064 */ #define CPU_ID_TI925T 0x54029250 #define CPU_ID_MV88FR131 0x56251310 /* Marvell Feroceon 88FR131 Core */