From 6507a8fecb167fcf8a52cb7fb20c2483020c41db Mon Sep 17 00:00:00 2001
From: Michal Meloun <mmel@FreeBSD.org>
Date: Sun, 20 Sep 2020 17:28:24 +0000
Subject: [PATCH] Adjust DMA alignment for USB stack. It should be at least as
 large as the maximum value of caheline size for currently known CPUs.

MFC after:	2 weeks
---
 sys/arm64/conf/GENERIC | 1 +
 1 file changed, 1 insertion(+)

diff --git a/sys/arm64/conf/GENERIC b/sys/arm64/conf/GENERIC
index 2fb1b6a6c2e..89d764fc787 100644
--- a/sys/arm64/conf/GENERIC
+++ b/sys/arm64/conf/GENERIC
@@ -218,6 +218,7 @@ device		uart_snps
 device		pl011
 
 # USB support
+options 	USB_HOST_ALIGN=64	# Align usb buffers to cache line size.
 device		aw_usbphy		# Allwinner USB PHY
 device		rk_usb2phy		# Rockchip USB2PHY
 device		rk_typec_phy		# Rockchip TypeC PHY