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ice: Update to 1.42.1-k

Browse source 
Summary:
- Adds E830 device support
- Adds pre-release E825C support (for the Ethernet device included in
  an upcoming Xeon D platform)
- Add sysctl for E810 devices to print out PHY debug statistics (mostly
  for FEC debugging)
- Adds per-TX-queue tso counter sysctl to count how many times a TSO offload
  was requested for a packet, matching other Intel drivers
- Various bug fixes

Signed-off-by: Eric Joyner <erj@FreeBSD.org>

Tested by:	Jeffrey Pieper <jeffrey.e.pieper@intel.com>
Relnotes:	yes
Sponsored by:	Intel Corporation
Differential Revisison:	https://reviews.freebsd.org/D46949

(cherry picked from commit f2635e844dd138ac9dfba676f27d41750049af26)
This commit is contained in:
Eric Joyner 2024-08-29 15:41:20 -07:00
parent a9d78bb714
commit 5cf8640220
No known key found for this signature in database
GPG key ID: 96F0C6FD61E05DE3
40 changed files with 5682 additions and 2160 deletions
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191
sys/dev/ice/ice_adminq_cmd.h
View file

@ -187,7 +187,7 @@ struct ice_aqc_list_caps_elem {
#define ICE_AQC_CAPS_ROCEV2_LAG 0x0092
#define ICE_AQC_BIT_ROCEV2_LAG 0x01
#define ICE_AQC_BIT_SRIOV_LAG 0x02
#define ICE_AQC_CAPS_NEXT_CLUSTER_ID 0x0096
u8 major_ver;
u8 minor_ver;
/* Number of resources described by this capability */
@ -320,7 +320,12 @@ struct ice_aqc_set_port_params {
(0x3F << ICE_AQC_SET_P_PARAMS_LOGI_PORT_ID_S)
#define ICE_AQC_SET_P_PARAMS_IS_LOGI_PORT BIT(14)
#define ICE_AQC_SET_P_PARAMS_SWID_VALID BIT(15)
u8 reserved[10];
u8 lb_mode;
#define ICE_AQC_SET_P_PARAMS_LOOPBACK_MODE_VALID BIT(2)
#define ICE_AQC_SET_P_PARAMS_LOOPBACK_MODE_NORMAL 0x00
#define ICE_AQC_SET_P_PARAMS_LOOPBACK_MODE_NO 0x01
#define ICE_AQC_SET_P_PARAMS_LOOPBACK_MODE_HIGH 0x02
u8 reserved[9];
};
/* These resource type defines are used for all switch resource
@ -1389,7 +1394,18 @@ struct ice_aqc_get_phy_caps {
#define ICE_PHY_TYPE_HIGH_100G_CAUI2 BIT_ULL(2)
#define ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC BIT_ULL(3)
#define ICE_PHY_TYPE_HIGH_100G_AUI2 BIT_ULL(4)
#define ICE_PHY_TYPE_HIGH_MAX_INDEX 4
#define ICE_PHY_TYPE_HIGH_200G_CR4_PAM4 BIT_ULL(5)
#define ICE_PHY_TYPE_HIGH_200G_SR4 BIT_ULL(6)
#define ICE_PHY_TYPE_HIGH_200G_FR4 BIT_ULL(7)
#define ICE_PHY_TYPE_HIGH_200G_LR4 BIT_ULL(8)
#define ICE_PHY_TYPE_HIGH_200G_DR4 BIT_ULL(9)
#define ICE_PHY_TYPE_HIGH_200G_KR4_PAM4 BIT_ULL(10)
#define ICE_PHY_TYPE_HIGH_200G_AUI4_AOC_ACC BIT_ULL(11)
#define ICE_PHY_TYPE_HIGH_200G_AUI4 BIT_ULL(12)
#define ICE_PHY_TYPE_HIGH_200G_AUI8_AOC_ACC BIT_ULL(13)
#define ICE_PHY_TYPE_HIGH_200G_AUI8 BIT_ULL(14)
#define ICE_PHY_TYPE_HIGH_400GBASE_FR8 BIT_ULL(15)
#define ICE_PHY_TYPE_HIGH_MAX_INDEX 15
struct ice_aqc_get_phy_caps_data {
__le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */
@ -1541,11 +1557,14 @@ struct ice_aqc_get_link_status {
enum ice_get_link_status_data_version {
ICE_GET_LINK_STATUS_DATA_V1 = 1,
ICE_GET_LINK_STATUS_DATA_V2 = 2,
};
#define ICE_GET_LINK_STATUS_DATALEN_V1 32
#define ICE_GET_LINK_STATUS_DATALEN_V2 56
/* Get link status response data structure, also used for Link Status Event */
#pragma pack(1)
struct ice_aqc_get_link_status_data {
u8 topo_media_conflict;
#define ICE_AQ_LINK_TOPO_CONFLICT BIT(0)
@ -1618,7 +1637,7 @@ struct ice_aqc_get_link_status_data {
#define ICE_AQ_LINK_PWR_QSFP_CLASS_3 2
#define ICE_AQ_LINK_PWR_QSFP_CLASS_4 3
__le16 link_speed;
#define ICE_AQ_LINK_SPEED_M 0x7FF
#define ICE_AQ_LINK_SPEED_M 0xFFF
#define ICE_AQ_LINK_SPEED_10MB BIT(0)
#define ICE_AQ_LINK_SPEED_100MB BIT(1)
#define ICE_AQ_LINK_SPEED_1000MB BIT(2)
@ -1630,12 +1649,37 @@ struct ice_aqc_get_link_status_data {
#define ICE_AQ_LINK_SPEED_40GB BIT(8)
#define ICE_AQ_LINK_SPEED_50GB BIT(9)
#define ICE_AQ_LINK_SPEED_100GB BIT(10)
#define ICE_AQ_LINK_SPEED_200GB BIT(11)
#define ICE_AQ_LINK_SPEED_UNKNOWN BIT(15)
__le32 reserved3; /* Aligns next field to 8-byte boundary */
__le16 reserved3; /* Aligns next field to 8-byte boundary */
u8 ext_fec_status;
#define ICE_AQ_LINK_RS_272_FEC_EN BIT(0) /* RS 272 FEC enabled */
u8 reserved4;
__le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */
__le64 phy_type_high; /* Use values from ICE_PHY_TYPE_HIGH_* */
/* Get link status version 2 link partner data */
__le64 lp_phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */
__le64 lp_phy_type_high; /* Use values from ICE_PHY_TYPE_HIGH_* */
u8 lp_fec_adv;
#define ICE_AQ_LINK_LP_10G_KR_FEC_CAP BIT(0)
#define ICE_AQ_LINK_LP_25G_KR_FEC_CAP BIT(1)
#define ICE_AQ_LINK_LP_RS_528_FEC_CAP BIT(2)
#define ICE_AQ_LINK_LP_50G_KR_272_FEC_CAP BIT(3)
#define ICE_AQ_LINK_LP_100G_KR_272_FEC_CAP BIT(4)
#define ICE_AQ_LINK_LP_200G_KR_272_FEC_CAP BIT(5)
u8 lp_fec_req;
#define ICE_AQ_LINK_LP_10G_KR_FEC_REQ BIT(0)
#define ICE_AQ_LINK_LP_25G_KR_FEC_REQ BIT(1)
#define ICE_AQ_LINK_LP_RS_528_FEC_REQ BIT(2)
#define ICE_AQ_LINK_LP_KR_272_FEC_REQ BIT(3)
u8 lp_flowcontrol;
#define ICE_AQ_LINK_LP_PAUSE_ADV BIT(0)
#define ICE_AQ_LINK_LP_ASM_DIR_ADV BIT(1)
u8 reserved[5];
};
#pragma pack()
/* Set event mask command (direct 0x0613) */
struct ice_aqc_set_event_mask {
u8 lport_num;
@ -1793,14 +1837,46 @@ struct ice_aqc_dnl_call_command {
u8 ctx; /* Used in command, reserved in response */
u8 reserved;
__le16 activity_id;
#define ICE_AQC_ACT_ID_DNL 0x1129
__le32 reserved1;
__le32 addr_high;
__le32 addr_low;
};
struct ice_aqc_dnl_equa_param {
__le16 data_in;
#define ICE_AQC_RX_EQU_SHIFT 8
#define ICE_AQC_RX_EQU_PRE2 (0x10 << ICE_AQC_RX_EQU_SHIFT)
#define ICE_AQC_RX_EQU_PRE1 (0x11 << ICE_AQC_RX_EQU_SHIFT)
#define ICE_AQC_RX_EQU_POST1 (0x12 << ICE_AQC_RX_EQU_SHIFT)
#define ICE_AQC_RX_EQU_BFLF (0x13 << ICE_AQC_RX_EQU_SHIFT)
#define ICE_AQC_RX_EQU_BFHF (0x14 << ICE_AQC_RX_EQU_SHIFT)
#define ICE_AQC_RX_EQU_DRATE (0x15 << ICE_AQC_RX_EQU_SHIFT)
#define ICE_AQC_TX_EQU_PRE1 0x0
#define ICE_AQC_TX_EQU_PRE3 0x3
#define ICE_AQC_TX_EQU_ATTEN 0x4
#define ICE_AQC_TX_EQU_POST1 0x8
#define ICE_AQC_TX_EQU_PRE2 0xC
__le16 op_code_serdes_sel;
#define ICE_AQC_OP_CODE_SHIFT 4
#define ICE_AQC_OP_CODE_RX_EQU (0x9 << ICE_AQC_OP_CODE_SHIFT)
#define ICE_AQC_OP_CODE_TX_EQU (0x10 << ICE_AQC_OP_CODE_SHIFT)
__le32 reserved[3];
};
struct ice_aqc_dnl_equa_resp {
/* Equalization value can be -ve */
int val;
__le32 reserved[3];
};
/* DNL call command/response buffer (indirect 0x0682) */
struct ice_aqc_dnl_call {
__le32 stores[4];
union {
struct ice_aqc_dnl_equa_param txrx_equa_reqs;
__le32 stores[4];
struct ice_aqc_dnl_equa_resp txrx_equa_resp;
} sto;
};
/* Used for both commands:
@ -1902,8 +1978,8 @@ struct ice_aqc_link_topo_addr {
#define ICE_AQC_LINK_TOPO_HANDLE_M (0x3FF << ICE_AQC_LINK_TOPO_HANDLE_S)
/* Used to decode the handle field */
#define ICE_AQC_LINK_TOPO_HANDLE_BRD_TYPE_M BIT(9)
#define ICE_AQC_LINK_TOPO_HANDLE_BRD_TYPE_LOM BIT(9)
#define ICE_AQC_LINK_TOPO_HANDLE_BRD_TYPE_MEZZ 0
#define ICE_AQC_LINK_TOPO_HANDLE_BRD_TYPE_LOM 0
#define ICE_AQC_LINK_TOPO_HANDLE_BRD_TYPE_MEZZ BIT(9)
#define ICE_AQC_LINK_TOPO_HANDLE_NODE_S 0
/* In case of a Mezzanine type */
#define ICE_AQC_LINK_TOPO_HANDLE_MEZZ_NODE_M \
@ -1919,7 +1995,7 @@ struct ice_aqc_link_topo_addr {
struct ice_aqc_get_link_topo {
struct ice_aqc_link_topo_addr addr;
u8 node_part_num;
#define ICE_ACQ_GET_LINK_TOPO_NODE_NR_PCA9575 0x21
#define ICE_AQC_GET_LINK_TOPO_NODE_NR_PCA9575 0x21
u8 rsvd[9];
};
@ -2054,6 +2130,7 @@ struct ice_aqc_get_port_options_elem {
#define ICE_AQC_PORT_OPT_MAX_LANE_25G 5
#define ICE_AQC_PORT_OPT_MAX_LANE_50G 6
#define ICE_AQC_PORT_OPT_MAX_LANE_100G 7
#define ICE_AQC_PORT_OPT_MAX_LANE_200G 8
u8 global_scid[2];
u8 phy_scid[2];
u8 pf2port_cid[2];
@ -2201,6 +2278,29 @@ struct ice_aqc_nvm {
#define ICE_AQC_NVM_LLDP_STATUS_M_LEN 4 /* In Bits */
#define ICE_AQC_NVM_LLDP_STATUS_RD_LEN 4 /* In Bytes */
#define ICE_AQC_NVM_SDP_CFG_PTR_OFFSET 0xD8
#define ICE_AQC_NVM_SDP_CFG_PTR_RD_LEN 2 /* In Bytes */
#define ICE_AQC_NVM_SDP_CFG_PTR_M MAKEMASK(0x7FFF, 0)
#define ICE_AQC_NVM_SDP_CFG_PTR_TYPE_M BIT(15)
#define ICE_AQC_NVM_SDP_CFG_HEADER_LEN 2 /* In Bytes */
#define ICE_AQC_NVM_SDP_CFG_SEC_LEN_LEN 2 /* In Bytes */
#define ICE_AQC_NVM_SDP_CFG_DATA_LEN 14 /* In Bytes */
#define ICE_AQC_NVM_SDP_CFG_MAX_SECTION_SIZE 7
#define ICE_AQC_NVM_SDP_CFG_PIN_SIZE 10
#define ICE_AQC_NVM_SDP_CFG_PIN_OFFSET 6
#define ICE_AQC_NVM_SDP_CFG_PIN_MASK MAKEMASK(0x3FF, \
ICE_AQC_NVM_SDP_CFG_PIN_OFFSET)
#define ICE_AQC_NVM_SDP_CFG_CHAN_OFFSET 4
#define ICE_AQC_NVM_SDP_CFG_CHAN_MASK MAKEMASK(0x3, \
ICE_AQC_NVM_SDP_CFG_CHAN_OFFSET)
#define ICE_AQC_NVM_SDP_CFG_DIR_OFFSET 3
#define ICE_AQC_NVM_SDP_CFG_DIR_MASK MAKEMASK(0x1, \
ICE_AQC_NVM_SDP_CFG_DIR_OFFSET)
#define ICE_AQC_NVM_SDP_CFG_SDP_NUM_OFFSET 0
#define ICE_AQC_NVM_SDP_CFG_SDP_NUM_MASK MAKEMASK(0x7, \
ICE_AQC_NVM_SDP_CFG_SDP_NUM_OFFSET)
#define ICE_AQC_NVM_SDP_CFG_NA_PIN_MASK MAKEMASK(0x1, 15)
#define ICE_AQC_NVM_MINSREV_MOD_ID 0x130
#define ICE_AQC_NVM_TX_TOPO_MOD_ID 0x14B
#define ICE_AQC_NVM_CMPO_MOD_ID 0x153
@ -2265,6 +2365,29 @@ struct ice_aqc_nvm_checksum {
u8 rsvd2[12];
};
/* Used for NVM Sanitization command - 0x070C */
struct ice_aqc_nvm_sanitization {
u8 cmd_flags;
#define ICE_AQ_NVM_SANITIZE_REQ_READ 0
#define ICE_AQ_NVM_SANITIZE_REQ_OPERATE BIT(0)
#define ICE_AQ_NVM_SANITIZE_READ_SUBJECT_NVM_BITS 0
#define ICE_AQ_NVM_SANITIZE_READ_SUBJECT_NVM_STATE BIT(1)
#define ICE_AQ_NVM_SANITIZE_OPERATE_SUBJECT_CLEAR 0
u8 values;
#define ICE_AQ_NVM_SANITIZE_NVM_BITS_HOST_CLEAN_SUPPORT BIT(0)
#define ICE_AQ_NVM_SANITIZE_NVM_BITS_BMC_CLEAN_SUPPORT BIT(2)
#define ICE_AQ_NVM_SANITIZE_NVM_STATE_HOST_CLEAN_DONE BIT(0)
#define ICE_AQ_NVM_SANITIZE_NVM_STATE_HOST_CLEAN_SUCCESS BIT(1)
#define ICE_AQ_NVM_SANITIZE_NVM_STATE_BMC_CLEAN_DONE BIT(2)
#define ICE_AQ_NVM_SANITIZE_NVM_STATE_BMC_CLEAN_SUCCESS BIT(3)
#define ICE_AQ_NVM_SANITIZE_OPERATE_HOST_CLEAN_DONE BIT(0)
#define ICE_AQ_NVM_SANITIZE_OPERATE_HOST_CLEAN_SUCCESS BIT(1)
#define ICE_AQ_NVM_SANITIZE_OPERATE_BMC_CLEAN_DONE BIT(2)
#define ICE_AQ_NVM_SANITIZE_OPERATE_BMC_CLEAN_SUCCESS BIT(3)
u8 reserved[14];
};
/*
* Send to PF command (indirect 0x0801) ID is only used by PF
*
@ -2560,6 +2683,15 @@ struct ice_aqc_get_set_rss_lut {
__le32 addr_low;
};
/* Sideband Control Interface Commands */
/* Neighbor Device Request (indirect 0x0C00); also used for the response. */
struct ice_aqc_neigh_dev_req {
__le16 sb_data_len;
u8 reserved[6];
__le32 addr_high;
__le32 addr_low;
};
/* Add Tx LAN Queues (indirect 0x0C30) */
struct ice_aqc_add_txqs {
u8 num_qgrps;
@ -2812,19 +2944,33 @@ struct ice_aqc_event_lan_overflow {
/* Debug Dump Internal Data (indirect 0xFF08) */
struct ice_aqc_debug_dump_internals {
__le16 cluster_id; /* Expresses next cluster ID in response */
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_SW 0
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_TXSCHED 2
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_PROFILES 3
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_SW_E810 0
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_ACL_E810 1
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_TXSCHED_E810 2
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_PROFILES_E810 3
/* EMP_DRAM only dumpable in device debug mode */
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_EMP_DRAM 4
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_LINK 5
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_EMP_DRAM_E810 4
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_LINK_E810 5
/* AUX_REGS only dumpable in device debug mode */
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_AUX_REGS 6
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_DCB 7
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_L2P 8
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_QUEUE_MNG 9
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_FULL_CSR_SPACE 21
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_MNG_TRANSACTIONS 22
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_AUX_REGS_E810 6
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_DCB_E810 7
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_L2P_E810 8
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_QUEUE_MNG_E810 9
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_FULL_CSR_SPACE_E810 21
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_MNG_TRANSACTIONS_E810 22
/* Start cluster to discover first available cluster */
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_START_ALL 0
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_SW_E830 100
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_ACL_E830 101
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_TXSCHED_E830 102
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_PROFILES_E830 103
/* EMP_DRAM only dumpable in device debug mode */
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_LINK_E830 105
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_DCB_E830 107
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_L2P_E830 108
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_QUEUE_MNG_E830 109
#define ICE_AQC_DBG_DUMP_CLUSTER_ID_FULL_CSR_SPACE_E830 121
__le16 table_id; /* Used only for non-memory clusters */
__le32 idx; /* In table entries for tables, in bytes for memory */
__le32 addr_high;
@ -3076,6 +3222,7 @@ struct ice_aq_desc {
struct ice_aqc_nvm nvm;
struct ice_aqc_nvm_cfg nvm_cfg;
struct ice_aqc_nvm_checksum nvm_checksum;
struct ice_aqc_nvm_sanitization sanitization;
struct ice_aqc_pf_vf_msg virt;
struct ice_aqc_read_write_alt_direct read_write_alt_direct;
struct ice_aqc_read_write_alt_indirect read_write_alt_indirect;
@ -3095,6 +3242,7 @@ struct ice_aq_desc {
struct ice_aqc_lldp_filter_ctrl lldp_filter_ctrl;
struct ice_aqc_get_set_rss_lut get_set_rss_lut;
struct ice_aqc_get_set_rss_key get_set_rss_key;
struct ice_aqc_neigh_dev_req neigh_dev;
struct ice_aqc_add_txqs add_txqs;
struct ice_aqc_dis_txqs dis_txqs;
struct ice_aqc_move_txqs move_txqs;
@ -3330,6 +3478,7 @@ enum ice_adminq_opc {
ice_aqc_opc_nvm_update_empr = 0x0709,
ice_aqc_opc_nvm_pkg_data = 0x070A,
ice_aqc_opc_nvm_pass_component_tbl = 0x070B,
ice_aqc_opc_nvm_sanitization = 0x070C,
/* PF/VF mailbox commands */
ice_mbx_opc_send_msg_to_pf = 0x0801,
@ -3360,6 +3509,8 @@ enum ice_adminq_opc {
ice_aqc_opc_set_rss_lut = 0x0B03,
ice_aqc_opc_get_rss_key = 0x0B04,
ice_aqc_opc_get_rss_lut = 0x0B05,
/* Sideband Control Interface commands */
ice_aqc_opc_neighbour_device_request = 0x0C00,
/* Tx queue handling commands/events */
ice_aqc_opc_add_txqs = 0x0C30,

4
sys/dev/ice/ice_bitops.h
View file

@ -445,10 +445,10 @@ ice_bitmap_set(ice_bitmap_t *dst, u16 pos, u16 num_bits)
* Note that this function assumes it is operating on a bitmap declared using
* ice_declare_bitmap.
*/
static inline int
static inline u16
ice_bitmap_hweight(ice_bitmap_t *bm, u16 size)
{
int count = 0;
u16 count = 0;
u16 bit = 0;
while (size > (bit = ice_find_next_bit(bm, size, bit))) {

975
sys/dev/ice/ice_common.c
View file

File diff suppressed because it is too large Load diff

189
sys/dev/ice/ice_common.h
View file

@ -41,6 +41,9 @@
#define ICE_SQ_SEND_DELAY_TIME_MS 10
#define ICE_SQ_SEND_MAX_EXECUTE 3
#define LOOPBACK_MODE_NO 0
#define LOOPBACK_MODE_HIGH 2
enum ice_fw_modes {
ICE_FW_MODE_NORMAL,
ICE_FW_MODE_DBG,
@ -51,49 +54,55 @@ enum ice_fw_modes {
void ice_idle_aq(struct ice_hw *hw, struct ice_ctl_q_info *cq);
bool ice_sq_done(struct ice_hw *hw, struct ice_ctl_q_info *cq);
int ice_init_fltr_mgmt_struct(struct ice_hw *hw);
void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw);
void ice_set_umac_shared(struct ice_hw *hw);
enum ice_status ice_init_hw(struct ice_hw *hw);
int ice_init_hw(struct ice_hw *hw);
void ice_deinit_hw(struct ice_hw *hw);
enum ice_status ice_check_reset(struct ice_hw *hw);
enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req);
enum ice_status ice_create_all_ctrlq(struct ice_hw *hw);
enum ice_status ice_init_all_ctrlq(struct ice_hw *hw);
int ice_check_reset(struct ice_hw *hw);
int ice_reset(struct ice_hw *hw, enum ice_reset_req req);
int ice_create_all_ctrlq(struct ice_hw *hw);
int ice_init_all_ctrlq(struct ice_hw *hw);
void ice_shutdown_all_ctrlq(struct ice_hw *hw, bool unloading);
void ice_destroy_all_ctrlq(struct ice_hw *hw);
enum ice_status
int
ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,
struct ice_rq_event_info *e, u16 *pending);
enum ice_status
int
ice_get_link_status(struct ice_port_info *pi, bool *link_up);
enum ice_status ice_update_link_info(struct ice_port_info *pi);
enum ice_status
int ice_update_link_info(struct ice_port_info *pi);
int
ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
enum ice_aq_res_access_type access, u32 timeout);
void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res);
enum ice_status
int
ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res);
enum ice_status
int
ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res);
enum ice_status
int
ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,
struct ice_aqc_alloc_free_res_elem *buf, u16 buf_size,
enum ice_adminq_opc opc, struct ice_sq_cd *cd);
enum ice_status
int
ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
struct ice_aq_desc *desc, void *buf, u16 buf_size,
struct ice_sq_cd *cd);
int
ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,
struct ice_aq_desc *desc, void *buf, u16 buf_size,
struct ice_sq_cd *cd);
void ice_clear_pxe_mode(struct ice_hw *hw);
enum ice_status ice_get_caps(struct ice_hw *hw);
int ice_get_caps(struct ice_hw *hw);
void ice_set_safe_mode_caps(struct ice_hw *hw);
enum ice_status
int
ice_aq_get_internal_data(struct ice_hw *hw, u16 cluster_id, u16 table_id,
u32 start, void *buf, u16 buf_size, u16 *ret_buf_size,
u16 *ret_next_cluster, u16 *ret_next_table,
u32 *ret_next_index, struct ice_sq_cd *cd);
enum ice_status ice_set_mac_type(struct ice_hw *hw);
int ice_set_mac_type(struct ice_hw *hw);
/* Define a macro that will align a pointer to point to the next memory address
* that falls on the given power of 2 (i.e., 2, 4, 8, 16, 32, 64...). For
@ -108,108 +117,110 @@ enum ice_status ice_set_mac_type(struct ice_hw *hw);
#define ice_arr_elem_idx(idx, val) [(idx)] = (val)
enum ice_status
int
ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
u32 rxq_index);
enum ice_status
int
ice_read_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
u32 rxq_index);
enum ice_status ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index);
enum ice_status
int ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index);
int
ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index);
enum ice_status
int
ice_write_tx_cmpltnq_ctx(struct ice_hw *hw,
struct ice_tx_cmpltnq_ctx *tx_cmpltnq_ctx,
u32 tx_cmpltnq_index);
enum ice_status
int
ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index);
enum ice_status
int
ice_write_tx_drbell_q_ctx(struct ice_hw *hw,
struct ice_tx_drbell_q_ctx *tx_drbell_q_ctx,
u32 tx_drbell_q_index);
int ice_lut_size_to_type(int lut_size);
enum ice_status
int
ice_aq_get_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *get_params);
enum ice_status
int
ice_aq_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *set_params);
enum ice_status
int
ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,
struct ice_aqc_get_set_rss_keys *keys);
enum ice_status
int
ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
struct ice_aqc_get_set_rss_keys *keys);
enum ice_status
int
ice_aq_add_lan_txq(struct ice_hw *hw, u8 count,
struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_move_recfg_lan_txq(struct ice_hw *hw, u8 num_qs, bool is_move,
bool is_tc_change, bool subseq_call, bool flush_pipe,
u8 timeout, u32 *blocked_cgds,
struct ice_aqc_move_txqs_data *buf, u16 buf_size,
u8 *txqs_moved, struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_add_rdma_qsets(struct ice_hw *hw, u8 num_qset_grps,
struct ice_aqc_add_rdma_qset_data *qset_list,
u16 buf_size, struct ice_sq_cd *cd);
bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq);
enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);
int ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);
void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode);
extern const struct ice_ctx_ele ice_tlan_ctx_info[];
enum ice_status
int
ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,
const struct ice_ctx_ele *ce_info);
enum ice_status
int
ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info);
enum ice_status
int
ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc,
void *buf, u16 buf_size, struct ice_sq_cd *cd);
enum ice_status ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd);
int ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_send_driver_ver(struct ice_hw *hw, struct ice_driver_ver *dv,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_set_port_params(struct ice_port_info *pi, u16 bad_frame_vsi,
bool save_bad_pac, bool pad_short_pac, bool double_vlan,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,
struct ice_aqc_get_phy_caps_data *caps,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd,
u8 *node_part_number, u16 *node_handle);
enum ice_status
int
ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number,
u16 *node_handle);
void
ice_update_phy_type(u64 *phy_type_low, u64 *phy_type_high,
u16 link_speeds_bitmap);
enum ice_status
int
ice_aq_manage_mac_read(struct ice_hw *hw, void *buf, u16 buf_size,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags,
struct ice_sq_cd *cd);
enum ice_status ice_clear_pf_cfg(struct ice_hw *hw);
enum ice_status
int ice_clear_pf_cfg(struct ice_hw *hw);
int
ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,
struct ice_aqc_set_phy_cfg_data *cfg, struct ice_sq_cd *cd);
bool ice_fw_supports_link_override(struct ice_hw *hw);
bool ice_fw_supports_fec_dis_auto(struct ice_hw *hw);
enum ice_status
int
ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,
struct ice_port_info *pi);
bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps);
int ice_aq_get_phy_equalization(struct ice_hw *hw, u16 data_in, u16 op_code,
u8 serdes_num, int *output);
enum ice_fc_mode ice_caps_to_fc_mode(u8 caps);
enum ice_fec_mode ice_caps_to_fec_mode(u8 caps, u8 fec_options);
enum ice_status
int
ice_set_fc(struct ice_port_info *pi, u8 *aq_failures,
bool ena_auto_link_update);
bool
@ -219,84 +230,89 @@ void
ice_copy_phy_caps_to_cfg(struct ice_port_info *pi,
struct ice_aqc_get_phy_caps_data *caps,
struct ice_aqc_set_phy_cfg_data *cfg);
enum ice_status
int
ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
enum ice_fec_mode fec);
enum ice_status
int
ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, bool auto_drop,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
struct ice_link_status *link, struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr,
u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length,
bool write, struct ice_sq_cd *cd);
u32 ice_get_link_speed(u16 index);
enum ice_status
int
ice_aq_prog_topo_dev_nvm(struct ice_hw *hw,
struct ice_aqc_link_topo_params *topo_params,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_read_topo_dev_nvm(struct ice_hw *hw,
struct ice_aqc_link_topo_params *topo_params,
u32 start_address, u8 *buf, u8 buf_size,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_get_port_options(struct ice_hw *hw,
struct ice_aqc_get_port_options_elem *options,
u8 *option_count, u8 lport, bool lport_valid,
u8 *active_option_idx, bool *active_option_valid,
u8 *pending_option_idx, bool *pending_option_valid);
enum ice_status
int
ice_aq_set_port_option(struct ice_hw *hw, u8 lport, u8 lport_valid,
u8 new_option);
enum ice_status
int
__ice_write_sr_word(struct ice_hw *hw, u32 offset, const u16 *data);
enum ice_status
int
__ice_write_sr_buf(struct ice_hw *hw, u32 offset, u16 words, const u16 *data);
enum ice_status
int
ice_cfg_vsi_rdma(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap,
u16 *max_rdmaqs);
enum ice_status
int
ice_ena_vsi_rdma_qset(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
u16 *rdma_qset, u16 num_qsets, u32 *qset_teid);
enum ice_status
int
ice_dis_vsi_rdma_qset(struct ice_port_info *pi, u16 count, u32 *qset_teid,
u16 *q_id);
enum ice_status
int
ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
u16 *q_handle, u16 *q_ids, u32 *q_teids,
enum ice_disq_rst_src rst_src, u16 vmvf_num,
struct ice_sq_cd *cd);
enum ice_status
int
ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap,
u16 *max_lanqs);
enum ice_status
int
ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
struct ice_sq_cd *cd);
enum ice_status
int
ice_replay_pre_init(struct ice_hw *hw, struct ice_switch_info *sw);
enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle);
int ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle);
void ice_replay_post(struct ice_hw *hw);
struct ice_q_ctx *
ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle);
enum ice_status
int ice_sbq_rw_reg_lp(struct ice_hw *hw, struct ice_sbq_msg_input *in,
u16 flag, bool lock);
void ice_sbq_lock(struct ice_hw *hw);
void ice_sbq_unlock(struct ice_hw *hw);
int ice_sbq_rw_reg(struct ice_hw *hw, struct ice_sbq_msg_input *in, u16 flag);
int
ice_aq_get_sensor_reading(struct ice_hw *hw, u8 sensor, u8 format,
struct ice_aqc_get_sensor_reading_resp *data,
struct ice_sq_cd *cd);
@ -311,50 +327,53 @@ ice_stat_update_repc(struct ice_hw *hw, u16 vsi_handle, bool prev_stat_loaded,
struct ice_eth_stats *cur_stats);
enum ice_fw_modes ice_get_fw_mode(struct ice_hw *hw);
void ice_print_rollback_msg(struct ice_hw *hw);
bool ice_is_generic_mac(struct ice_hw *hw);
bool ice_is_e810(struct ice_hw *hw);
bool ice_is_e810t(struct ice_hw *hw);
bool ice_is_e830(struct ice_hw *hw);
bool ice_is_e825c(struct ice_hw *hw);
bool ice_is_e823(struct ice_hw *hw);
enum ice_status
int
ice_aq_alternate_write(struct ice_hw *hw, u32 reg_addr0, u32 reg_val0,
u32 reg_addr1, u32 reg_val1);
enum ice_status
int
ice_aq_alternate_read(struct ice_hw *hw, u32 reg_addr0, u32 *reg_val0,
u32 reg_addr1, u32 *reg_val1);
enum ice_status
int
ice_aq_alternate_write_done(struct ice_hw *hw, u8 bios_mode,
bool *reset_needed);
enum ice_status ice_aq_alternate_clear(struct ice_hw *hw);
enum ice_status
int ice_aq_alternate_clear(struct ice_hw *hw);
int
ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
struct ice_aqc_txsched_elem_data *buf);
enum ice_status
int
ice_get_cur_lldp_persist_status(struct ice_hw *hw, u32 *lldp_status);
enum ice_status
int
ice_get_dflt_lldp_persist_status(struct ice_hw *hw, u32 *lldp_status);
enum ice_status
int
ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,
bool *value, struct ice_sq_cd *cd);
bool ice_is_100m_speed_supported(struct ice_hw *hw);
enum ice_status ice_get_netlist_ver_info(struct ice_hw *hw, struct ice_netlist_info *netlist);
enum ice_status
int ice_get_netlist_ver_info(struct ice_hw *hw, struct ice_netlist_info *netlist);
int
ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
struct ice_sq_cd *cd);
bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw);
enum ice_status
int
ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add);
enum ice_status ice_lldp_execute_pending_mib(struct ice_hw *hw);
enum ice_status
int ice_lldp_execute_pending_mib(struct ice_hw *hw);
int
ice_aq_read_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,
u16 bus_addr, __le16 addr, u8 params, u8 *data,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,
u16 bus_addr, __le16 addr, u8 params, const u8 *data,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_set_health_status_config(struct ice_hw *hw, u8 event_source,
struct ice_sq_cd *cd);
bool ice_is_fw_health_report_supported(struct ice_hw *hw);

2
sys/dev/ice/ice_common_txrx.h
View file

@ -169,7 +169,7 @@ ice_tso_setup(struct ice_tx_queue *txq, if_pkt_info_t pi)
txd->qw1 = htole64(type_cmd_tso_mss);
txd->tunneling_params = htole32(0);
txq->tso++;
txq->stats.tso++;
return ((idx + 1) & (txq->desc_count-1));
}

143
sys/dev/ice/ice_controlq.c
View file

@ -81,6 +81,21 @@ static void ice_mailbox_init_regs(struct ice_hw *hw)
ICE_CQ_INIT_REGS(cq, PF_MBX);
}
/**
* ice_sb_init_regs - Initialize Sideband registers
* @hw: pointer to the hardware structure
*
* This assumes the alloc_sq and alloc_rq functions have already been called
*/
static void ice_sb_init_regs(struct ice_hw *hw)
{
struct ice_ctl_q_info *cq = &hw->sbq;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
ICE_CQ_INIT_REGS(cq, PF_SB);
}
/**
* ice_check_sq_alive
* @hw: pointer to the HW struct
@ -104,7 +119,7 @@ bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq)
* @hw: pointer to the hardware structure
* @cq: pointer to the specific Control queue
*/
static enum ice_status
static int
ice_alloc_ctrlq_sq_ring(struct ice_hw *hw, struct ice_ctl_q_info *cq)
{
size_t size = cq->num_sq_entries * sizeof(struct ice_aq_desc);
@ -113,7 +128,7 @@ ice_alloc_ctrlq_sq_ring(struct ice_hw *hw, struct ice_ctl_q_info *cq)
if (!cq->sq.desc_buf.va)
return ICE_ERR_NO_MEMORY;
return ICE_SUCCESS;
return 0;
}
/**
@ -121,7 +136,7 @@ ice_alloc_ctrlq_sq_ring(struct ice_hw *hw, struct ice_ctl_q_info *cq)
* @hw: pointer to the hardware structure
* @cq: pointer to the specific Control queue
*/
static enum ice_status
static int
ice_alloc_ctrlq_rq_ring(struct ice_hw *hw, struct ice_ctl_q_info *cq)
{
size_t size = cq->num_rq_entries * sizeof(struct ice_aq_desc);
@ -129,7 +144,7 @@ ice_alloc_ctrlq_rq_ring(struct ice_hw *hw, struct ice_ctl_q_info *cq)
cq->rq.desc_buf.va = ice_alloc_dma_mem(hw, &cq->rq.desc_buf, size);
if (!cq->rq.desc_buf.va)
return ICE_ERR_NO_MEMORY;
return ICE_SUCCESS;
return 0;
}
/**
@ -150,7 +165,7 @@ static void ice_free_cq_ring(struct ice_hw *hw, struct ice_ctl_q_ring *ring)
* @hw: pointer to the hardware structure
* @cq: pointer to the specific Control queue
*/
static enum ice_status
static int
ice_alloc_rq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
{
int i;
@ -195,7 +210,7 @@ ice_alloc_rq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
desc->params.generic.param0 = 0;
desc->params.generic.param1 = 0;
}
return ICE_SUCCESS;
return 0;
unwind_alloc_rq_bufs:
/* don't try to free the one that failed... */
@ -214,7 +229,7 @@ unwind_alloc_rq_bufs:
* @hw: pointer to the hardware structure
* @cq: pointer to the specific Control queue
*/
static enum ice_status
static int
ice_alloc_sq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
{
int i;
@ -235,7 +250,7 @@ ice_alloc_sq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
if (!bi->va)
goto unwind_alloc_sq_bufs;
}
return ICE_SUCCESS;
return 0;
unwind_alloc_sq_bufs:
/* don't try to free the one that failed... */
@ -249,7 +264,7 @@ unwind_alloc_sq_bufs:
return ICE_ERR_NO_MEMORY;
}
static enum ice_status
static int
ice_cfg_cq_regs(struct ice_hw *hw, struct ice_ctl_q_ring *ring, u16 num_entries)
{
/* Clear Head and Tail */
@ -265,7 +280,7 @@ ice_cfg_cq_regs(struct ice_hw *hw, struct ice_ctl_q_ring *ring, u16 num_entries)
if (rd32(hw, ring->bal) != ICE_LO_DWORD(ring->desc_buf.pa))
return ICE_ERR_AQ_ERROR;
return ICE_SUCCESS;
return 0;
}
/**
@ -275,7 +290,7 @@ ice_cfg_cq_regs(struct ice_hw *hw, struct ice_ctl_q_ring *ring, u16 num_entries)
*
* Configure base address and length registers for the transmit queue
*/
static enum ice_status
static int
ice_cfg_sq_regs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
{
return ice_cfg_cq_regs(hw, &cq->sq, cq->num_sq_entries);
@ -288,10 +303,10 @@ ice_cfg_sq_regs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
*
* Configure base address and length registers for the receive (event queue)
*/
static enum ice_status
static int
ice_cfg_rq_regs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
{
enum ice_status status;
int status;
status = ice_cfg_cq_regs(hw, &cq->rq, cq->num_rq_entries);
if (status)
@ -300,7 +315,7 @@ ice_cfg_rq_regs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
/* Update tail in the HW to post pre-allocated buffers */
wr32(hw, cq->rq.tail, (u32)(cq->num_rq_entries - 1));
return ICE_SUCCESS;
return 0;
}
#define ICE_FREE_CQ_BUFS(hw, qi, ring) \
@ -332,9 +347,9 @@ do { \
* Do *NOT* hold the lock when calling this as the memory allocation routines
* called are not going to be atomic context safe
*/
static enum ice_status ice_init_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
static int ice_init_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
{
enum ice_status ret_code;
int ret_code;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@ -394,9 +409,9 @@ init_ctrlq_exit:
* Do *NOT* hold the lock when calling this as the memory allocation routines
* called are not going to be atomic context safe
*/
static enum ice_status ice_init_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
static int ice_init_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
{
enum ice_status ret_code;
int ret_code;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@ -449,10 +464,10 @@ init_ctrlq_exit:
*
* The main shutdown routine for the Control Transmit Queue
*/
static enum ice_status
static int
ice_shutdown_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
{
enum ice_status ret_code = ICE_SUCCESS;
int ret_code = 0;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@ -491,24 +506,27 @@ shutdown_sq_out:
*/
static bool ice_aq_ver_check(struct ice_hw *hw)
{
if (hw->api_maj_ver > EXP_FW_API_VER_MAJOR) {
u8 exp_fw_api_ver_major = EXP_FW_API_VER_MAJOR_BY_MAC(hw);
u8 exp_fw_api_ver_minor = EXP_FW_API_VER_MINOR_BY_MAC(hw);
if (hw->api_maj_ver > exp_fw_api_ver_major) {
/* Major API version is newer than expected, don't load */
ice_warn(hw, "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
return false;
} else if (hw->api_maj_ver == EXP_FW_API_VER_MAJOR) {
if (hw->api_min_ver > (EXP_FW_API_VER_MINOR + 2))
} else if (hw->api_maj_ver == exp_fw_api_ver_major) {
if (hw->api_min_ver > (exp_fw_api_ver_minor + 2))
ice_info(hw, "The driver for the device detected a newer version (%u.%u) of the NVM image than expected (%u.%u). Please install the most recent version of the network driver.\n",
hw->api_maj_ver, hw->api_min_ver,
EXP_FW_API_VER_MAJOR, EXP_FW_API_VER_MINOR);
else if ((hw->api_min_ver + 2) < EXP_FW_API_VER_MINOR)
exp_fw_api_ver_major, exp_fw_api_ver_minor);
else if ((hw->api_min_ver + 2) < exp_fw_api_ver_minor)
ice_info(hw, "The driver for the device detected an older version (%u.%u) of the NVM image than expected (%u.%u). Please update the NVM image.\n",
hw->api_maj_ver, hw->api_min_ver,
EXP_FW_API_VER_MAJOR, EXP_FW_API_VER_MINOR);
exp_fw_api_ver_major, exp_fw_api_ver_minor);
} else {
/* Major API version is older than expected, log a warning */
ice_info(hw, "The driver for the device detected an older version (%u.%u) of the NVM image than expected (%u.%u). Please update the NVM image.\n",
hw->api_maj_ver, hw->api_min_ver,
EXP_FW_API_VER_MAJOR, EXP_FW_API_VER_MINOR);
exp_fw_api_ver_major, exp_fw_api_ver_minor);
}
return true;
}
@ -520,10 +538,10 @@ static bool ice_aq_ver_check(struct ice_hw *hw)
*
* The main shutdown routine for the Control Receive Queue
*/
static enum ice_status
static int
ice_shutdown_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
{
enum ice_status ret_code = ICE_SUCCESS;
int ret_code = 0;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@ -570,10 +588,10 @@ void ice_idle_aq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
* ice_init_check_adminq - Check version for Admin Queue to know if its alive
* @hw: pointer to the hardware structure
*/
static enum ice_status ice_init_check_adminq(struct ice_hw *hw)
static int ice_init_check_adminq(struct ice_hw *hw)
{
struct ice_ctl_q_info *cq = &hw->adminq;
enum ice_status status;
int status;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@ -586,7 +604,7 @@ static enum ice_status ice_init_check_adminq(struct ice_hw *hw)
goto init_ctrlq_free_rq;
}
return ICE_SUCCESS;
return 0;
init_ctrlq_free_rq:
ice_shutdown_rq(hw, cq);
@ -608,10 +626,10 @@ init_ctrlq_free_rq:
*
* NOTE: this function does not initialize the controlq locks
*/
static enum ice_status ice_init_ctrlq(struct ice_hw *hw, enum ice_ctl_q q_type)
static int ice_init_ctrlq(struct ice_hw *hw, enum ice_ctl_q q_type)
{
struct ice_ctl_q_info *cq;
enum ice_status ret_code;
int ret_code;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@ -620,6 +638,10 @@ static enum ice_status ice_init_ctrlq(struct ice_hw *hw, enum ice_ctl_q q_type)
ice_adminq_init_regs(hw);
cq = &hw->adminq;
break;
case ICE_CTL_Q_SB:
ice_sb_init_regs(hw);
cq = &hw->sbq;
break;
case ICE_CTL_Q_MAILBOX:
ice_mailbox_init_regs(hw);
cq = &hw->mailboxq;
@ -649,13 +671,25 @@ static enum ice_status ice_init_ctrlq(struct ice_hw *hw, enum ice_ctl_q q_type)
goto init_ctrlq_free_sq;
/* success! */
return ICE_SUCCESS;
return 0;
init_ctrlq_free_sq:
ice_shutdown_sq(hw, cq);
return ret_code;
}
/**
* ice_is_sbq_supported - is the sideband queue supported
* @hw: pointer to the hardware structure
*
* Returns true if the sideband control queue interface is
* supported for the device, false otherwise
*/
static bool ice_is_sbq_supported(struct ice_hw *hw)
{
return ice_is_generic_mac(hw);
}
/**
* ice_shutdown_ctrlq - shutdown routine for any control queue
* @hw: pointer to the hardware structure
@ -678,6 +712,9 @@ ice_shutdown_ctrlq(struct ice_hw *hw, enum ice_ctl_q q_type,
if (ice_check_sq_alive(hw, cq))
ice_aq_q_shutdown(hw, unloading);
break;
case ICE_CTL_Q_SB:
cq = &hw->sbq;
break;
case ICE_CTL_Q_MAILBOX:
cq = &hw->mailboxq;
break;
@ -703,6 +740,9 @@ void ice_shutdown_all_ctrlq(struct ice_hw *hw, bool unloading)
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
/* Shutdown FW admin queue */
ice_shutdown_ctrlq(hw, ICE_CTL_Q_ADMIN, unloading);
/* Shutdown PHY Sideband */
if (ice_is_sbq_supported(hw))
ice_shutdown_ctrlq(hw, ICE_CTL_Q_SB, unloading);
/* Shutdown PF-VF Mailbox */
ice_shutdown_ctrlq(hw, ICE_CTL_Q_MAILBOX, unloading);
}
@ -720,10 +760,10 @@ void ice_shutdown_all_ctrlq(struct ice_hw *hw, bool unloading)
*
* NOTE: this function does not initialize the controlq locks.
*/
enum ice_status ice_init_all_ctrlq(struct ice_hw *hw)
int ice_init_all_ctrlq(struct ice_hw *hw)
{
enum ice_status status;
u32 retry = 0;
int status;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@ -744,6 +784,15 @@ enum ice_status ice_init_all_ctrlq(struct ice_hw *hw)
if (status)
return status;
/* sideband control queue (SBQ) interface is not supported on some
* devices. Initialize if supported, else fallback to the admin queue
* interface
*/
if (ice_is_sbq_supported(hw)) {
status = ice_init_ctrlq(hw, ICE_CTL_Q_SB);
if (status)
return status;
}
/* Init Mailbox queue */
return ice_init_ctrlq(hw, ICE_CTL_Q_MAILBOX);
}
@ -776,9 +825,11 @@ static void ice_init_ctrlq_locks(struct ice_ctl_q_info *cq)
* driver needs to re-initialize control queues at run time it should call
* ice_init_all_ctrlq instead.
*/
enum ice_status ice_create_all_ctrlq(struct ice_hw *hw)
int ice_create_all_ctrlq(struct ice_hw *hw)
{
ice_init_ctrlq_locks(&hw->adminq);
if (ice_is_sbq_supported(hw))
ice_init_ctrlq_locks(&hw->sbq);
ice_init_ctrlq_locks(&hw->mailboxq);
return ice_init_all_ctrlq(hw);
@ -811,6 +862,8 @@ void ice_destroy_all_ctrlq(struct ice_hw *hw)
ice_shutdown_all_ctrlq(hw, true);
ice_destroy_ctrlq_locks(&hw->adminq);
if (ice_is_sbq_supported(hw))
ice_destroy_ctrlq_locks(&hw->sbq);
ice_destroy_ctrlq_locks(&hw->mailboxq);
}
@ -858,6 +911,8 @@ static const char *ice_ctl_q_str(enum ice_ctl_q qtype)
return "AQ";
case ICE_CTL_Q_MAILBOX:
return "MBXQ";
case ICE_CTL_Q_SB:
return "SBQ";
default:
return "Unrecognized CQ";
}
@ -944,7 +999,7 @@ bool ice_sq_done(struct ice_hw *hw, struct ice_ctl_q_info *cq)
* command into a descriptor, bumps the send queue tail, waits for the command
* to complete, captures status and data for the command, etc.
*/
static enum ice_status
int
ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
struct ice_aq_desc *desc, void *buf, u16 buf_size,
struct ice_sq_cd *cd)
@ -952,8 +1007,8 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
struct ice_dma_mem *dma_buf = NULL;
struct ice_aq_desc *desc_on_ring;
bool cmd_completed = false;
enum ice_status status = ICE_SUCCESS;
u32 total_delay = 0;
int status = 0;
u16 retval = 0;
u32 val = 0;
@ -1121,12 +1176,12 @@ sq_send_command_error:
* on the queue, bumps the tail, waits for processing of the command, captures
* command status and results, etc.
*/
enum ice_status
int
ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,
struct ice_aq_desc *desc, void *buf, u16 buf_size,
struct ice_sq_cd *cd)
{
enum ice_status status = ICE_SUCCESS;
int status = 0;
/* if reset is in progress return a soft error */
if (hw->reset_ongoing)
@ -1165,15 +1220,15 @@ void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode)
* contains contents of the message, and 'pending' contains the number of
* events left to process.
*/
enum ice_status
int
ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,
struct ice_rq_event_info *e, u16 *pending)
{
u16 ntc = cq->rq.next_to_clean;
enum ice_aq_err rq_last_status;
enum ice_status ret_code = ICE_SUCCESS;
struct ice_aq_desc *desc;
struct ice_dma_mem *bi;
int ret_code = 0;
u16 desc_idx;
u16 datalen;
u16 flags;

24
sys/dev/ice/ice_controlq.h
View file

@ -37,6 +37,7 @@
/* Maximum buffer lengths for all control queue types */
#define ICE_AQ_MAX_BUF_LEN 4096
#define ICE_MBXQ_MAX_BUF_LEN 4096
#define ICE_SBQ_MAX_BUF_LEN 512
#define ICE_CTL_Q_DESC(R, i) \
(&(((struct ice_aq_desc *)((R).desc_buf.va))[i]))
@ -48,15 +49,32 @@
/* Defines that help manage the driver vs FW API checks.
* Take a look at ice_aq_ver_check in ice_controlq.c for actual usage.
*/
#define EXP_FW_API_VER_BRANCH 0x00
#define EXP_FW_API_VER_MAJOR 0x01
#define EXP_FW_API_VER_MINOR 0x05
#define EXP_FW_API_VER_BRANCH_E830 0x00
#define EXP_FW_API_VER_MAJOR_E830 0x01
#define EXP_FW_API_VER_MINOR_E830 0x07
#define EXP_FW_API_VER_BRANCH_E810 0x00
#define EXP_FW_API_VER_MAJOR_E810 0x01
#define EXP_FW_API_VER_MINOR_E810 0x05
#define EXP_FW_API_VER_BRANCH_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? \
EXP_FW_API_VER_BRANCH_E830 : \
EXP_FW_API_VER_BRANCH_E810)
#define EXP_FW_API_VER_MAJOR_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? \
EXP_FW_API_VER_MAJOR_E830 : \
EXP_FW_API_VER_MAJOR_E810)
#define EXP_FW_API_VER_MINOR_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? \
EXP_FW_API_VER_MINOR_E830 : \
EXP_FW_API_VER_MINOR_E810)
/* Different control queue types: These are mainly for SW consumption. */
enum ice_ctl_q {
ICE_CTL_Q_UNKNOWN = 0,
ICE_CTL_Q_ADMIN,
ICE_CTL_Q_MAILBOX,
ICE_CTL_Q_SB,
};
/* Control Queue timeout settings - max delay 1s */

90
sys/dev/ice/ice_dcb.c
View file

@ -46,14 +46,14 @@
*
* Requests the complete LLDP MIB (entire packet). (0x0A00)
*/
enum ice_status
int
ice_aq_get_lldp_mib(struct ice_hw *hw, u8 bridge_type, u8 mib_type, void *buf,
u16 buf_size, u16 *local_len, u16 *remote_len,
struct ice_sq_cd *cd)
{
struct ice_aqc_lldp_get_mib *cmd;
struct ice_aq_desc desc;
enum ice_status status;
int status;
cmd = &desc.params.lldp_get_mib;
@ -88,7 +88,7 @@ ice_aq_get_lldp_mib(struct ice_hw *hw, u8 bridge_type, u8 mib_type, void *buf,
* Enable or Disable posting of an event on ARQ when LLDP MIB
* associated with the interface changes (0x0A01)
*/
enum ice_status
int
ice_aq_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_update,
struct ice_sq_cd *cd)
{
@ -130,14 +130,14 @@ ice_aq_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_update,
* Delete the specified TLV from LLDP Local MIB for the given bridge type.
* The firmware places the entire LLDP MIB in the response buffer. (0x0A04)
*/
enum ice_status
int
ice_aq_add_delete_lldp_tlv(struct ice_hw *hw, u8 bridge_type, bool add_lldp_tlv,
void *buf, u16 buf_size, u16 tlv_len, u16 *mib_len,
struct ice_sq_cd *cd)
{
struct ice_aqc_lldp_add_delete_tlv *cmd;
struct ice_aq_desc desc;
enum ice_status status;
int status;
if (tlv_len == 0)
return ICE_ERR_PARAM;
@ -179,14 +179,14 @@ ice_aq_add_delete_lldp_tlv(struct ice_hw *hw, u8 bridge_type, bool add_lldp_tlv,
* Firmware will place the complete LLDP MIB in response buffer with the
* updated TLV. (0x0A03)
*/
enum ice_status
int
ice_aq_update_lldp_tlv(struct ice_hw *hw, u8 bridge_type, void *buf,
u16 buf_size, u16 old_len, u16 new_len, u16 offset,
u16 *mib_len, struct ice_sq_cd *cd)
{
struct ice_aqc_lldp_update_tlv *cmd;
struct ice_aq_desc desc;
enum ice_status status;
int status;
cmd = &desc.params.lldp_update_tlv;
@ -221,7 +221,7 @@ ice_aq_update_lldp_tlv(struct ice_hw *hw, u8 bridge_type, void *buf,
*
* Stop or Shutdown the embedded LLDP Agent (0x0A05)
*/
enum ice_status
int
ice_aq_stop_lldp(struct ice_hw *hw, bool shutdown_lldp_agent, bool persist,
struct ice_sq_cd *cd)
{
@ -249,7 +249,7 @@ ice_aq_stop_lldp(struct ice_hw *hw, bool shutdown_lldp_agent, bool persist,
*
* Start the embedded LLDP Agent on all ports. (0x0A06)
*/
enum ice_status
int
ice_aq_start_lldp(struct ice_hw *hw, bool persist, struct ice_sq_cd *cd)
{
struct ice_aqc_lldp_start *cmd;
@ -730,11 +730,11 @@ ice_parse_org_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
*
* Parse DCB configuration from the LLDPDU
*/
enum ice_status ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg)
int ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg)
{
struct ice_lldp_org_tlv *tlv;
enum ice_status ret = ICE_SUCCESS;
u16 offset = 0;
int ret = 0;
u16 typelen;
u16 type;
u16 len;
@ -780,12 +780,12 @@ enum ice_status ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg)
*
* Query DCB configuration from the firmware
*/
enum ice_status
int
ice_aq_get_dcb_cfg(struct ice_hw *hw, u8 mib_type, u8 bridgetype,
struct ice_dcbx_cfg *dcbcfg)
{
enum ice_status ret;
u8 *lldpmib;
int ret;
/* Allocate the LLDPDU */
lldpmib = (u8 *)ice_malloc(hw, ICE_LLDPDU_SIZE);
@ -795,7 +795,7 @@ ice_aq_get_dcb_cfg(struct ice_hw *hw, u8 mib_type, u8 bridgetype,
ret = ice_aq_get_lldp_mib(hw, bridgetype, mib_type, (void *)lldpmib,
ICE_LLDPDU_SIZE, NULL, NULL, NULL);
if (ret == ICE_SUCCESS)
if (!ret)
/* Parse LLDP MIB to get DCB configuration */
ret = ice_lldp_to_dcb_cfg(lldpmib, dcbcfg);
@ -815,13 +815,13 @@ ice_aq_get_dcb_cfg(struct ice_hw *hw, u8 mib_type, u8 bridgetype,
* This sends out request/release to ignore PFC condition for a TC.
* It will return the TCs for which PFC is currently ignored. (0x0301)
*/
enum ice_status
int
ice_aq_dcb_ignore_pfc(struct ice_hw *hw, u8 tcmap, bool request, u8 *tcmap_ret,
struct ice_sq_cd *cd)
{
struct ice_aqc_pfc_ignore *cmd;
struct ice_aq_desc desc;
enum ice_status status;
int status;
cmd = &desc.params.pfc_ignore;
@ -851,17 +851,17 @@ ice_aq_dcb_ignore_pfc(struct ice_hw *hw, u8 tcmap, bool request, u8 *tcmap_ret,
* @cd: pointer to command details structure or NULL
*
* Start/Stop the embedded dcbx Agent. In case that this wrapper function
* returns ICE_SUCCESS, caller will need to check if FW returns back the same
* returns 0, caller will need to check if FW returns back the same
* value as stated in dcbx_agent_status, and react accordingly. (0x0A09)
*/
enum ice_status
int
ice_aq_start_stop_dcbx(struct ice_hw *hw, bool start_dcbx_agent,
bool *dcbx_agent_status, struct ice_sq_cd *cd)
{
struct ice_aqc_lldp_stop_start_specific_agent *cmd;
enum ice_adminq_opc opcode;
struct ice_aq_desc desc;
enum ice_status status;
int status;
cmd = &desc.params.lldp_agent_ctrl;
@ -876,7 +876,7 @@ ice_aq_start_stop_dcbx(struct ice_hw *hw, bool start_dcbx_agent,
*dcbx_agent_status = false;
if (status == ICE_SUCCESS &&
if (!status &&
cmd->command == ICE_AQC_START_STOP_AGENT_START_DCBX)
*dcbx_agent_status = true;
@ -891,7 +891,7 @@ ice_aq_start_stop_dcbx(struct ice_hw *hw, bool start_dcbx_agent,
*
* Get CEE DCBX mode operational configuration from firmware (0x0A07)
*/
enum ice_status
int
ice_aq_get_cee_dcb_cfg(struct ice_hw *hw,
struct ice_aqc_get_cee_dcb_cfg_resp *buff,
struct ice_sq_cd *cd)
@ -912,12 +912,12 @@ ice_aq_get_cee_dcb_cfg(struct ice_hw *hw,
* This will return an indication if DSCP-based PFC or VLAN-based PFC
* is enabled. (0x0302)
*/
enum ice_status
int
ice_aq_query_pfc_mode(struct ice_hw *hw, u8 *pfcmode_ret, struct ice_sq_cd *cd)
{
struct ice_aqc_set_query_pfc_mode *cmd;
struct ice_aq_desc desc;
enum ice_status status;
int status;
cmd = &desc.params.set_query_pfc_mode;
@ -940,12 +940,12 @@ ice_aq_query_pfc_mode(struct ice_hw *hw, u8 *pfcmode_ret, struct ice_sq_cd *cd)
* This AQ call configures the PFC mdoe to DSCP-based PFC mode or VLAN
* -based PFC (0x0303)
*/
enum ice_status
int
ice_aq_set_pfc_mode(struct ice_hw *hw, u8 pfc_mode, struct ice_sq_cd *cd)
{
struct ice_aqc_set_query_pfc_mode *cmd;
struct ice_aq_desc desc;
enum ice_status status;
int status;
if (pfc_mode > ICE_AQC_PFC_DSCP_BASED_PFC)
return ICE_ERR_PARAM;
@ -968,7 +968,7 @@ ice_aq_set_pfc_mode(struct ice_hw *hw, u8 pfc_mode, struct ice_sq_cd *cd)
if (cmd->pfc_mode != pfc_mode)
return ICE_ERR_NOT_SUPPORTED;
return ICE_SUCCESS;
return 0;
}
/**
@ -980,7 +980,7 @@ ice_aq_set_pfc_mode(struct ice_hw *hw, u8 pfc_mode, struct ice_sq_cd *cd)
* This AQ command will tell FW if it will apply or not apply the default DCB
* configuration when link up (0x0306).
*/
enum ice_status
int
ice_aq_set_dcb_parameters(struct ice_hw *hw, bool dcb_enable,
struct ice_sq_cd *cd)
{
@ -1126,11 +1126,11 @@ ice_cee_to_dcb_cfg(struct ice_aqc_get_cee_dcb_cfg_resp *cee_cfg,
*
* Get IEEE or CEE mode DCB configuration from the Firmware
*/
STATIC enum ice_status
STATIC int
ice_get_ieee_or_cee_dcb_cfg(struct ice_port_info *pi, u8 dcbx_mode)
{
struct ice_dcbx_cfg *dcbx_cfg = NULL;
enum ice_status ret;
int ret;
if (!pi)
return ICE_ERR_PARAM;
@ -1154,7 +1154,7 @@ ice_get_ieee_or_cee_dcb_cfg(struct ice_port_info *pi, u8 dcbx_mode)
ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID, dcbx_cfg);
/* Don't treat ENOENT as an error for Remote MIBs */
if (pi->hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT)
ret = ICE_SUCCESS;
ret = 0;
out:
return ret;
@ -1166,17 +1166,17 @@ out:
*
* Get DCB configuration from the Firmware
*/
enum ice_status ice_get_dcb_cfg(struct ice_port_info *pi)
int ice_get_dcb_cfg(struct ice_port_info *pi)
{
struct ice_aqc_get_cee_dcb_cfg_resp cee_cfg;
struct ice_dcbx_cfg *dcbx_cfg;
enum ice_status ret;
int ret;
if (!pi)
return ICE_ERR_PARAM;
ret = ice_aq_get_cee_dcb_cfg(pi->hw, &cee_cfg, NULL);
if (ret == ICE_SUCCESS) {
if (!ret) {
/* CEE mode */
ret = ice_get_ieee_or_cee_dcb_cfg(pi, ICE_DCBX_MODE_CEE);
ice_cee_to_dcb_cfg(&cee_cfg, pi);
@ -1234,10 +1234,10 @@ void ice_get_dcb_cfg_from_mib_change(struct ice_port_info *pi,
*
* Update DCB configuration from the Firmware
*/
enum ice_status ice_init_dcb(struct ice_hw *hw, bool enable_mib_change)
int ice_init_dcb(struct ice_hw *hw, bool enable_mib_change)
{
struct ice_qos_cfg *qos_cfg = &hw->port_info->qos_cfg;
enum ice_status ret = ICE_SUCCESS;
int ret = 0;
if (!hw->func_caps.common_cap.dcb)
return ICE_ERR_NOT_SUPPORTED;
@ -1276,10 +1276,10 @@ enum ice_status ice_init_dcb(struct ice_hw *hw, bool enable_mib_change)
*
* Configure (disable/enable) MIB
*/
enum ice_status ice_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_mib)
int ice_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_mib)
{
struct ice_qos_cfg *qos_cfg = &hw->port_info->qos_cfg;
enum ice_status ret;
int ret;
if (!hw->func_caps.common_cap.dcb)
return ICE_ERR_NOT_SUPPORTED;
@ -1728,13 +1728,13 @@ void ice_dcb_cfg_to_lldp(u8 *lldpmib, u16 *miblen, struct ice_dcbx_cfg *dcbcfg)
*
* Set DCB configuration to the Firmware
*/
enum ice_status ice_set_dcb_cfg(struct ice_port_info *pi)
int ice_set_dcb_cfg(struct ice_port_info *pi)
{
u8 mib_type, *lldpmib = NULL;
struct ice_dcbx_cfg *dcbcfg;
enum ice_status ret;
struct ice_hw *hw;
u16 miblen;
int ret;
if (!pi)
return ICE_ERR_PARAM;
@ -1770,14 +1770,14 @@ enum ice_status ice_set_dcb_cfg(struct ice_port_info *pi)
*
* query current port ETS configuration
*/
enum ice_status
int
ice_aq_query_port_ets(struct ice_port_info *pi,
struct ice_aqc_port_ets_elem *buf, u16 buf_size,
struct ice_sq_cd *cd)
{
struct ice_aqc_query_port_ets *cmd;
struct ice_aq_desc desc;
enum ice_status status;
int status;
if (!pi || !pi->root)
return ICE_ERR_PARAM;
@ -1796,14 +1796,14 @@ ice_aq_query_port_ets(struct ice_port_info *pi,
*
* update the SW DB with the new TC changes
*/
enum ice_status
int
ice_update_port_tc_tree_cfg(struct ice_port_info *pi,
struct ice_aqc_port_ets_elem *buf)
{
struct ice_sched_node *node, *tc_node;
struct ice_aqc_txsched_elem_data elem;
enum ice_status status = ICE_SUCCESS;
u32 teid1, teid2;
int status = 0;
u8 i, j;
if (!pi)
@ -1864,12 +1864,12 @@ ice_update_port_tc_tree_cfg(struct ice_port_info *pi,
* query current port ETS configuration and update the
* SW DB with the TC changes
*/
enum ice_status
int
ice_query_port_ets(struct ice_port_info *pi,
struct ice_aqc_port_ets_elem *buf, u16 buf_size,
struct ice_sq_cd *cd)
{
enum ice_status status;
int status;
ice_acquire_lock(&pi->sched_lock);
status = ice_aq_query_port_ets(pi, buf, buf_size, cd);

42
sys/dev/ice/ice_dcb.h
View file

@ -215,64 +215,64 @@ struct ice_dcbx_variables {
u32 deftsaassignment;
};
enum ice_status
int
ice_aq_get_lldp_mib(struct ice_hw *hw, u8 bridge_type, u8 mib_type, void *buf,
u16 buf_size, u16 *local_len, u16 *remote_len,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_add_delete_lldp_tlv(struct ice_hw *hw, u8 bridge_type, bool add_lldp_tlv,
void *buf, u16 buf_size, u16 tlv_len, u16 *mib_len,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_update_lldp_tlv(struct ice_hw *hw, u8 bridge_type, void *buf,
u16 buf_size, u16 old_len, u16 new_len, u16 offset,
u16 *mib_len, struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_dcb_ignore_pfc(struct ice_hw *hw, u8 tcmap, bool request, u8 *tcmap_ret,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_get_cee_dcb_cfg(struct ice_hw *hw,
struct ice_aqc_get_cee_dcb_cfg_resp *buff,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_query_pfc_mode(struct ice_hw *hw, u8 *pfcmode_ret, struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_set_dcb_parameters(struct ice_hw *hw, bool dcb_enable,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_set_pfc_mode(struct ice_hw *hw, u8 pfc_mode, struct ice_sq_cd *cd);
enum ice_status ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg);
int ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg);
u8 ice_get_dcbx_status(struct ice_hw *hw);
enum ice_status
int
ice_aq_get_dcb_cfg(struct ice_hw *hw, u8 mib_type, u8 bridgetype,
struct ice_dcbx_cfg *dcbcfg);
enum ice_status ice_get_dcb_cfg(struct ice_port_info *pi);
enum ice_status ice_set_dcb_cfg(struct ice_port_info *pi);
int ice_get_dcb_cfg(struct ice_port_info *pi);
int ice_set_dcb_cfg(struct ice_port_info *pi);
void ice_get_dcb_cfg_from_mib_change(struct ice_port_info *pi,
struct ice_rq_event_info *event);
enum ice_status ice_init_dcb(struct ice_hw *hw, bool enable_mib_change);
int ice_init_dcb(struct ice_hw *hw, bool enable_mib_change);
void ice_dcb_cfg_to_lldp(u8 *lldpmib, u16 *miblen, struct ice_dcbx_cfg *dcbcfg);
enum ice_status
int
ice_query_port_ets(struct ice_port_info *pi,
struct ice_aqc_port_ets_elem *buf, u16 buf_size,
struct ice_sq_cd *cmd_details);
enum ice_status
int
ice_aq_query_port_ets(struct ice_port_info *pi,
struct ice_aqc_port_ets_elem *buf, u16 buf_size,
struct ice_sq_cd *cd);
enum ice_status
int
ice_update_port_tc_tree_cfg(struct ice_port_info *pi,
struct ice_aqc_port_ets_elem *buf);
enum ice_status
int
ice_aq_stop_lldp(struct ice_hw *hw, bool shutdown_lldp_agent, bool persist,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_start_lldp(struct ice_hw *hw, bool persist, struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_start_stop_dcbx(struct ice_hw *hw, bool start_dcbx_agent,
bool *dcbx_agent_status, struct ice_sq_cd *cd);
enum ice_status ice_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_mib);
enum ice_status
int ice_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_mib);
int
ice_aq_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_update,
struct ice_sq_cd *cd);
#endif /* _ICE_DCB_H_ */

123
sys/dev/ice/ice_ddp_common.c
View file

@ -46,14 +46,14 @@
*
* Download Package (0x0C40)
*/
static enum ice_status
static int
ice_aq_download_pkg(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,
u16 buf_size, bool last_buf, u32 *error_offset,
u32 *error_info, struct ice_sq_cd *cd)
{
struct ice_aqc_download_pkg *cmd;
struct ice_aq_desc desc;
enum ice_status status;
int status;
if (error_offset)
*error_offset = 0;
@ -91,7 +91,7 @@ ice_aq_download_pkg(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,
*
* Upload Section (0x0C41)
*/
enum ice_status
int
ice_aq_upload_section(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,
u16 buf_size, struct ice_sq_cd *cd)
{
@ -115,14 +115,14 @@ ice_aq_upload_section(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,
*
* Update Package (0x0C42)
*/
static enum ice_status
static int
ice_aq_update_pkg(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf, u16 buf_size,
bool last_buf, u32 *error_offset, u32 *error_info,
struct ice_sq_cd *cd)
{
struct ice_aqc_download_pkg *cmd;
struct ice_aq_desc desc;
enum ice_status status;
int status;
if (error_offset)
*error_offset = 0;
@ -255,10 +255,10 @@ ice_is_signing_seg_type_at_idx(struct ice_pkg_hdr *pkg_hdr, u32 idx,
* @bufs: pointer to an array of buffers
* @count: the number of buffers in the array
*/
enum ice_status
int
ice_update_pkg_no_lock(struct ice_hw *hw, struct ice_buf *bufs, u32 count)
{
enum ice_status status = ICE_SUCCESS;
int status = 0;
u32 i;
for (i = 0; i < count; i++) {
@ -287,10 +287,10 @@ ice_update_pkg_no_lock(struct ice_hw *hw, struct ice_buf *bufs, u32 count)
*
* Obtains change lock and updates package.
*/
enum ice_status
int
ice_update_pkg(struct ice_hw *hw, struct ice_buf *bufs, u32 count)
{
enum ice_status status;
int status;
status = ice_acquire_change_lock(hw, ICE_RES_WRITE);
if (status)
@ -394,8 +394,8 @@ ice_dwnld_cfg_bufs_no_lock(struct ice_hw *hw, struct ice_buf *bufs, u32 start,
return ICE_DDP_PKG_SUCCESS;
for (i = 0; i < count; i++) {
enum ice_status status;
bool last = false;
int status;
bh = (struct ice_buf_hdr *)(bufs + start + i);
@ -430,7 +430,7 @@ ice_dwnld_cfg_bufs_no_lock(struct ice_hw *hw, struct ice_buf *bufs, u32 start,
*
* Get Package Info List (0x0C43)
*/
static enum ice_status
static int
ice_aq_get_pkg_info_list(struct ice_hw *hw,
struct ice_aqc_get_pkg_info_resp *pkg_info,
u16 buf_size, struct ice_sq_cd *cd)
@ -442,21 +442,6 @@ ice_aq_get_pkg_info_list(struct ice_hw *hw,
return ice_aq_send_cmd(hw, &desc, pkg_info, buf_size, cd);
}
/**
* ice_has_signing_seg - determine if package has a signing segment
* @hw: pointer to the hardware structure
* @pkg_hdr: pointer to the driver's package hdr
*/
static bool ice_has_signing_seg(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr)
{
struct ice_generic_seg_hdr *seg_hdr;
seg_hdr = (struct ice_generic_seg_hdr *)
ice_find_seg_in_pkg(hw, SEGMENT_TYPE_SIGNING, pkg_hdr);
return seg_hdr ? true : false;
}
/**
* ice_get_pkg_segment_id - get correct package segment id, based on device
* @mac_type: MAC type of the device
@ -466,6 +451,9 @@ static u32 ice_get_pkg_segment_id(enum ice_mac_type mac_type)
u32 seg_id;
switch (mac_type) {
case ICE_MAC_E830:
seg_id = SEGMENT_TYPE_ICE_E830;
break;
case ICE_MAC_GENERIC:
case ICE_MAC_GENERIC_3K:
case ICE_MAC_GENERIC_3K_E825:
@ -486,6 +474,9 @@ static u32 ice_get_pkg_sign_type(enum ice_mac_type mac_type)
u32 sign_type;
switch (mac_type) {
case ICE_MAC_E830:
sign_type = SEGMENT_SIGN_TYPE_RSA3K_SBB;
break;
case ICE_MAC_GENERIC_3K:
sign_type = SEGMENT_SIGN_TYPE_RSA3K;
break;
@ -595,6 +586,14 @@ ice_dwnld_sign_and_cfg_segs(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr,
if (state)
goto exit;
if (count == 0) {
/* this is a "Reference Signature Segment" and download should
* be only for the buffers in the signature segment (and not
* the hardware configuration segment)
*/
goto exit;
}
state = ice_download_pkg_config_seg(hw, pkg_hdr, conf_idx, start,
count);
@ -633,7 +632,7 @@ static enum ice_ddp_state
ice_post_dwnld_pkg_actions(struct ice_hw *hw)
{
enum ice_ddp_state state = ICE_DDP_PKG_SUCCESS;
enum ice_status status;
int status;
status = ice_set_vlan_mode(hw);
if (status) {
@ -655,7 +654,7 @@ ice_download_pkg_with_sig_seg(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr)
{
enum ice_aq_err aq_err = hw->adminq.sq_last_status;
enum ice_ddp_state state = ICE_DDP_PKG_ERR;
enum ice_status status;
int status;
u32 i;
ice_debug(hw, ICE_DBG_INIT, "Segment ID %d\n", hw->pkg_seg_id);
@ -701,8 +700,8 @@ static enum ice_ddp_state
ice_dwnld_cfg_bufs(struct ice_hw *hw, struct ice_buf *bufs, u32 count)
{
enum ice_ddp_state state = ICE_DDP_PKG_SUCCESS;
enum ice_status status;
struct ice_buf_hdr *bh;
int status;
if (!bufs || !count)
return ICE_DDP_PKG_ERR;
@ -779,7 +778,7 @@ ice_download_pkg(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr,
{
enum ice_ddp_state state;
if (hw->pkg_has_signing_seg)
if (ice_match_signing_seg(pkg_hdr, hw->pkg_seg_id, hw->pkg_sign_type))
state = ice_download_pkg_with_sig_seg(hw, pkg_hdr);
else
state = ice_download_pkg_without_sig_seg(hw, ice_seg);
@ -804,7 +803,6 @@ ice_init_pkg_info(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr)
if (!pkg_hdr)
return ICE_DDP_PKG_ERR;
hw->pkg_has_signing_seg = ice_has_signing_seg(hw, pkg_hdr);
ice_get_signing_req(hw);
ice_debug(hw, ICE_DBG_INIT, "Pkg using segment id: 0x%08X\n",
@ -988,7 +986,7 @@ ice_enum_labels(struct ice_seg *ice_seg, u32 type, struct ice_pkg_enum *state,
* The ice_seg parameter must not be NULL since the first call to
* ice_enum_labels requires a pointer to an actual ice_seg structure.
*/
enum ice_status
int
ice_find_label_value(struct ice_seg *ice_seg, char const *name, u32 type,
u16 *value)
{
@ -1005,7 +1003,7 @@ ice_find_label_value(struct ice_seg *ice_seg, char const *name, u32 type,
label_name = ice_enum_labels(ice_seg, type, &state, &val);
if (label_name && !strcmp(label_name, name)) {
*value = val;
return ICE_SUCCESS;
return 0;
}
ice_seg = NULL;
@ -1100,7 +1098,6 @@ static enum ice_ddp_state ice_chk_pkg_version(struct ice_pkg_ver *pkg_ver)
(pkg_ver->major == ICE_PKG_SUPP_VER_MAJ &&
pkg_ver->minor < ICE_PKG_SUPP_VER_MNR))
return ICE_DDP_PKG_FILE_VERSION_TOO_LOW;
return ICE_DDP_PKG_SUCCESS;
}
@ -1245,7 +1242,7 @@ static int ice_get_prof_index_max(struct ice_hw *hw)
hw->switch_info->max_used_prof_index = max_prof_index;
return ICE_SUCCESS;
return 0;
}
/**
@ -1269,11 +1266,8 @@ ice_get_ddp_pkg_state(struct ice_hw *hw, bool already_loaded)
} else if (hw->active_pkg_ver.major != ICE_PKG_SUPP_VER_MAJ ||
hw->active_pkg_ver.minor != ICE_PKG_SUPP_VER_MNR) {
return ICE_DDP_PKG_ALREADY_LOADED_NOT_SUPPORTED;
} else if (hw->active_pkg_ver.major == ICE_PKG_SUPP_VER_MAJ &&
hw->active_pkg_ver.minor == ICE_PKG_SUPP_VER_MNR) {
return ICE_DDP_PKG_COMPATIBLE_ALREADY_LOADED;
} else {
return ICE_DDP_PKG_ERR;
return ICE_DDP_PKG_COMPATIBLE_ALREADY_LOADED;
}
}
@ -1340,12 +1334,6 @@ enum ice_ddp_state ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
if (state)
return state;
/* For packages with signing segments, must be a matching segment */
if (hw->pkg_has_signing_seg)
if (!ice_match_signing_seg(pkg, hw->pkg_seg_id,
hw->pkg_sign_type))
return ICE_DDP_PKG_ERR;
/* before downloading the package, check package version for
* compatibility with driver
*/
@ -1579,7 +1567,7 @@ ice_get_sw_fv_bitmap(struct ice_hw *hw, enum ice_prof_type req_profs,
* NOTE: The caller of the function is responsible for freeing the memory
* allocated for every list entry.
*/
enum ice_status
int
ice_get_sw_fv_list(struct ice_hw *hw, struct ice_prot_lkup_ext *lkups,
ice_bitmap_t *bm, struct LIST_HEAD_TYPE *fv_list)
{
@ -1638,7 +1626,7 @@ ice_get_sw_fv_list(struct ice_hw *hw, struct ice_prot_lkup_ext *lkups,
ice_warn(hw, "Required profiles not found in currently loaded DDP package");
return ICE_ERR_CFG;
}
return ICE_SUCCESS;
return 0;
err:
LIST_FOR_EACH_ENTRY_SAFE(fvl, tmp, fv_list, ice_sw_fv_list_entry,
@ -1717,7 +1705,7 @@ void ice_pkg_buf_free(struct ice_hw *hw, struct ice_buf_build *bld)
* result in some wasted space in the buffer.
* Note: all package contents must be in Little Endian form.
*/
enum ice_status
int
ice_pkg_buf_reserve_section(struct ice_buf_build *bld, u16 count)
{
struct ice_buf_hdr *buf;
@ -1742,7 +1730,7 @@ ice_pkg_buf_reserve_section(struct ice_buf_build *bld, u16 count)
FLEX_ARRAY_SIZE(buf, section_entry, count);
buf->data_end = CPU_TO_LE16(data_end);
return ICE_SUCCESS;
return 0;
}
/**
@ -1849,7 +1837,7 @@ ice_pkg_buf_alloc_single_section_err:
* result in some wasted space in the buffer.
* Note: all package contents must be in Little Endian form.
*/
enum ice_status
int
ice_pkg_buf_unreserve_section(struct ice_buf_build *bld, u16 count)
{
struct ice_buf_hdr *buf;
@ -1874,7 +1862,7 @@ ice_pkg_buf_unreserve_section(struct ice_buf_build *bld, u16 count)
FLEX_ARRAY_SIZE(buf, section_entry, count);
buf->data_end = CPU_TO_LE16(data_end);
return ICE_SUCCESS;
return 0;
}
/**
@ -2193,7 +2181,7 @@ ice_boost_tcam_handler(u32 sect_type, void *section, u32 index, u32 *offset)
* if it is found. The ice_seg parameter must not be NULL since the first call
* to ice_pkg_enum_entry requires a pointer to an actual ice_segment structure.
*/
static enum ice_status
static int
ice_find_boost_entry(struct ice_seg *ice_seg, u16 addr,
struct ice_boost_tcam_entry **entry)
{
@ -2212,7 +2200,7 @@ ice_find_boost_entry(struct ice_seg *ice_seg, u16 addr,
ice_boost_tcam_handler);
if (tcam && LE16_TO_CPU(tcam->addr) == addr) {
*entry = tcam;
return ICE_SUCCESS;
return 0;
}
ice_seg = NULL;
@ -2275,18 +2263,18 @@ void ice_init_pkg_hints(struct ice_hw *hw, struct ice_seg *ice_seg)
* or writing of the package. When attempting to obtain write access, the
* caller must check for the following two return values:
*
* ICE_SUCCESS - Means the caller has acquired the global config lock
* 0 - Means the caller has acquired the global config lock
* and can perform writing of the package.
* ICE_ERR_AQ_NO_WORK - Indicates another driver has already written the
* package or has found that no update was necessary; in
* this case, the caller can just skip performing any
* update of the package.
*/
enum ice_status
int
ice_acquire_global_cfg_lock(struct ice_hw *hw,
enum ice_aq_res_access_type access)
{
enum ice_status status;
int status;
status = ice_acquire_res(hw, ICE_GLOBAL_CFG_LOCK_RES_ID, access,
ICE_GLOBAL_CFG_LOCK_TIMEOUT);
@ -2315,7 +2303,7 @@ void ice_release_global_cfg_lock(struct ice_hw *hw)
*
* This function will request ownership of the change lock.
*/
enum ice_status
int
ice_acquire_change_lock(struct ice_hw *hw, enum ice_aq_res_access_type access)
{
return ice_acquire_res(hw, ICE_CHANGE_LOCK_RES_ID, access,
@ -2344,13 +2332,13 @@ void ice_release_change_lock(struct ice_hw *hw)
*
* The function will get or set tx topology
*/
static enum ice_status
static int
ice_get_set_tx_topo(struct ice_hw *hw, u8 *buf, u16 buf_size,
struct ice_sq_cd *cd, u8 *flags, bool set)
{
struct ice_aqc_get_set_tx_topo *cmd;
struct ice_aq_desc desc;
enum ice_status status;
int status;
cmd = &desc.params.get_set_tx_topo;
if (set) {
@ -2360,11 +2348,16 @@ ice_get_set_tx_topo(struct ice_hw *hw, u8 *buf, u16 buf_size,
if (buf)
cmd->set_flags |= ICE_AQC_TX_TOPO_FLAGS_SRC_RAM |
ICE_AQC_TX_TOPO_FLAGS_LOAD_NEW;
desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
} else {
ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_tx_topo);
cmd->get_flags = ICE_AQC_TX_TOPO_GET_RAM;
if (!ice_is_e830(hw))
desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
}
desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
if (status)
return status;
@ -2372,7 +2365,7 @@ ice_get_set_tx_topo(struct ice_hw *hw, u8 *buf, u16 buf_size,
if (!set && flags)
*flags = desc.params.get_set_tx_topo.set_flags;
return ICE_SUCCESS;
return 0;
}
/**
@ -2384,7 +2377,7 @@ ice_get_set_tx_topo(struct ice_hw *hw, u8 *buf, u16 buf_size,
* The function will apply the new Tx topology from the package buffer
* if available.
*/
enum ice_status ice_cfg_tx_topo(struct ice_hw *hw, u8 *buf, u32 len)
int ice_cfg_tx_topo(struct ice_hw *hw, u8 *buf, u32 len)
{
u8 *current_topo, *new_topo = NULL;
struct ice_run_time_cfg_seg *seg;
@ -2392,8 +2385,8 @@ enum ice_status ice_cfg_tx_topo(struct ice_hw *hw, u8 *buf, u32 len)
struct ice_pkg_hdr *pkg_hdr;
enum ice_ddp_state state;
u16 i, size = 0, offset;
enum ice_status status;
u32 reg = 0;
int status;
u8 flags;
if (!buf || !len)
@ -2514,7 +2507,7 @@ update_topo:
/* Reset is in progress, re-init the hw again */
ice_debug(hw, ICE_DBG_INIT, "Reset is in progress. layer topology might be applied already\n");
ice_check_reset(hw);
return ICE_SUCCESS;
return 0;
}
/* set new topology */
@ -2531,5 +2524,5 @@ update_topo:
/* CORER will clear the global lock, so no explicit call
* required for release
*/
return ICE_SUCCESS;
return 0;
}

19
sys/dev/ice/ice_ddp_common.h
View file

@ -134,6 +134,7 @@ struct ice_generic_seg_hdr {
#define SEGMENT_TYPE_METADATA 0x00000001
#define SEGMENT_TYPE_ICE_E810 0x00000010
#define SEGMENT_TYPE_SIGNING 0x00001001
#define SEGMENT_TYPE_ICE_E830 0x00000017
#define SEGMENT_TYPE_ICE_RUN_TIME_CFG 0x00000020
__le32 seg_type;
struct ice_pkg_ver seg_format_ver;
@ -413,26 +414,26 @@ struct ice_pkg_enum {
struct ice_hw;
enum ice_status
int
ice_acquire_change_lock(struct ice_hw *hw, enum ice_aq_res_access_type access);
void ice_release_change_lock(struct ice_hw *hw);
struct ice_buf_build *ice_pkg_buf_alloc(struct ice_hw *hw);
void *
ice_pkg_buf_alloc_section(struct ice_buf_build *bld, u32 type, u16 size);
enum ice_status
int
ice_pkg_buf_reserve_section(struct ice_buf_build *bld, u16 count);
enum ice_status
int
ice_get_sw_fv_list(struct ice_hw *hw, struct ice_prot_lkup_ext *lkups,
ice_bitmap_t *bm, struct LIST_HEAD_TYPE *fv_list);
enum ice_status
int
ice_pkg_buf_unreserve_section(struct ice_buf_build *bld, u16 count);
u16 ice_pkg_buf_get_free_space(struct ice_buf_build *bld);
u16 ice_pkg_buf_get_active_sections(struct ice_buf_build *bld);
enum ice_status
int
ice_update_pkg(struct ice_hw *hw, struct ice_buf *bufs, u32 count);
enum ice_status
int
ice_update_pkg_no_lock(struct ice_hw *hw, struct ice_buf *bufs, u32 count);
void ice_release_global_cfg_lock(struct ice_hw *hw);
struct ice_generic_seg_hdr *
@ -444,7 +445,7 @@ enum ice_ddp_state
ice_get_pkg_info(struct ice_hw *hw);
void ice_init_pkg_hints(struct ice_hw *hw, struct ice_seg *ice_seg);
struct ice_buf_table *ice_find_buf_table(struct ice_seg *ice_seg);
enum ice_status
int
ice_acquire_global_cfg_lock(struct ice_hw *hw,
enum ice_aq_res_access_type access);
@ -473,6 +474,6 @@ ice_pkg_buf_alloc_single_section(struct ice_hw *hw, u32 type, u16 size,
struct ice_buf *ice_pkg_buf(struct ice_buf_build *bld);
void ice_pkg_buf_free(struct ice_hw *hw, struct ice_buf_build *bld);
enum ice_status ice_cfg_tx_topo(struct ice_hw *hw, u8 *buf, u32 len);
int ice_cfg_tx_topo(struct ice_hw *hw, u8 *buf, u32 len);
#endif /* _ICE_DDP_COMMON_H_ */
#endif /* _ICE_DDP_H_ */

38
sys/dev/ice/ice_devids.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright (c) 2023, Intel Corporation
/* Copyright (c) 2024, Intel Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@ -44,6 +44,24 @@
#define ICE_DEV_ID_E823L_1GBE 0x124F
/* Intel(R) Ethernet Connection E823-L for QSFP */
#define ICE_DEV_ID_E823L_QSFP 0x151D
/* Intel(R) Ethernet Controller E830-CC for backplane */
#define ICE_DEV_ID_E830_BACKPLANE 0x12D1
/* Intel(R) Ethernet Controller E830-CC for QSFP */
#define ICE_DEV_ID_E830_QSFP56 0x12D2
/* Intel(R) Ethernet Controller E830-CC for SFP */
#define ICE_DEV_ID_E830_SFP 0x12D3
/* Intel(R) Ethernet Controller E830-C for backplane */
#define ICE_DEV_ID_E830C_BACKPLANE 0x12D5
/* Intel(R) Ethernet Controller E830-XXV for backplane */
#define ICE_DEV_ID_E830_XXV_BACKPLANE 0x12DC
/* Intel(R) Ethernet Controller E830-C for QSFP */
#define ICE_DEV_ID_E830C_QSFP 0x12D8
/* Intel(R) Ethernet Controller E830-XXV for QSFP */
#define ICE_DEV_ID_E830_XXV_QSFP 0x12DD
/* Intel(R) Ethernet Controller E830-C for SFP */
#define ICE_DEV_ID_E830C_SFP 0x12DA
/* Intel(R) Ethernet Controller E830-XXV for SFP */
#define ICE_DEV_ID_E830_XXV_SFP 0x12DE
/* Intel(R) Ethernet Controller E810-C for backplane */
#define ICE_DEV_ID_E810C_BACKPLANE 0x1591
/* Intel(R) Ethernet Controller E810-C for QSFP */
@ -52,11 +70,11 @@
#define ICE_DEV_ID_E810C_SFP 0x1593
#define ICE_SUBDEV_ID_E810T 0x000E
#define ICE_SUBDEV_ID_E810T2 0x000F
#define ICE_SUBDEV_ID_E810T3 0x02E9
#define ICE_SUBDEV_ID_E810T4 0x02EA
#define ICE_SUBDEV_ID_E810T5 0x0010
#define ICE_SUBDEV_ID_E810T6 0x0012
#define ICE_SUBDEV_ID_E810T7 0x0011
#define ICE_SUBDEV_ID_E810T3 0x0010
#define ICE_SUBDEV_ID_E810T4 0x0011
#define ICE_SUBDEV_ID_E810T5 0x0012
#define ICE_SUBDEV_ID_E810T6 0x02E9
#define ICE_SUBDEV_ID_E810T7 0x02EA
/* Intel(R) Ethernet Controller E810-XXV for backplane */
#define ICE_DEV_ID_E810_XXV_BACKPLANE 0x1599
/* Intel(R) Ethernet Controller E810-XXV for QSFP */
@ -91,4 +109,12 @@
#define ICE_DEV_ID_E822L_10G_BASE_T 0x1899
/* Intel(R) Ethernet Connection E822-L 1GbE */
#define ICE_DEV_ID_E822L_SGMII 0x189A
/* Intel(R) Ethernet Connection E825-C for backplane */
#define ICE_DEV_ID_E825C_BACKPLANE 0x579C
/* Intel(R) Ethernet Connection E825-C for QSFP */
#define ICE_DEV_ID_E825C_QSFP 0x579D
/* Intel(R) Ethernet Connection E825-C for SFP */
#define ICE_DEV_ID_E825C_SFP 0x579E
/* Intel(R) Ethernet Connection E825-C 1GbE */
#define ICE_DEV_ID_E825C_SGMII 0x579F
#endif /* _ICE_DEVIDS_H_ */

49
sys/dev/ice/ice_drv_info.h
View file

@ -62,16 +62,16 @@
* @var ice_rc_version
* @brief driver release candidate version number
*/
const char ice_driver_version[] = "1.39.13-k";
const char ice_driver_version[] = "1.42.1-k";
const uint8_t ice_major_version = 1;
const uint8_t ice_minor_version = 39;
const uint8_t ice_patch_version = 13;
const uint8_t ice_minor_version = 42;
const uint8_t ice_patch_version = 1;
const uint8_t ice_rc_version = 0;
#define PVIDV(vendor, devid, name) \
PVID(vendor, devid, name " - 1.39.13-k")
PVID(vendor, devid, name " - 1.42.1-k")
#define PVIDV_OEM(vendor, devid, svid, sdevid, revid, name) \
PVID_OEM(vendor, devid, svid, sdevid, revid, name " - 1.39.13-k")
PVID_OEM(vendor, devid, svid, sdevid, revid, name " - 1.42.1-k")
/**
* @var ice_vendor_info_array
@ -190,6 +190,45 @@ static const pci_vendor_info_t ice_vendor_info_array[] = {
"Intel(R) Ethernet Network Adapter E810-XXV-2 for OCP 3.0"),
PVIDV(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810_XXV_SFP,
"Intel(R) Ethernet Controller E810-XXV for SFP"),
PVIDV(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E830_BACKPLANE,
"Intel(R) Ethernet Connection E830-CC for backplane"),
PVIDV_OEM(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E830_QSFP56,
ICE_INTEL_VENDOR_ID, 0x0002, 0,
"Intel(R) Ethernet Network Adapter E830-C-Q2 for OCP 3.0"),
PVIDV_OEM(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E830_QSFP56,
ICE_INTEL_VENDOR_ID, 0x0004, 0,
"Intel(R) Ethernet Network Adapter E830-CC-Q1 for OCP 3.0"),
PVIDV(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E830_QSFP56,
"Intel(R) Ethernet Connection E830-CC for QSFP56"),
PVIDV_OEM(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E830_SFP,
ICE_INTEL_VENDOR_ID, 0x0001, 0,
"Intel(R) Ethernet Network Adapter E830-XXV-2 for OCP 3.0"),
PVIDV_OEM(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E830_SFP,
ICE_INTEL_VENDOR_ID, 0x0003, 0,
"Intel(R) Ethernet Network Adapter E830-XXV-2"),
PVIDV_OEM(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E830_SFP,
ICE_INTEL_VENDOR_ID, 0x0004, 0,
"Intel(R) Ethernet Network Adapter E830-XXV-4 for OCP 3.0"),
PVIDV(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E830_SFP,
"Intel(R) Ethernet Connection E830-CC for SFP"),
PVIDV(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E830C_BACKPLANE,
"Intel(R) Ethernet Connection E830-C for backplane"),
PVIDV(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E830C_QSFP,
"Intel(R) Ethernet Connection E830-C for QSFP"),
PVIDV(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E830C_SFP,
"Intel(R) Ethernet Connection E830-C for SFP"),
PVIDV(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E830_XXV_BACKPLANE,
"Intel(R) Ethernet Connection E830-XXV for backplane"),
PVIDV(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E830_XXV_QSFP,
"Intel(R) Ethernet Connection E830-XXV for QSFP"),
PVIDV(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E830_XXV_SFP,
"Intel(R) Ethernet Connection E830-XXV for SFP"),
PVIDV(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E825C_BACKPLANE,
"Intel(R) Ethernet Connection E825-C for backplane"),
PVIDV(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E825C_QSFP,
"Intel(R) Ethernet Connection E825-C for QSFP"),
PVIDV(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E825C_SFP,
"Intel(R) Ethernet Connection E825-C for SFP"),
PVID_END
};

3
sys/dev/ice/ice_features.h
View file

@ -71,6 +71,8 @@ enum feat_list {
ICE_FEATURE_TX_BALANCE,
ICE_FEATURE_DUAL_NAC,
ICE_FEATURE_TEMP_SENSOR,
ICE_FEATURE_NEXT_CLUSTER_ID,
ICE_FEATURE_PHY_STATISTICS,
/* Must be last entry */
ICE_FEATURE_COUNT
};
@ -89,6 +91,7 @@ enum feat_list {
static inline void
ice_disable_unsupported_features(ice_bitmap_t __unused *bitmap)
{
ice_clear_bit(ICE_FEATURE_SRIOV, bitmap);
#ifndef DEV_NETMAP
ice_clear_bit(ICE_FEATURE_NETMAP, bitmap);
#endif

266
sys/dev/ice/ice_flex_pipe.c
View file

File diff suppressed because it is too large Load diff

38
sys/dev/ice/ice_flex_pipe.h
View file

@ -34,10 +34,10 @@
#include "ice_type.h"
enum ice_status
int
ice_find_prot_off(struct ice_hw *hw, enum ice_block blk, u8 prof, u16 fv_idx,
u8 *prot, u16 *off);
enum ice_status
int
ice_find_label_value(struct ice_seg *ice_seg, char const *name, u32 type,
u16 *value);
void
@ -45,54 +45,54 @@ ice_get_sw_fv_bitmap(struct ice_hw *hw, enum ice_prof_type type,
ice_bitmap_t *bm);
void
ice_init_prof_result_bm(struct ice_hw *hw);
enum ice_status
int
ice_aq_upload_section(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,
u16 buf_size, struct ice_sq_cd *cd);
bool
ice_get_open_tunnel_port(struct ice_hw *hw, enum ice_tunnel_type type,
u16 *port);
enum ice_status
int
ice_create_tunnel(struct ice_hw *hw, enum ice_tunnel_type type, u16 port);
enum ice_status ice_destroy_tunnel(struct ice_hw *hw, u16 port, bool all);
int ice_destroy_tunnel(struct ice_hw *hw, u16 port, bool all);
bool ice_tunnel_port_in_use(struct ice_hw *hw, u16 port, u16 *index);
bool
ice_tunnel_get_type(struct ice_hw *hw, u16 port, enum ice_tunnel_type *type);
enum ice_status ice_replay_tunnels(struct ice_hw *hw);
int ice_replay_tunnels(struct ice_hw *hw);
/* XLT1/PType group functions */
enum ice_status ice_ptg_update_xlt1(struct ice_hw *hw, enum ice_block blk);
int ice_ptg_update_xlt1(struct ice_hw *hw, enum ice_block blk);
void ice_ptg_free(struct ice_hw *hw, enum ice_block blk, u8 ptg);
/* XLT2/VSI group functions */
enum ice_status ice_vsig_update_xlt2(struct ice_hw *hw, enum ice_block blk);
enum ice_status
int ice_vsig_update_xlt2(struct ice_hw *hw, enum ice_block blk);
int
ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig);
enum ice_status
int
ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id,
ice_bitmap_t *ptypes, struct ice_fv_word *es);
struct ice_prof_map *
ice_search_prof_id(struct ice_hw *hw, enum ice_block blk, u64 id);
enum ice_status
int
ice_add_vsi_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig);
enum ice_status
int
ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl);
enum ice_status
int
ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl);
enum ice_status
int
ice_set_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 cntxt);
enum ice_status
int
ice_get_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 *cntxt);
enum ice_status ice_init_hw_tbls(struct ice_hw *hw);
int ice_init_hw_tbls(struct ice_hw *hw);
void ice_fill_blk_tbls(struct ice_hw *hw);
void ice_clear_hw_tbls(struct ice_hw *hw);
void ice_free_hw_tbls(struct ice_hw *hw);
enum ice_status
int
ice_add_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi[], u8 count,
u64 id);
enum ice_status
int
ice_rem_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi[], u8 count,
u64 id);
enum ice_status
int
ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id);
void ice_fill_blk_tbls(struct ice_hw *hw);

100
sys/dev/ice/ice_flow.c
View file

@ -417,8 +417,7 @@ struct ice_flow_prof_params {
* @segs: array of one or more packet segments that describe the flow
* @segs_cnt: number of packet segments provided
*/
static enum ice_status
ice_flow_val_hdrs(struct ice_flow_seg_info *segs, u8 segs_cnt)
static int ice_flow_val_hdrs(struct ice_flow_seg_info *segs, u8 segs_cnt)
{
u8 i;
@ -434,7 +433,7 @@ ice_flow_val_hdrs(struct ice_flow_seg_info *segs, u8 segs_cnt)
return ICE_ERR_PARAM;
}
return ICE_SUCCESS;
return 0;
}
/**
@ -444,7 +443,7 @@ ice_flow_val_hdrs(struct ice_flow_seg_info *segs, u8 segs_cnt)
* This function identifies the packet types associated with the protocol
* headers being present in packet segments of the specified flow profile.
*/
static enum ice_status
static int
ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
{
struct ice_flow_prof *prof;
@ -544,10 +543,10 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
}
}
return ICE_SUCCESS;
return 0;
}
/**
/*
* ice_flow_xtract_fld - Create an extraction sequence entry for the given field
* @hw: pointer to the HW struct
* @params: information about the flow to be processed
@ -558,7 +557,7 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
* field. It then allocates one or more extraction sequence entries for the
* given field, and fill the entries with protocol ID and offset information.
*/
static enum ice_status
static int
ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
u8 seg, enum ice_flow_field fld)
{
@ -704,7 +703,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
off += ICE_FLOW_FV_EXTRACT_SZ;
}
return ICE_SUCCESS;
return 0;
}
/**
@ -715,11 +714,11 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
* This function iterates through all matched fields in the given segments, and
* creates an extraction sequence for the fields.
*/
static enum ice_status
static int
ice_flow_create_xtrct_seq(struct ice_hw *hw,
struct ice_flow_prof_params *params)
{
enum ice_status status = ICE_SUCCESS;
int status = 0;
u8 i;
for (i = 0; i < params->prof->segs_cnt; i++) {
@ -744,10 +743,10 @@ ice_flow_create_xtrct_seq(struct ice_hw *hw,
* @hw: pointer to the HW struct
* @params: information about the flow to be processed
*/
static enum ice_status
static int
ice_flow_proc_segs(struct ice_hw *hw, struct ice_flow_prof_params *params)
{
enum ice_status status;
int status;
status = ice_flow_proc_seg_hdrs(params);
if (status)
@ -759,7 +758,7 @@ ice_flow_proc_segs(struct ice_hw *hw, struct ice_flow_prof_params *params)
switch (params->blk) {
case ICE_BLK_RSS:
status = ICE_SUCCESS;
status = 0;
break;
default:
return ICE_ERR_NOT_IMPL;
@ -869,18 +868,18 @@ ice_flow_find_prof_id(struct ice_hw *hw, enum ice_block blk, u64 prof_id)
* @prof_id: the profile ID handle
* @hw_prof_id: pointer to variable to receive the HW profile ID
*/
enum ice_status
int
ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
u8 *hw_prof_id)
{
enum ice_status status = ICE_ERR_DOES_NOT_EXIST;
struct ice_prof_map *map;
int status = ICE_ERR_DOES_NOT_EXIST;
ice_acquire_lock(&hw->blk[blk].es.prof_map_lock);
map = ice_search_prof_id(hw, blk, prof_id);
if (map) {
*hw_prof_id = map->prof_id;
status = ICE_SUCCESS;
status = 0;
}
ice_release_lock(&hw->blk[blk].es.prof_map_lock);
return status;
@ -900,7 +899,7 @@ ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
*
* Assumption: the caller has acquired the lock to the profile list
*/
static enum ice_status
static int
ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,
enum ice_flow_dir dir, u64 prof_id,
struct ice_flow_seg_info *segs, u8 segs_cnt,
@ -908,7 +907,7 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,
struct ice_flow_prof **prof)
{
struct ice_flow_prof_params *params;
enum ice_status status;
int status;
u8 i;
if (!prof || (acts_cnt && !acts))
@ -976,11 +975,11 @@ free_params:
*
* Assumption: the caller has acquired the lock to the profile list
*/
static enum ice_status
static int
ice_flow_rem_prof_sync(struct ice_hw *hw, enum ice_block blk,
struct ice_flow_prof *prof)
{
enum ice_status status;
int status;
/* Remove all hardware profiles associated with this flow profile */
status = ice_rem_prof(hw, blk, prof->id);
@ -1003,11 +1002,11 @@ ice_flow_rem_prof_sync(struct ice_hw *hw, enum ice_block blk,
* be added has the same characteristics as the VSIG and will
* thereby have access to all resources added to that VSIG.
*/
enum ice_status
int
ice_flow_assoc_vsig_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle,
u16 vsig)
{
enum ice_status status;
int status;
if (!ice_is_vsi_valid(hw, vsi_handle) || blk >= ICE_BLK_COUNT)
return ICE_ERR_PARAM;
@ -1030,11 +1029,11 @@ ice_flow_assoc_vsig_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle,
* Assumption: the caller has acquired the lock to the profile list
* and the software VSI handle has been validated
*/
static enum ice_status
static int
ice_flow_assoc_prof(struct ice_hw *hw, enum ice_block blk,
struct ice_flow_prof *prof, u16 vsi_handle)
{
enum ice_status status = ICE_SUCCESS;
int status = 0;
if (!ice_is_bit_set(prof->vsis, vsi_handle)) {
status = ice_add_prof_id_flow(hw, blk,
@ -1061,11 +1060,11 @@ ice_flow_assoc_prof(struct ice_hw *hw, enum ice_block blk,
* Assumption: the caller has acquired the lock to the profile list
* and the software VSI handle has been validated
*/
static enum ice_status
static int
ice_flow_disassoc_prof(struct ice_hw *hw, enum ice_block blk,
struct ice_flow_prof *prof, u16 vsi_handle)
{
enum ice_status status = ICE_SUCCESS;
int status = 0;
if (ice_is_bit_set(prof->vsis, vsi_handle)) {
status = ice_rem_prof_id_flow(hw, blk,
@ -1094,13 +1093,13 @@ ice_flow_disassoc_prof(struct ice_hw *hw, enum ice_block blk,
* @acts_cnt: number of default actions
* @prof: stores the returned flow profile added
*/
static enum ice_status
static int
ice_flow_add_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,
u64 prof_id, struct ice_flow_seg_info *segs, u8 segs_cnt,
struct ice_flow_action *acts, u8 acts_cnt,
struct ice_flow_prof **prof)
{
enum ice_status status;
int status;
if (segs_cnt > ICE_FLOW_SEG_MAX)
return ICE_ERR_MAX_LIMIT;
@ -1133,11 +1132,11 @@ ice_flow_add_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,
* @blk: the block for which the flow profile is to be removed
* @prof_id: unique ID of the flow profile to be removed
*/
static enum ice_status
static int
ice_flow_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id)
{
struct ice_flow_prof *prof;
enum ice_status status;
int status;
ice_acquire_lock(&hw->fl_profs_locks[blk]);
@ -1275,7 +1274,7 @@ ice_flow_set_fld_prefix(struct ice_flow_seg_info *seg, enum ice_flow_field fld,
* header value to set flow field segment for further use in flow
* profile entry or removal.
*/
static enum ice_status
static int
ice_flow_set_rss_seg_info(struct ice_flow_seg_info *segs, u8 seg_cnt,
const struct ice_rss_hash_cfg *cfg)
{
@ -1323,7 +1322,7 @@ ice_flow_set_rss_seg_info(struct ice_flow_seg_info *segs, u8 seg_cnt,
if (val && !ice_is_pow2(val))
return ICE_ERR_CFG;
return ICE_SUCCESS;
return 0;
}
/**
@ -1360,18 +1359,18 @@ void ice_rem_vsi_rss_list(struct ice_hw *hw, u16 vsi_handle)
* the VSI from that profile. If the flow profile has no VSIs it will
* be removed.
*/
enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
int ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
{
const enum ice_block blk = ICE_BLK_RSS;
struct ice_flow_prof *p, *t;
enum ice_status status = ICE_SUCCESS;
int status = 0;
u16 vsig;
if (!ice_is_vsi_valid(hw, vsi_handle))
return ICE_ERR_PARAM;
if (LIST_EMPTY(&hw->fl_profs[blk]))
return ICE_SUCCESS;
return 0;
ice_acquire_lock(&hw->rss_locks);
LIST_FOR_EACH_ENTRY_SAFE(p, t, &hw->fl_profs[blk], ice_flow_prof,
@ -1477,7 +1476,7 @@ ice_rem_rss_list(struct ice_hw *hw, u16 vsi_handle, struct ice_flow_prof *prof)
*
* Assumption: lock has already been acquired for RSS list
*/
static enum ice_status
static int
ice_add_rss_list(struct ice_hw *hw, u16 vsi_handle, struct ice_flow_prof *prof)
{
enum ice_rss_cfg_hdr_type hdr_type;
@ -1497,7 +1496,7 @@ ice_add_rss_list(struct ice_hw *hw, u16 vsi_handle, struct ice_flow_prof *prof)
r->hash.addl_hdrs == prof->segs[prof->segs_cnt - 1].hdrs &&
r->hash.hdr_type == hdr_type) {
ice_set_bit(vsi_handle, r->vsis);
return ICE_SUCCESS;
return 0;
}
rss_cfg = (struct ice_rss_cfg *)ice_malloc(hw, sizeof(*rss_cfg));
@ -1512,7 +1511,7 @@ ice_add_rss_list(struct ice_hw *hw, u16 vsi_handle, struct ice_flow_prof *prof)
LIST_ADD_TAIL(&rss_cfg->l_entry, &hw->rss_list_head);
return ICE_SUCCESS;
return 0;
}
#define ICE_FLOW_PROF_HASH_S 0
@ -1545,15 +1544,15 @@ ice_add_rss_list(struct ice_hw *hw, u16 vsi_handle, struct ice_flow_prof *prof)
*
* Assumption: lock has already been acquired for RSS list
*/
static enum ice_status
static int
ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle,
const struct ice_rss_hash_cfg *cfg)
{
const enum ice_block blk = ICE_BLK_RSS;
struct ice_flow_prof *prof = NULL;
struct ice_flow_seg_info *segs;
enum ice_status status;
u8 segs_cnt;
int status;
if (cfg->symm)
return ICE_ERR_PARAM;
@ -1657,12 +1656,12 @@ exit:
* the input fields to hash on, the flow type and use the VSI number to add
* a flow entry to the profile.
*/
enum ice_status
int
ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle,
const struct ice_rss_hash_cfg *cfg)
{
struct ice_rss_hash_cfg local_cfg;
enum ice_status status;
int status;
if (!ice_is_vsi_valid(hw, vsi_handle) || !cfg ||
cfg->hdr_type > ICE_RSS_ANY_HEADERS ||
@ -1695,15 +1694,15 @@ ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle,
*
* Assumption: lock has already been acquired for RSS list
*/
static enum ice_status
static int
ice_rem_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle,
const struct ice_rss_hash_cfg *cfg)
{
const enum ice_block blk = ICE_BLK_RSS;
struct ice_flow_seg_info *segs;
struct ice_flow_prof *prof;
enum ice_status status;
u8 segs_cnt;
int status;
segs_cnt = (cfg->hdr_type == ICE_RSS_OUTER_HEADERS) ?
ICE_FLOW_SEG_SINGLE :
@ -1755,12 +1754,12 @@ out:
* removed. Calls are made to underlying flow apis which will in
* turn build or update buffers for RSS XLT1 section.
*/
enum ice_status
int
ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle,
const struct ice_rss_hash_cfg *cfg)
{
struct ice_rss_hash_cfg local_cfg;
enum ice_status status;
int status;
if (!ice_is_vsi_valid(hw, vsi_handle) || !cfg ||
cfg->hdr_type > ICE_RSS_ANY_HEADERS ||
@ -1827,11 +1826,10 @@ ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle,
* message, convert it to ICE-compatible values, and configure RSS flow
* profiles.
*/
enum ice_status
ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 avf_hash)
int ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 avf_hash)
{
enum ice_status status = ICE_SUCCESS;
struct ice_rss_hash_cfg hcfg;
int status = 0;
u64 hash_flds;
if (avf_hash == ICE_AVF_FLOW_FIELD_INVALID ||
@ -1920,10 +1918,10 @@ ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 avf_hash)
* @hw: pointer to the hardware structure
* @vsi_handle: software VSI handle
*/
enum ice_status ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
int ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
{
enum ice_status status = ICE_SUCCESS;
struct ice_rss_cfg *r;
int status = 0;
if (!ice_is_vsi_valid(hw, vsi_handle))
return ICE_ERR_PARAM;

14
sys/dev/ice/ice_flow.h
View file

@ -330,24 +330,24 @@ struct ice_flow_action {
u64
ice_flow_find_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,
struct ice_flow_seg_info *segs, u8 segs_cnt);
enum ice_status
int
ice_flow_assoc_vsig_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle,
u16 vsig);
enum ice_status
int
ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
u8 *hw_prof);
void
ice_flow_set_fld_prefix(struct ice_flow_seg_info *seg, enum ice_flow_field fld,
u16 val_loc, u16 prefix_loc, u8 prefix_sz);
void ice_rem_vsi_rss_list(struct ice_hw *hw, u16 vsi_handle);
enum ice_status ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle);
enum ice_status
int ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle);
int
ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds);
enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle);
enum ice_status
int ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle);
int
ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle,
const struct ice_rss_hash_cfg *cfg);
enum ice_status
int
ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle,
const struct ice_rss_hash_cfg *cfg);
u64 ice_get_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u32 hdrs);

4
sys/dev/ice/ice_fw_logging.c
View file

@ -79,7 +79,7 @@ static int ice_sysctl_fwlog_module_log_severity(SYSCTL_HANDLER_ARGS);
static int
ice_reconfig_fw_log(struct ice_softc *sc, struct ice_fwlog_cfg *cfg)
{
enum ice_status status;
int status;
ice_fwlog_init(&sc->hw, cfg);
@ -223,7 +223,7 @@ ice_sysctl_fwlog_register(SYSCTL_HANDLER_ARGS)
{
struct ice_softc *sc = (struct ice_softc *)arg1;
struct ice_fwlog_cfg *cfg = &sc->hw.fwlog_cfg;
enum ice_status status;
int status;
int error;
u8 enabled;

39
sys/dev/ice/ice_fwlog.c
View file

@ -29,6 +29,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "ice_osdep.h"
#include "ice_common.h"
#include "ice_fwlog.h"
@ -120,7 +121,7 @@ static bool valid_cfg(struct ice_hw *hw, struct ice_fwlog_cfg *cfg)
* ice_init_hw(). Firmware logging will be configured based on these settings
* and also the PF will be registered on init.
*/
enum ice_status
int
ice_fwlog_init(struct ice_hw *hw, struct ice_fwlog_cfg *cfg)
{
if (!valid_cfg(hw, cfg))
@ -128,7 +129,7 @@ ice_fwlog_init(struct ice_hw *hw, struct ice_fwlog_cfg *cfg)
cache_cfg(hw, cfg);
return ICE_SUCCESS;
return 0;
}
/**
@ -139,14 +140,14 @@ ice_fwlog_init(struct ice_hw *hw, struct ice_fwlog_cfg *cfg)
* @options: options from ice_fwlog_cfg->options structure
* @log_resolution: logging resolution
*/
static enum ice_status
static int
ice_aq_fwlog_set(struct ice_hw *hw, struct ice_fwlog_module_entry *entries,
u16 num_entries, u16 options, u16 log_resolution)
{
struct ice_aqc_fw_log_cfg_resp *fw_modules;
struct ice_aqc_fw_log *cmd;
struct ice_aq_desc desc;
enum ice_status status;
int status;
u16 i;
fw_modules = (struct ice_aqc_fw_log_cfg_resp *)
@ -208,10 +209,10 @@ bool ice_fwlog_supported(struct ice_hw *hw)
* ice_fwlog_register. Note, that ice_fwlog_register does not need to be called
* for init.
*/
enum ice_status
int
ice_fwlog_set(struct ice_hw *hw, struct ice_fwlog_cfg *cfg)
{
enum ice_status status;
int status;
if (!ice_fwlog_supported(hw))
return ICE_ERR_NOT_SUPPORTED;
@ -268,13 +269,13 @@ update_cached_entries(struct ice_hw *hw, struct ice_fwlog_module_entry *entries,
* Only the entries passed in will be affected. All other firmware logging
* settings will be unaffected.
*/
enum ice_status
int
ice_fwlog_update_modules(struct ice_hw *hw,
struct ice_fwlog_module_entry *entries,
u16 num_entries)
{
struct ice_fwlog_cfg *cfg;
enum ice_status status;
int status;
if (!ice_fwlog_supported(hw))
return ICE_ERR_NOT_SUPPORTED;
@ -305,7 +306,7 @@ status_out:
* @hw: pointer to the HW structure
* @reg: true to register and false to unregister
*/
static enum ice_status ice_aq_fwlog_register(struct ice_hw *hw, bool reg)
static int ice_aq_fwlog_register(struct ice_hw *hw, bool reg)
{
struct ice_aq_desc desc;
@ -324,9 +325,9 @@ static enum ice_status ice_aq_fwlog_register(struct ice_hw *hw, bool reg)
* After this call the PF will start to receive firmware logging based on the
* configuration set in ice_fwlog_set.
*/
enum ice_status ice_fwlog_register(struct ice_hw *hw)
int ice_fwlog_register(struct ice_hw *hw)
{
enum ice_status status;
int status;
if (!ice_fwlog_supported(hw))
return ICE_ERR_NOT_SUPPORTED;
@ -344,9 +345,9 @@ enum ice_status ice_fwlog_register(struct ice_hw *hw)
* ice_fwlog_unregister - Unregister the PF from firmware logging
* @hw: pointer to the HW structure
*/
enum ice_status ice_fwlog_unregister(struct ice_hw *hw)
int ice_fwlog_unregister(struct ice_hw *hw)
{
enum ice_status status;
int status;
if (!ice_fwlog_supported(hw))
return ICE_ERR_NOT_SUPPORTED;
@ -365,14 +366,14 @@ enum ice_status ice_fwlog_unregister(struct ice_hw *hw)
* @hw: pointer to the HW structure
* @cfg: firmware logging configuration to populate
*/
static enum ice_status
static int
ice_aq_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg)
{
struct ice_aqc_fw_log_cfg_resp *fw_modules;
struct ice_aqc_fw_log *cmd;
struct ice_aq_desc desc;
enum ice_status status;
u16 i, module_id_cnt;
int status;
void *buf;
ice_memset(cfg, 0, sizeof(*cfg), ICE_NONDMA_MEM);
@ -438,7 +439,7 @@ status_out:
void ice_fwlog_set_support_ena(struct ice_hw *hw)
{
struct ice_fwlog_cfg *cfg;
enum ice_status status;
int status;
hw->fwlog_support_ena = false;
@ -465,10 +466,10 @@ void ice_fwlog_set_support_ena(struct ice_hw *hw)
* @hw: pointer to the HW structure
* @cfg: config to populate based on current firmware logging settings
*/
enum ice_status
int
ice_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg)
{
enum ice_status status;
int status;
if (!ice_fwlog_supported(hw))
return ICE_ERR_NOT_SUPPORTED;
@ -482,7 +483,7 @@ ice_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg)
cache_cfg(hw, cfg);
return ICE_SUCCESS;
return 0;
}
/**

12
sys/dev/ice/ice_fwlog.h
View file

@ -76,15 +76,15 @@ struct ice_fwlog_cfg {
void ice_fwlog_set_support_ena(struct ice_hw *hw);
bool ice_fwlog_supported(struct ice_hw *hw);
enum ice_status ice_fwlog_init(struct ice_hw *hw, struct ice_fwlog_cfg *cfg);
enum ice_status ice_fwlog_set(struct ice_hw *hw, struct ice_fwlog_cfg *cfg);
enum ice_status ice_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg);
enum ice_status
int ice_fwlog_init(struct ice_hw *hw, struct ice_fwlog_cfg *cfg);
int ice_fwlog_set(struct ice_hw *hw, struct ice_fwlog_cfg *cfg);
int ice_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg);
int
ice_fwlog_update_modules(struct ice_hw *hw,
struct ice_fwlog_module_entry *entries,
u16 num_entries);
enum ice_status ice_fwlog_register(struct ice_hw *hw);
enum ice_status ice_fwlog_unregister(struct ice_hw *hw);
int ice_fwlog_register(struct ice_hw *hw);
int ice_fwlog_unregister(struct ice_hw *hw);
void
ice_fwlog_event_dump(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf);
#endif /* _ICE_FWLOG_H_ */

2557
sys/dev/ice/ice_hw_autogen.h
View file

File diff suppressed because it is too large Load diff

1
sys/dev/ice/ice_iflib.h
View file

@ -146,7 +146,6 @@ struct ice_tx_queue {
struct ice_tx_desc *tx_base;
bus_addr_t tx_paddr;
struct tx_stats stats;
u64 tso;
u16 desc_count;
u32 tail;
struct ice_irq_vector *irqv;

8
sys/dev/ice/ice_lan_tx_rx.h
View file

@ -948,10 +948,9 @@ struct ice_tx_ctx_desc {
__le64 qw1;
};
#define ICE_TX_GCS_DESC_START 0 /* 7 BITS */
#define ICE_TX_GCS_DESC_OFFSET 7 /* 4 BITS */
#define ICE_TX_GCS_DESC_TYPE 11 /* 2 BITS */
#define ICE_TX_GCS_DESC_ENA 13 /* 1 BIT */
#define ICE_TX_GCS_DESC_START 0 /* 8 BITS */
#define ICE_TX_GCS_DESC_OFFSET 8 /* 4 BITS */
#define ICE_TX_GCS_DESC_TYPE 12 /* 3 BITS */
#define ICE_TXD_CTX_QW1_DTYPE_S 0
#define ICE_TXD_CTX_QW1_DTYPE_M (0xFUL << ICE_TXD_CTX_QW1_DTYPE_S)
@ -2375,4 +2374,5 @@ static inline struct ice_rx_ptype_decoded ice_decode_rx_desc_ptype(u16 ptype)
#define ICE_LINK_SPEED_40000MBPS 40000
#define ICE_LINK_SPEED_50000MBPS 50000
#define ICE_LINK_SPEED_100000MBPS 100000
#define ICE_LINK_SPEED_200000MBPS 200000
#endif /* _ICE_LAN_TX_RX_H_ */

1113
sys/dev/ice/ice_lib.c
View file

File diff suppressed because it is too large Load diff

109
sys/dev/ice/ice_lib.h
View file

@ -155,6 +155,7 @@ struct ice_bar_info {
#define ICE_MAX_TSO_HDR_SEGS 3
#define ICE_MSIX_BAR 3
#define ICE_MAX_MSIX_VECTORS (GLINT_DYN_CTL_MAX_INDEX + 1)
#define ICE_DEFAULT_DESC_COUNT 1024
#define ICE_MAX_DESC_COUNT 8160
@ -287,6 +288,12 @@ struct ice_bar_info {
#define ICE_APPLY_FEC_FC (ICE_APPLY_FEC | ICE_APPLY_FC)
#define ICE_APPLY_LS_FEC_FC (ICE_APPLY_LS_FEC | ICE_APPLY_FC)
/*
* Mask of valid flags that can be used as an input for the
* advertise_speed sysctl.
*/
#define ICE_SYSCTL_SPEEDS_VALID_RANGE 0xFFF
/**
* @enum ice_dyn_idx_t
* @brief Dynamic Control ITR indexes
@ -313,6 +320,28 @@ enum ice_dyn_idx_t {
#define ICE_DFLT_TX_ITR 50
#define ICE_DFLT_RX_ITR 50
/* RS FEC register values */
#define ICE_RS_FEC_REG_SHIFT 2
#define ICE_RS_FEC_RECV_ID_SHIFT 4
#define ICE_RS_FEC_CORR_LOW_REG_PORT0 (0x02 << ICE_RS_FEC_REG_SHIFT)
#define ICE_RS_FEC_CORR_HIGH_REG_PORT0 (0x03 << ICE_RS_FEC_REG_SHIFT)
#define ICE_RS_FEC_UNCORR_LOW_REG_PORT0 (0x04 << ICE_RS_FEC_REG_SHIFT)
#define ICE_RS_FEC_UNCORR_HIGH_REG_PORT0 (0x05 << ICE_RS_FEC_REG_SHIFT)
#define ICE_RS_FEC_CORR_LOW_REG_PORT1 (0x42 << ICE_RS_FEC_REG_SHIFT)
#define ICE_RS_FEC_CORR_HIGH_REG_PORT1 (0x43 << ICE_RS_FEC_REG_SHIFT)
#define ICE_RS_FEC_UNCORR_LOW_REG_PORT1 (0x44 << ICE_RS_FEC_REG_SHIFT)
#define ICE_RS_FEC_UNCORR_HIGH_REG_PORT1 (0x45 << ICE_RS_FEC_REG_SHIFT)
#define ICE_RS_FEC_CORR_LOW_REG_PORT2 (0x4A << ICE_RS_FEC_REG_SHIFT)
#define ICE_RS_FEC_CORR_HIGH_REG_PORT2 (0x4B << ICE_RS_FEC_REG_SHIFT)
#define ICE_RS_FEC_UNCORR_LOW_REG_PORT2 (0x4C << ICE_RS_FEC_REG_SHIFT)
#define ICE_RS_FEC_UNCORR_HIGH_REG_PORT2 (0x4D << ICE_RS_FEC_REG_SHIFT)
#define ICE_RS_FEC_CORR_LOW_REG_PORT3 (0x52 << ICE_RS_FEC_REG_SHIFT)
#define ICE_RS_FEC_CORR_HIGH_REG_PORT3 (0x53 << ICE_RS_FEC_REG_SHIFT)
#define ICE_RS_FEC_UNCORR_LOW_REG_PORT3 (0x54 << ICE_RS_FEC_REG_SHIFT)
#define ICE_RS_FEC_UNCORR_HIGH_REG_PORT3 (0x55 << ICE_RS_FEC_REG_SHIFT)
#define ICE_RS_FEC_RECEIVER_ID_PCS0 (0x33 << ICE_RS_FEC_RECV_ID_SHIFT)
#define ICE_RS_FEC_RECEIVER_ID_PCS1 (0x34 << ICE_RS_FEC_RECV_ID_SHIFT)
/**
* ice_itr_to_reg - Convert an ITR setting into its register equivalent
* @hw: The device HW structure
@ -374,10 +403,11 @@ enum ice_rx_dtype {
#define ICE_START_LLDP_RETRY_WAIT (2 * hz)
/*
* Only certain cluster IDs are valid for the FW debug dump functionality,
* so define a mask of those here.
* Only certain clusters are valid for certain devices for the FW debug dump
* functionality, so define masks of those here.
*/
#define ICE_FW_DEBUG_DUMP_VALID_CLUSTER_MASK 0x4001AF
#define ICE_FW_DEBUG_DUMP_VALID_CLUSTER_MASK_E810 0x4001AF
#define ICE_FW_DEBUG_DUMP_VALID_CLUSTER_MASK_E830 0x1AF
struct ice_softc;
@ -428,6 +458,7 @@ struct tx_stats {
u64 tx_bytes;
u64 tx_packets;
u64 mss_too_small;
u64 tso;
u64 cso[ICE_CSO_STAT_TX_COUNT];
};
@ -485,6 +516,9 @@ struct ice_pf_sw_stats {
/* # of detected MDD events for Tx and Rx */
u32 tx_mdd_count;
u32 rx_mdd_count;
u64 rx_roc_error; /* port oversize packet stats, error_cnt \
from GLV_REPC VSI register + RxOversize */
};
/**
@ -580,6 +614,58 @@ struct ice_debug_dump_cmd {
u8 data[];
};
/**
* @struct ice_serdes_equalization
* @brief serdes equalization info
*/
struct ice_serdes_equalization {
int rx_equalization_pre1;
int rx_equalization_pre2;
int rx_equalization_post1;
int rx_equalization_bflf;
int rx_equalization_bfhf;
int rx_equalization_drate;
int tx_equalization_pre1;
int tx_equalization_pre2;
int tx_equalization_pre3;
int tx_equalization_atten;
int tx_equalization_post1;
};
/**
* @struct ice_fec_stats_to_sysctl
* @brief FEC stats register value of port
*/
struct ice_fec_stats_to_sysctl {
u16 fec_corr_cnt_low;
u16 fec_corr_cnt_high;
u16 fec_uncorr_cnt_low;
u16 fec_uncorr_cnt_high;
};
#define ICE_MAX_SERDES_LANE_COUNT 4
/**
* @struct ice_regdump_to_sysctl
* @brief PHY stats of port
*/
struct ice_regdump_to_sysctl {
/* A multilane port can have max 4 serdes */
struct ice_serdes_equalization equalization[ICE_MAX_SERDES_LANE_COUNT];
struct ice_fec_stats_to_sysctl stats;
};
/**
* @struct ice_port_topology
* @brief Port topology from lport i.e. serdes mapping, pcsquad, macport, cage
*/
struct ice_port_topology {
u16 pcs_port;
u16 primary_serdes_lane;
u16 serdes_lane_count;
u16 pcs_quad_select;
};
/**
* @enum ice_state
* @brief Driver state flags
@ -713,7 +799,7 @@ struct ice_str_buf {
};
struct ice_str_buf _ice_aq_str(enum ice_aq_err aq_err);
struct ice_str_buf _ice_status_str(enum ice_status status);
struct ice_str_buf _ice_status_str(int status);
struct ice_str_buf _ice_err_str(int err);
struct ice_str_buf _ice_fltr_flag_str(u16 flag);
struct ice_str_buf _ice_log_sev_str(u8 log_level);
@ -838,7 +924,7 @@ void ice_deinit_vsi(struct ice_vsi *vsi);
uint64_t ice_aq_speed_to_rate(struct ice_port_info *pi);
int ice_get_phy_type_low(uint64_t phy_type_low);
int ice_get_phy_type_high(uint64_t phy_type_high);
enum ice_status ice_add_media_types(struct ice_softc *sc, struct ifmedia *media);
int ice_add_media_types(struct ice_softc *sc, struct ifmedia *media);
void ice_configure_rxq_interrupt(struct ice_hw *hw, u16 rxqid, u16 vector, u8 itr_idx);
void ice_configure_all_rxq_interrupts(struct ice_vsi *vsi);
void ice_configure_txq_interrupt(struct ice_hw *hw, u16 txqid, u16 vector, u8 itr_idx);
@ -864,15 +950,15 @@ void ice_add_sysctls_eth_stats(struct sysctl_ctx_list *ctx,
void ice_add_vsi_sysctls(struct ice_vsi *vsi);
void ice_add_sysctls_mac_stats(struct sysctl_ctx_list *ctx,
struct sysctl_oid *parent,
struct ice_hw_port_stats *stats);
struct ice_softc *sc);
void ice_configure_misc_interrupts(struct ice_softc *sc);
int ice_sync_multicast_filters(struct ice_softc *sc);
enum ice_status ice_add_vlan_hw_filters(struct ice_vsi *vsi, u16 *vid,
int ice_add_vlan_hw_filters(struct ice_vsi *vsi, u16 *vid,
u16 length);
enum ice_status ice_add_vlan_hw_filter(struct ice_vsi *vsi, u16 vid);
enum ice_status ice_remove_vlan_hw_filters(struct ice_vsi *vsi, u16 *vid,
int ice_add_vlan_hw_filter(struct ice_vsi *vsi, u16 vid);
int ice_remove_vlan_hw_filters(struct ice_vsi *vsi, u16 *vid,
u16 length);
enum ice_status ice_remove_vlan_hw_filter(struct ice_vsi *vsi, u16 vid);
int ice_remove_vlan_hw_filter(struct ice_vsi *vsi, u16 vid);
void ice_add_vsi_tunables(struct ice_vsi *vsi, struct sysctl_oid *parent);
void ice_del_vsi_sysctl_ctx(struct ice_vsi *vsi);
void ice_add_device_tunables(struct ice_softc *sc);
@ -887,7 +973,7 @@ void ice_add_txq_sysctls(struct ice_tx_queue *txq);
void ice_add_rxq_sysctls(struct ice_rx_queue *rxq);
int ice_config_rss(struct ice_vsi *vsi);
void ice_clean_all_vsi_rss_cfg(struct ice_softc *sc);
enum ice_status ice_load_pkg_file(struct ice_softc *sc);
int ice_load_pkg_file(struct ice_softc *sc);
void ice_log_pkg_init(struct ice_softc *sc, enum ice_ddp_state pkg_status);
uint64_t ice_get_ifnet_counter(struct ice_vsi *vsi, ift_counter counter);
void ice_save_pci_info(struct ice_hw *hw, device_t dev);
@ -924,6 +1010,7 @@ void ice_init_health_events(struct ice_softc *sc);
void ice_cfg_pba_num(struct ice_softc *sc);
int ice_handle_debug_dump_ioctl(struct ice_softc *sc, struct ifdrv *ifd);
u8 ice_dcb_get_tc_map(const struct ice_dcbx_cfg *dcbcfg);
void ice_print_dual_nac_info(struct ice_softc *sc);
void ice_do_dcb_reconfig(struct ice_softc *sc, bool pending_mib);
int ice_setup_vsi_mirroring(struct ice_vsi *vsi);

374
sys/dev/ice/ice_nvm.c
View file

File diff suppressed because it is too large Load diff

56
sys/dev/ice/ice_nvm.h
View file

@ -96,65 +96,67 @@ union ice_nvm_access_data {
u32 ice_nvm_access_get_module(struct ice_nvm_access_cmd *cmd);
u32 ice_nvm_access_get_flags(struct ice_nvm_access_cmd *cmd);
u32 ice_nvm_access_get_adapter(struct ice_nvm_access_cmd *cmd);
enum ice_status
int
ice_nvm_access_read(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
union ice_nvm_access_data *data);
enum ice_status
int
ice_nvm_access_write(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
union ice_nvm_access_data *data);
enum ice_status
int
ice_nvm_access_get_features(struct ice_nvm_access_cmd *cmd,
union ice_nvm_access_data *data);
enum ice_status
int
ice_handle_nvm_access(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
union ice_nvm_access_data *data);
enum ice_status
int
ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access);
void ice_release_nvm(struct ice_hw *hw);
enum ice_status
int
ice_aq_read_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset, u16 length,
void *data, bool last_command, bool read_shadow_ram,
struct ice_sq_cd *cd);
enum ice_status
int
ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,
bool read_shadow_ram);
enum ice_status
int
ice_get_pfa_module_tlv(struct ice_hw *hw, u16 *module_tlv, u16 *module_tlv_len,
u16 module_type);
enum ice_status
int
ice_get_nvm_minsrevs(struct ice_hw *hw, struct ice_minsrev_info *minsrevs);
enum ice_status
int
ice_update_nvm_minsrevs(struct ice_hw *hw, struct ice_minsrev_info *minsrevs);
enum ice_status
int
ice_get_inactive_orom_ver(struct ice_hw *hw, struct ice_orom_info *orom);
enum ice_status
int
ice_get_inactive_nvm_ver(struct ice_hw *hw, struct ice_nvm_info *nvm);
enum ice_status
int
ice_get_inactive_netlist_ver(struct ice_hw *hw, struct ice_netlist_info *netlist);
enum ice_status
int
ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size);
enum ice_status ice_init_nvm(struct ice_hw *hw);
enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data);
enum ice_status ice_read_sr_word_aq(struct ice_hw *hw, u16 offset, u16 *data);
enum ice_status
int ice_init_nvm(struct ice_hw *hw);
int ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data);
int ice_read_sr_word_aq(struct ice_hw *hw, u16 offset, u16 *data);
int
ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data);
enum ice_status
int
ice_aq_erase_nvm(struct ice_hw *hw, u16 module_typeid, struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_update_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset,
u16 length, void *data, bool last_command, u8 command_flags,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_read_nvm_cfg(struct ice_hw *hw, u8 cmd_flags, u16 field_id, void *data,
u16 buf_size, u16 *elem_count, struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_write_nvm_cfg(struct ice_hw *hw, u8 cmd_flags, void *data, u16 buf_size,
u16 elem_count, struct ice_sq_cd *cd);
enum ice_status ice_update_sr_checksum(struct ice_hw *hw);
enum ice_status ice_validate_sr_checksum(struct ice_hw *hw, u16 *checksum);
enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw);
enum ice_status ice_nvm_recalculate_checksum(struct ice_hw *hw);
enum ice_status
int ice_update_sr_checksum(struct ice_hw *hw);
int ice_validate_sr_checksum(struct ice_hw *hw, u16 *checksum);
int ice_nvm_validate_checksum(struct ice_hw *hw);
int ice_nvm_recalculate_checksum(struct ice_hw *hw);
int
ice_nvm_write_activate(struct ice_hw *hw, u16 cmd_flags, u8 *response_flags);
s32 ice_nvm_sanitize_operate(struct ice_hw *hw);
s32 ice_nvm_sanitize(struct ice_hw *hw, u8 cmd_flags, u8 *values);
#endif /* _ICE_NVM_H_ */

2
sys/dev/ice/ice_rdma.c
View file

@ -168,7 +168,7 @@ ice_rdma_qset_register_request(struct ice_rdma_peer *peer, struct ice_rdma_qset_
struct ice_vsi *vsi = NULL;
struct ice_dcbx_cfg *dcbx_cfg;
struct ice_hw *hw = &sc->hw;
enum ice_status status;
int status;
int count, i, ret = 0;
uint32_t *qset_teid;
uint16_t *qs_handle;

120
sys/dev/ice/ice_sbq_cmd.h Normal file
View file

@ -0,0 +1,120 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright (c) 2024, Intel Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of the Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _ICE_SBQ_CMD_H_
#define _ICE_SBQ_CMD_H_
/* This header file defines the Sideband Queue commands, error codes and
* descriptor format. It is shared between Firmware and Software.
*/
/* Sideband Queue command structure and opcodes */
enum ice_sbq_opc {
/* Sideband Queue commands */
ice_sbq_opc_neigh_dev_req = 0x0C00,
ice_sbq_opc_neigh_dev_ev = 0x0C01
};
/* Sideband Queue descriptor. Indirect command
* and non posted
*/
struct ice_sbq_cmd_desc {
__le16 flags;
__le16 opcode;
__le16 datalen;
__le16 cmd_retval;
/* Opaque message data */
__le32 cookie_high;
__le32 cookie_low;
union {
__le16 cmd_len;
__le16 cmpl_len;
} param0;
u8 reserved[6];
__le32 addr_high;
__le32 addr_low;
};
struct ice_sbq_evt_desc {
__le16 flags;
__le16 opcode;
__le16 datalen;
__le16 cmd_retval;
u8 data[24];
};
enum ice_sbq_msg_dev {
rmn_0 = 0x02,
rmn_1 = 0x03,
rmn_2 = 0x04,
cgu = 0x06
};
enum ice_sbq_msg_opcode {
ice_sbq_msg_rd = 0x00,
ice_sbq_msg_wr = 0x01
};
#define ICE_SBQ_MSG_FLAGS 0x40
#define ICE_SBQ_MSG_SBE_FBE 0x0F
struct ice_sbq_msg_req {
u8 dest_dev;
u8 src_dev;
u8 opcode;
u8 flags;
u8 sbe_fbe;
u8 func_id;
__le16 msg_addr_low;
__le32 msg_addr_high;
__le32 data;
};
struct ice_sbq_msg_cmpl {
u8 dest_dev;
u8 src_dev;
u8 opcode;
u8 flags;
__le32 data;
};
/* Internal struct */
struct ice_sbq_msg_input {
u8 dest_dev;
u8 opcode;
u16 msg_addr_low;
u32 msg_addr_high;
u32 data;
};
#endif /* _ICE_SBQ_CMD_H_ */

487
sys/dev/ice/ice_sched.c
View file

File diff suppressed because it is too large Load diff

102
sys/dev/ice/ice_sched.h
View file

@ -110,54 +110,54 @@ struct ice_sched_agg_info {
};
/* FW AQ command calls */
enum ice_status
int
ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_cfg_node_attr(struct ice_hw *hw, u16 num_nodes,
struct ice_aqc_node_attr_elem *buf, u16 buf_size,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_nodes,
struct ice_aqc_cfg_l2_node_cgd_elem *buf, u16 buf_size,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
struct ice_aqc_move_elem *buf, u16 buf_size,
u16 *grps_movd, struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
u16 *elems_ret, struct ice_sq_cd *cd);
enum ice_status
int
ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
enum ice_rl_type rl_type, u32 bw);
enum ice_status
int
ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
enum ice_rl_type rl_type, u32 bw, u8 layer_num);
enum ice_status
int
ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
struct ice_sched_node *parent, u8 layer, u16 num_nodes,
u16 *num_nodes_added, u32 *first_node_teid,
struct ice_sched_node **prealloc_node);
enum ice_status
int
ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
u16 num_items, u32 *list);
enum ice_status
int
ice_sched_set_node_priority(struct ice_port_info *pi, struct ice_sched_node *node,
u16 priority);
enum ice_status
int
ice_sched_set_node_weight(struct ice_port_info *pi, struct ice_sched_node *node,
u16 weight);
enum ice_status ice_sched_init_port(struct ice_port_info *pi);
enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw);
int ice_sched_init_port(struct ice_port_info *pi);
int ice_sched_query_res_alloc(struct ice_hw *hw);
void ice_sched_get_psm_clk_freq(struct ice_hw *hw);
/* Functions to cleanup scheduler SW DB */
@ -170,7 +170,7 @@ struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid);
struct ice_sched_node *
ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid);
/* Add a scheduling node into SW DB for given info */
enum ice_status
int
ice_sched_add_node(struct ice_port_info *pi, u8 layer,
struct ice_aqc_txsched_elem_data *info,
struct ice_sched_node *prealloc_node);
@ -182,112 +182,112 @@ struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc);
struct ice_sched_node *
ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
u8 owner);
enum ice_status
int
ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
u8 owner, bool enable);
enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle);
enum ice_status ice_rm_vsi_rdma_cfg(struct ice_port_info *pi, u16 vsi_handle);
int ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle);
int ice_rm_vsi_rdma_cfg(struct ice_port_info *pi, u16 vsi_handle);
struct ice_sched_node *
ice_sched_get_vsi_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
u16 vsi_handle);
bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node);
enum ice_status
int
ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
struct ice_sq_cd *cd);
/* Tx scheduler rate limiter functions */
enum ice_status
int
ice_cfg_agg(struct ice_port_info *pi, u32 agg_id,
enum ice_agg_type agg_type, u8 tc_bitmap);
enum ice_status
int
ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
u8 tc_bitmap);
enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id);
enum ice_status
int ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id);
int
ice_cfg_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
u16 q_handle, enum ice_rl_type rl_type, u32 bw);
enum ice_status
int
ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
u16 q_handle, enum ice_rl_type rl_type);
enum ice_status
int
ice_cfg_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
enum ice_rl_type rl_type, u32 bw);
enum ice_status
int
ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
enum ice_rl_type rl_type);
enum ice_status
int
ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
enum ice_rl_type rl_type, u32 bw);
enum ice_status
int
ice_cfg_vsi_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
enum ice_rl_type rl_type);
enum ice_status
int
ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
enum ice_rl_type rl_type, u32 bw);
enum ice_status
int
ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
enum ice_rl_type rl_type);
enum ice_status
int
ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 min_bw,
u32 max_bw, u32 shared_bw);
enum ice_status
int
ice_cfg_vsi_bw_no_shared_lmt(struct ice_port_info *pi, u16 vsi_handle);
enum ice_status
int
ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 min_bw,
u32 max_bw, u32 shared_bw);
enum ice_status
int
ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id);
enum ice_status
int
ice_cfg_agg_bw_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
u32 min_bw, u32 max_bw, u32 shared_bw);
enum ice_status
int
ice_cfg_agg_bw_no_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id,
u8 tc);
enum ice_status
int
ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
u8 *q_prio);
enum ice_status
int
ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
enum ice_rl_type rl_type, u8 *bw_alloc);
enum ice_status
int
ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
u16 num_vsis, u16 *vsi_handle_arr,
u8 *node_prio, u8 tc);
enum ice_status
int
ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
enum ice_rl_type rl_type, u8 *bw_alloc);
bool
ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
struct ice_sched_node *node);
enum ice_status
int
ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle);
enum ice_status
int
ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
enum ice_agg_type agg_type, u8 tc,
enum ice_rl_type rl_type, u32 bw);
enum ice_status
int
ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
u32 min_bw, u32 max_bw, u32 shared_bw);
enum ice_status
int
ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 min_bw,
u32 max_bw, u32 shared_bw);
enum ice_status
int
ice_sched_set_agg_bw_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id,
u8 tc, u32 min_bw, u32 max_bw,
u32 shared_bw);
enum ice_status
int
ice_sched_cfg_sibl_node_prio(struct ice_port_info *pi,
struct ice_sched_node *node, u8 priority);
enum ice_status
int
ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
enum ice_rl_type rl_type, u8 bw_alloc);
enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes);
int ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes);
void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw);
void ice_sched_replay_agg(struct ice_hw *hw);
enum ice_status ice_sched_replay_tc_node_bw(struct ice_port_info *pi);
enum ice_status ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle);
enum ice_status ice_sched_replay_root_node_bw(struct ice_port_info *pi);
enum ice_status ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx);
int ice_sched_replay_tc_node_bw(struct ice_port_info *pi);
int ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle);
int ice_sched_replay_root_node_bw(struct ice_port_info *pi);
int ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx);
#endif /* _ICE_SCHED_H_ */

4
sys/dev/ice/ice_strings.c
View file

@ -179,13 +179,13 @@ _ice_aq_str(enum ice_aq_err aq_err)
* Otherwise, use the scratch space to format the status code into a number.
*/
struct ice_str_buf
_ice_status_str(enum ice_status status)
_ice_status_str(int status)
{
struct ice_str_buf buf = { .str = "" };
const char *str = NULL;
switch (status) {
case ICE_SUCCESS:
case 0:
str = "OK";
break;
case ICE_ERR_PARAM:

304
sys/dev/ice/ice_switch.c
View file

File diff suppressed because it is too large Load diff

93
sys/dev/ice/ice_switch.h
View file

@ -129,6 +129,7 @@ struct ice_fltr_info {
union {
struct {
u8 mac_addr[ETH_ALEN];
u16 sw_id;
} mac;
struct {
u8 mac_addr[ETH_ALEN];
@ -138,6 +139,7 @@ struct ice_fltr_info {
u16 vlan_id;
u16 tpid;
u8 tpid_valid;
u16 sw_id;
} vlan;
/* Set lkup_type as ICE_SW_LKUP_ETHERTYPE
* if just using ethertype as filter. Set lkup_type as
@ -175,6 +177,7 @@ struct ice_fltr_info {
/* Rule creations populate these indicators basing on the switch type */
u8 lb_en; /* Indicate if packet can be looped back */
u8 lan_en; /* Indicate if packet can be forwarded to the uplink */
u8 fltVeb_en; /* Indicate if VSI is connected to floating VEB */
};
struct ice_adv_lkup_elem {
@ -346,7 +349,7 @@ struct ice_vsi_list_map_info {
struct ice_fltr_list_entry {
struct LIST_ENTRY_TYPE list_entry;
enum ice_status status;
int status;
struct ice_fltr_info fltr_info;
};
@ -430,13 +433,13 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,
u16 *pkt_len,
const struct ice_dummy_pkt_offsets **offsets);
enum ice_status
int
ice_fill_adv_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,
struct ice_sw_rule_lkup_rx_tx *s_rule,
const u8 *dummy_pkt, u16 pkt_len,
const struct ice_dummy_pkt_offsets *offsets);
enum ice_status
int
ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
u16 lkups_cnt, struct ice_adv_rule_info *rinfo, u16 *rid);
@ -445,7 +448,7 @@ ice_find_adv_rule_entry(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
u16 lkups_cnt, u16 recp_id,
struct ice_adv_rule_info *rinfo);
enum ice_status
int
ice_adv_add_update_vsi_list(struct ice_hw *hw,
struct ice_adv_fltr_mgmt_list_entry *m_entry,
struct ice_adv_rule_info *cur_fltr,
@ -456,123 +459,123 @@ ice_find_vsi_list_entry(struct ice_sw_recipe *recp_list, u16 vsi_handle,
u16 *vsi_list_id);
/* VSI related commands */
enum ice_status
int
ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
bool keep_vsi_alloc, struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd);
enum ice_status
int
ice_add_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd);
enum ice_status
int
ice_free_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
bool keep_vsi_alloc, struct ice_sq_cd *cd);
enum ice_status
int
ice_update_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd);
struct ice_vsi_ctx *ice_get_vsi_ctx(struct ice_hw *hw, u16 vsi_handle);
void ice_clear_vsi_q_ctx(struct ice_hw *hw, u16 vsi_handle);
void ice_clear_all_vsi_ctx(struct ice_hw *hw);
enum ice_status
int
ice_aq_get_vsi_params(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi,
u16 count, struct ice_mir_rule_buf *mr_buf,
struct ice_sq_cd *cd, u16 *rule_id);
enum ice_status
int
ice_aq_delete_mir_rule(struct ice_hw *hw, u16 rule_id, bool keep_allocd,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_get_storm_ctrl(struct ice_hw *hw, u32 *bcast_thresh, u32 *mcast_thresh,
u32 *ctl_bitmask);
enum ice_status
int
ice_aq_set_storm_ctrl(struct ice_hw *hw, u32 bcast_thresh, u32 mcast_thresh,
u32 ctl_bitmask);
/* Switch config */
enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw);
enum ice_status
int ice_get_initial_sw_cfg(struct ice_hw *hw);
int
ice_alloc_vlan_res_counter(struct ice_hw *hw, u16 *counter_id);
enum ice_status
int
ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id);
enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw);
enum ice_status ice_alloc_rss_global_lut(struct ice_hw *hw, bool shared_res, u16 *global_lut_id);
enum ice_status ice_free_rss_global_lut(struct ice_hw *hw, u16 global_lut_id);
enum ice_status
int ice_update_sw_rule_bridge_mode(struct ice_hw *hw);
int ice_alloc_rss_global_lut(struct ice_hw *hw, bool shared_res, u16 *global_lut_id);
int ice_free_rss_global_lut(struct ice_hw *hw, u16 global_lut_id);
int
ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
u16 *counter_id);
enum ice_status
int
ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id);
enum ice_status
int
ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries,
struct ice_aqc_get_res_resp_elem *buf, u16 buf_size,
struct ice_sq_cd *cd);
enum ice_status
int
ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
struct ice_aqc_res_elem *buf, u16 buf_size, u16 res_type,
bool res_shared, u16 *desc_id, struct ice_sq_cd *cd);
enum ice_status
int
ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
enum ice_status ice_remove_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list);
int ice_remove_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list);
void ice_rem_all_sw_rules_info(struct ice_hw *hw);
enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status
int ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
int ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
int
ice_add_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list);
enum ice_status
int
ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list);
enum ice_status
int
ice_cfg_iwarp_fltr(struct ice_hw *hw, u16 vsi_handle, bool enable);
enum ice_status
int
ice_add_mac_with_sw_marker(struct ice_hw *hw, struct ice_fltr_info *f_info,
u16 sw_marker);
enum ice_status
int
ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info);
void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle);
/* Promisc/defport setup for VSIs */
enum ice_status
int
ice_cfg_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle, bool set,
u8 direction);
bool ice_check_if_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle,
bool *rule_exists);
enum ice_status
int
ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle,
ice_bitmap_t *promisc_mask, u16 vid);
enum ice_status
int
ice_clear_vsi_promisc(struct ice_hw *hw, u16 vsi_handle,
ice_bitmap_t *promisc_mask, u16 vid);
enum ice_status
int
ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle,
ice_bitmap_t *promisc_mask, bool rm_vlan_promisc);
/* Get VSIs Promisc/defport settings */
enum ice_status
int
ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle,
ice_bitmap_t *promisc_mask, u16 *vid);
enum ice_status
int
ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle,
ice_bitmap_t *promisc_mask, u16 *vid);
enum ice_status ice_replay_all_fltr(struct ice_hw *hw);
int ice_replay_all_fltr(struct ice_hw *hw);
enum ice_status
int
ice_init_def_sw_recp(struct ice_hw *hw, struct ice_sw_recipe **recp_list);
u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle);
bool ice_is_vsi_valid(struct ice_hw *hw, u16 vsi_handle);
enum ice_status
int
ice_replay_vsi_all_fltr(struct ice_hw *hw, struct ice_port_info *pi,
u16 vsi_handle);
void ice_rm_sw_replay_rule_info(struct ice_hw *hw, struct ice_switch_info *sw);
void ice_rm_all_sw_replay_rule_info(struct ice_hw *hw);
enum ice_status
int
ice_aq_sw_rules(struct ice_hw *hw, void *rule_list, u16 rule_list_sz,
u8 num_rules, enum ice_adminq_opc opc, struct ice_sq_cd *cd);
#endif /* _ICE_SWITCH_H_ */

36
sys/dev/ice/ice_type.h
View file

@ -43,6 +43,7 @@
#include "ice_controlq.h"
#include "ice_flex_type.h"
#include "ice_protocol_type.h"
#include "ice_sbq_cmd.h"
#include "ice_vlan_mode.h"
#include "ice_fwlog.h"
@ -224,6 +225,7 @@ enum ice_mac_type {
ICE_MAC_UNKNOWN = 0,
ICE_MAC_VF,
ICE_MAC_E810,
ICE_MAC_E830,
ICE_MAC_GENERIC,
ICE_MAC_GENERIC_3K,
ICE_MAC_GENERIC_3K_E825,
@ -257,7 +259,9 @@ enum ice_media_type {
ICE_PHY_TYPE_LOW_100G_AUI4_AOC_ACC)
#define ICE_MEDIA_C2M_PHY_TYPE_HIGH_M (ICE_PHY_TYPE_HIGH_100G_CAUI2_AOC_ACC | \
ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC)
ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC | \
ICE_PHY_TYPE_HIGH_200G_AUI4_AOC_ACC | \
ICE_PHY_TYPE_HIGH_200G_AUI8_AOC_ACC)
#define ICE_MEDIA_OPT_PHY_TYPE_LOW_M (ICE_PHY_TYPE_LOW_1000BASE_SX | \
ICE_PHY_TYPE_LOW_1000BASE_LX | \
@ -277,6 +281,12 @@ enum ice_media_type {
ICE_PHY_TYPE_LOW_50GBASE_FR | \
ICE_PHY_TYPE_LOW_100GBASE_DR)
#define ICE_MEDIA_OPT_PHY_TYPE_HIGH_M (ICE_PHY_TYPE_HIGH_200G_SR4 | \
ICE_PHY_TYPE_HIGH_200G_LR4 | \
ICE_PHY_TYPE_HIGH_200G_FR4 | \
ICE_PHY_TYPE_HIGH_200G_DR4 | \
ICE_PHY_TYPE_HIGH_400GBASE_FR8)
#define ICE_MEDIA_BP_PHY_TYPE_LOW_M (ICE_PHY_TYPE_LOW_1000BASE_KX | \
ICE_PHY_TYPE_LOW_2500BASE_KX | \
ICE_PHY_TYPE_LOW_5GBASE_KR | \
@ -290,7 +300,8 @@ enum ice_media_type {
ICE_PHY_TYPE_LOW_100GBASE_KR4 | \
ICE_PHY_TYPE_LOW_100GBASE_KR_PAM4)
#define ICE_MEDIA_BP_PHY_TYPE_HIGH_M ICE_PHY_TYPE_HIGH_100GBASE_KR2_PAM4
#define ICE_MEDIA_BP_PHY_TYPE_HIGH_M (ICE_PHY_TYPE_HIGH_100GBASE_KR2_PAM4 | \
ICE_PHY_TYPE_HIGH_200G_KR4_PAM4)
#define ICE_MEDIA_DAC_PHY_TYPE_LOW_M (ICE_PHY_TYPE_LOW_10G_SFI_DA | \
ICE_PHY_TYPE_LOW_25GBASE_CR | \
@ -303,6 +314,8 @@ enum ice_media_type {
ICE_PHY_TYPE_LOW_50GBASE_CP | \
ICE_PHY_TYPE_LOW_100GBASE_CP2)
#define ICE_MEDIA_DAC_PHY_TYPE_HIGH_M ICE_PHY_TYPE_HIGH_200G_CR4_PAM4
#define ICE_MEDIA_C2C_PHY_TYPE_LOW_M (ICE_PHY_TYPE_LOW_100M_SGMII | \
ICE_PHY_TYPE_LOW_1G_SGMII | \
ICE_PHY_TYPE_LOW_2500BASE_X | \
@ -316,7 +329,9 @@ enum ice_media_type {
ICE_PHY_TYPE_LOW_100G_AUI4)
#define ICE_MEDIA_C2C_PHY_TYPE_HIGH_M (ICE_PHY_TYPE_HIGH_100G_CAUI2 | \
ICE_PHY_TYPE_HIGH_100G_AUI2)
ICE_PHY_TYPE_HIGH_100G_AUI2 | \
ICE_PHY_TYPE_HIGH_200G_AUI4 | \
ICE_PHY_TYPE_HIGH_200G_AUI8)
/* Software VSI types. */
enum ice_vsi_type {
@ -504,6 +519,7 @@ struct ice_hw_common_caps {
bool dyn_flattening_en;
/* Support for OROM update in Recovery Mode */
bool orom_recovery_update;
bool next_cluster_id_support;
};
#define ICE_NAC_TOPO_PRIMARY_M BIT(0)
@ -557,7 +573,8 @@ enum ice_pcie_bus_speed {
ice_pcie_speed_2_5GT = 0x14,
ice_pcie_speed_5_0GT = 0x15,
ice_pcie_speed_8_0GT = 0x16,
ice_pcie_speed_16_0GT = 0x17
ice_pcie_speed_16_0GT = 0x17,
ice_pcie_speed_32_0GT = 0x18,
};
/* PCI bus widths */
@ -938,6 +955,7 @@ struct ice_port_info {
u16 sw_id; /* Initial switch ID belongs to port */
u16 pf_vf_num;
u8 port_state;
u8 loopback_mode;
#define ICE_SCHED_PORT_STATE_INIT 0x0
#define ICE_SCHED_PORT_STATE_READY 0x1
u8 lport;
@ -1044,6 +1062,7 @@ enum ice_phy_model {
ICE_PHY_UNSUP = -1,
ICE_PHY_E810 = 1,
ICE_PHY_E822,
ICE_PHY_E830,
};
/* Port hardware description */
@ -1061,6 +1080,7 @@ struct ice_hw {
u64 debug_mask; /* BITMAP for debug mask */
enum ice_mac_type mac_type;
u16 fw_vsi_num;
/* pci info */
u16 device_id;
u16 vendor_id;
@ -1097,6 +1117,7 @@ struct ice_hw {
/* Control Queue info */
struct ice_ctl_q_info adminq;
struct ice_ctl_q_info sbq;
struct ice_ctl_q_info mailboxq;
u8 api_branch; /* API branch version */
u8 api_maj_ver; /* API major version */
@ -1146,7 +1167,6 @@ struct ice_hw {
u32 pkg_seg_id;
u32 pkg_sign_type;
u32 active_track_id;
u8 pkg_has_signing_seg:1;
u8 active_pkg_name[ICE_PKG_NAME_SIZE];
u8 active_pkg_in_nvm;
@ -1180,6 +1200,7 @@ struct ice_hw {
u8 dvm_ena;
bool subscribable_recipes_supported;
bool skip_clear_pf;
};
/* Statistics collected by each port, VSI, VEB, and S-channel */
@ -1456,4 +1477,9 @@ struct ice_aq_get_set_rss_lut_params {
#define ICE_FW_API_AUTO_DROP_MAJ 1
#define ICE_FW_API_AUTO_DROP_MIN 4
static inline bool
ice_is_nac_dual(struct ice_hw *hw)
{
return !!(hw->dev_caps.nac_topo.mode & ICE_NAC_TOPO_DUAL_M);
}
#endif /* _ICE_TYPE_H_ */

22
sys/dev/ice/ice_vlan_mode.c
View file

@ -37,13 +37,13 @@
* @hw: pointer to the HW struct
* @dvm: output variable to determine if DDP supports DVM(true) or SVM(false)
*/
static enum ice_status
static int
ice_pkg_get_supported_vlan_mode(struct ice_hw *hw, bool *dvm)
{
u16 meta_init_size = sizeof(struct ice_meta_init_section);
struct ice_meta_init_section *sect;
struct ice_buf_build *bld;
enum ice_status status;
int status;
/* if anything fails, we assume there is no DVM support */
*dvm = false;
@ -88,7 +88,7 @@ ice_pkg_get_supported_vlan_mode(struct ice_hw *hw, bool *dvm)
*
* Get VLAN Mode Parameters (0x020D)
*/
static enum ice_status
static int
ice_aq_get_vlan_mode(struct ice_hw *hw,
struct ice_aqc_get_vlan_mode *get_params)
{
@ -118,7 +118,7 @@ ice_aq_get_vlan_mode(struct ice_hw *hw,
static bool ice_aq_is_dvm_ena(struct ice_hw *hw)
{
struct ice_aqc_get_vlan_mode get_params = { 0 };
enum ice_status status;
int status;
status = ice_aq_get_vlan_mode(hw, &get_params);
if (status) {
@ -163,7 +163,7 @@ static void ice_cache_vlan_mode(struct ice_hw *hw)
*/
static bool ice_pkg_supports_dvm(struct ice_hw *hw)
{
enum ice_status status;
int status;
bool pkg_supports_dvm;
status = ice_pkg_get_supported_vlan_mode(hw, &pkg_supports_dvm);
@ -183,7 +183,7 @@ static bool ice_pkg_supports_dvm(struct ice_hw *hw)
static bool ice_fw_supports_dvm(struct ice_hw *hw)
{
struct ice_aqc_get_vlan_mode get_vlan_mode = { 0 };
enum ice_status status;
int status;
/* If firmware returns success, then it supports DVM, else it only
* supports SVM
@ -230,7 +230,7 @@ static bool ice_is_dvm_supported(struct ice_hw *hw)
*
* Set VLAN Mode Parameters (0x020C)
*/
static enum ice_status
static int
ice_aq_set_vlan_mode(struct ice_hw *hw,
struct ice_aqc_set_vlan_mode *set_params)
{
@ -265,10 +265,10 @@ ice_aq_set_vlan_mode(struct ice_hw *hw,
* ice_set_svm - set single VLAN mode
* @hw: pointer to the HW structure
*/
static enum ice_status ice_set_svm(struct ice_hw *hw)
static int ice_set_svm(struct ice_hw *hw)
{
struct ice_aqc_set_vlan_mode *set_params;
enum ice_status status;
int status;
status = ice_aq_set_port_params(hw->port_info, 0, false, false, false, NULL);
if (status) {
@ -298,10 +298,10 @@ static enum ice_status ice_set_svm(struct ice_hw *hw)
* ice_set_vlan_mode
* @hw: pointer to the HW structure
*/
enum ice_status ice_set_vlan_mode(struct ice_hw *hw)
int ice_set_vlan_mode(struct ice_hw *hw)
{
if (!ice_is_dvm_supported(hw))
return ICE_SUCCESS;
return 0;
return ice_set_svm(hw);
}

2
sys/dev/ice/ice_vlan_mode.h
View file

@ -37,7 +37,7 @@
struct ice_hw;
bool ice_is_dvm_ena(struct ice_hw *hw);
enum ice_status ice_set_vlan_mode(struct ice_hw *hw);
int ice_set_vlan_mode(struct ice_hw *hw);
void ice_post_pkg_dwnld_vlan_mode_cfg(struct ice_hw *hw);
#endif /* _ICE_VLAN_MODE_H */

59
sys/dev/ice/if_ice_iflib.c
View file

@ -458,7 +458,7 @@ ice_if_attach_pre(if_ctx_t ctx)
{
struct ice_softc *sc = (struct ice_softc *)iflib_get_softc(ctx);
enum ice_fw_modes fw_mode;
enum ice_status status;
int status;
if_softc_ctx_t scctx;
struct ice_hw *hw;
device_t dev;
@ -472,6 +472,7 @@ ice_if_attach_pre(if_ctx_t ctx)
sc->media = iflib_get_media(ctx);
sc->sctx = iflib_get_sctx(ctx);
sc->iflib_ctx_lock = iflib_ctx_lock_get(ctx);
sc->ifp = iflib_get_ifp(ctx);
dev = sc->dev = iflib_get_dev(ctx);
scctx = sc->scctx = iflib_get_softc_ctx(ctx);
@ -538,6 +539,8 @@ reinit_hw:
ice_init_device_features(sc);
ice_print_dual_nac_info(sc);
/* Keep flag set by default */
ice_set_state(&sc->state, ICE_STATE_LINK_ACTIVE_ON_DOWN);
@ -551,7 +554,7 @@ reinit_hw:
* of the hardware
*/
err = ice_load_pkg_file(sc);
if (err == ICE_SUCCESS) {
if (!err) {
ice_deinit_hw(hw);
goto reinit_hw;
}
@ -709,7 +712,7 @@ static void
ice_update_link_status(struct ice_softc *sc, bool update_media)
{
struct ice_hw *hw = &sc->hw;
enum ice_status status;
int status;
/* Never report link up when in recovery mode */
if (ice_test_state(&sc->state, ICE_STATE_RECOVERY_MODE))
@ -757,7 +760,7 @@ ice_if_attach_post(if_ctx_t ctx)
{
struct ice_softc *sc = (struct ice_softc *)iflib_get_softc(ctx);
if_t ifp = iflib_get_ifp(ctx);
enum ice_status status;
int status;
int err;
ASSERT_CTX_LOCKED(sc);
@ -772,8 +775,6 @@ ice_if_attach_post(if_ctx_t ctx)
* handler is called, so wait until attach_post to setup the
* isc_max_frame_size.
*/
sc->ifp = ifp;
sc->scctx->isc_max_frame_size = if_getmtu(ifp) +
ETHER_HDR_LEN + ETHER_CRC_LEN + ETHER_VLAN_ENCAP_LEN;
@ -826,7 +827,7 @@ ice_if_attach_post(if_ctx_t ctx)
* was previously in DSCP PFC mode.
*/
status = ice_aq_set_pfc_mode(&sc->hw, ICE_AQC_PFC_VLAN_BASED_PFC, NULL);
if (status != ICE_SUCCESS)
if (status)
device_printf(sc->dev, "Setting pfc mode failed, status %s\n", ice_status_str(status));
ice_add_device_sysctls(sc);
@ -935,7 +936,7 @@ ice_if_detach(if_ctx_t ctx)
{
struct ice_softc *sc = (struct ice_softc *)iflib_get_softc(ctx);
struct ice_vsi *vsi = &sc->pf_vsi;
enum ice_status status;
int status;
int i;
ASSERT_CTX_LOCKED(sc);
@ -1856,7 +1857,7 @@ ice_if_promisc_set(if_ctx_t ctx, int flags)
struct ice_softc *sc = (struct ice_softc *)iflib_get_softc(ctx);
struct ice_hw *hw = &sc->hw;
device_t dev = sc->dev;
enum ice_status status;
int status;
bool promisc_enable = flags & IFF_PROMISC;
bool multi_enable = flags & IFF_ALLMULTI;
ice_declare_bitmap(promisc_mask, ICE_PROMISC_MAX);
@ -2142,7 +2143,7 @@ ice_poll_for_media_avail(struct ice_softc *sc)
ice_get_link_status(pi, &sc->link_up);
if (pi->phy.link_info.link_info & ICE_AQ_MEDIA_AVAILABLE) {
enum ice_status status;
int status;
/* Re-enable link and re-apply user link settings */
if (ice_test_state(&sc->state, ICE_STATE_LINK_ACTIVE_ON_DOWN) ||
@ -2382,6 +2383,12 @@ ice_if_update_admin_status(if_ctx_t ctx)
if (pending > 0)
reschedule = true;
if (ice_is_generic_mac(&sc->hw)) {
ice_process_ctrlq(sc, ICE_CTL_Q_SB, &pending);
if (pending > 0)
reschedule = true;
}
ice_process_ctrlq(sc, ICE_CTL_Q_MAILBOX, &pending);
if (pending > 0)
reschedule = true;
@ -2560,7 +2567,7 @@ ice_rebuild(struct ice_softc *sc)
struct ice_hw *hw = &sc->hw;
device_t dev = sc->dev;
enum ice_ddp_state pkg_state;
enum ice_status status;
int status;
int err;
sc->rebuild_ticks = ticks;
@ -2722,7 +2729,7 @@ ice_rebuild(struct ice_softc *sc)
goto err_deinit_pf_vsi;
}
log(LOG_INFO, "%s: device rebuild successful\n", sc->ifp->if_xname);
log(LOG_INFO, "%s: device rebuild successful\n", if_name(sc->ifp));
/* In order to completely restore device functionality, the iflib core
* needs to be reset. We need to request an iflib reset. Additionally,
@ -2770,7 +2777,7 @@ static void
ice_handle_reset_event(struct ice_softc *sc)
{
struct ice_hw *hw = &sc->hw;
enum ice_status status;
int status;
device_t dev = sc->dev;
/* When a CORER, GLOBR, or EMPR is about to happen, the hardware will
@ -2825,7 +2832,7 @@ static void
ice_handle_pf_reset_request(struct ice_softc *sc)
{
struct ice_hw *hw = &sc->hw;
enum ice_status status;
int status;
/* Check for PF reset requests */
if (!ice_testandclear_state(&sc->state, ICE_STATE_RESET_PFR_REQ))
@ -2876,7 +2883,21 @@ ice_init_device_features(struct ice_softc *sc)
ice_set_bit(ICE_FEATURE_HAS_PBA, sc->feat_cap);
ice_set_bit(ICE_FEATURE_DCB, sc->feat_cap);
ice_set_bit(ICE_FEATURE_TX_BALANCE, sc->feat_cap);
ice_set_bit(ICE_FEATURE_PHY_STATISTICS, sc->feat_cap);
if (ice_is_e810(hw))
ice_set_bit(ICE_FEATURE_PHY_STATISTICS, sc->feat_en);
/* Set capabilities based on device */
switch (hw->device_id) {
case ICE_DEV_ID_E825C_BACKPLANE:
case ICE_DEV_ID_E825C_QSFP:
case ICE_DEV_ID_E825C_SFP:
ice_set_bit(ICE_FEATURE_DUAL_NAC, sc->feat_cap);
break;
default:
break;
}
/* Disable features due to hardware limitations... */
if (!hw->func_caps.common_cap.rss_table_size)
ice_clear_bit(ICE_FEATURE_RSS, sc->feat_cap);
@ -2911,6 +2932,12 @@ ice_init_device_features(struct ice_softc *sc)
ice_set_bit(ICE_FEATURE_TEMP_SENSOR, sc->feat_cap);
ice_set_bit(ICE_FEATURE_TEMP_SENSOR, sc->feat_en);
}
if (hw->func_caps.common_cap.next_cluster_id_support ||
hw->dev_caps.common_cap.next_cluster_id_support) {
ice_set_bit(ICE_FEATURE_NEXT_CLUSTER_ID, sc->feat_cap);
ice_set_bit(ICE_FEATURE_NEXT_CLUSTER_ID, sc->feat_en);
}
}
/**
@ -2957,7 +2984,7 @@ static void
ice_if_vlan_register(if_ctx_t ctx, u16 vtag)
{
struct ice_softc *sc = (struct ice_softc *)iflib_get_softc(ctx);
enum ice_status status;
int status;
ASSERT_CTX_LOCKED(sc);
@ -2987,7 +3014,7 @@ static void
ice_if_vlan_unregister(if_ctx_t ctx, u16 vtag)
{
struct ice_softc *sc = (struct ice_softc *)iflib_get_softc(ctx);
enum ice_status status;
int status;
ASSERT_CTX_LOCKED(sc);

28
sys/dev/ice/virtchnl.h
View file

@ -2042,6 +2042,34 @@ struct virtchnl_quanta_cfg {
VIRTCHNL_CHECK_STRUCT_LEN(12, virtchnl_quanta_cfg);
/*
* VIRTCHNL_OP_HQOS_READ_TREE
* VIRTCHNL_OP_HQOS_ELEM_ADD
* VIRTCHNL_OP_HQOS_ELEM_DEL
* VIRTCHNL_OP_HQOS_ELEM_BW_SET
* List with tc and queus HW QoS values
*/
struct virtchnl_hqos_cfg {
#define VIRTCHNL_HQOS_ELEM_TYPE_NODE 0
#define VIRTCHNL_HQOS_ELEM_TYPE_LEAF 1
u8 node_type;
u8 pad[7];
u32 teid;
u32 parent_teid;
u64 tx_max;
u64 tx_share;
u32 tx_priority;
u32 tx_weight;
};
VIRTCHNL_CHECK_STRUCT_LEN(40, virtchnl_hqos_cfg);
struct virtchnl_hqos_cfg_list {
u16 num_elem;
u8 pad[6];
struct virtchnl_hqos_cfg cfg[1];
};
VIRTCHNL_CHECK_STRUCT_LEN(48, virtchnl_hqos_cfg_list);
/* Since VF messages are limited by u16 size, precalculate the maximum possible
* values of nested elements in virtchnl structures that virtual channel can
* possibly handle in a single message.