mirror of
https://github.com/opnsense/src.git
synced 2026-05-28 04:12:45 -04:00
Move IPI related parts back to (ARM) machine specific file now, when
the interrupt framework is also going to be used by another (MIPS) architecture. IPI implementations may vary much across different architectures. An IPI implementation should still define INTR_IPI_COUNT and use intr_ipi_setup_counters() to setup IPI counters which are inside of intrcnt[] and intrnames[] arrays. Those are used for sysctl and ddb. Then, intr_ipi_increment_count() should be used to increment obtained counter. Reviewed by: imp Differential Revision: https://reviews.freebsd.org/D5459
This commit is contained in:
Svatopluk Kraus
parent
c47476d7e6
commit
5b70c08cdf
4 changed files with 169 additions and 180 deletions
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@ -52,11 +52,22 @@ __FBSDID("$FreeBSD$");
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#include <sys/conf.h>
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#include <sys/pmc.h>
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#include <sys/pmckern.h>
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#include <sys/smp.h>
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#include <machine/atomic.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <machine/cpu.h>
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#include <machine/smp.h>
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#ifdef ARM_INTRNG
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#include "pic_if.h"
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#ifdef SMP
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static struct intr_irqsrc ipi_sources[INTR_IPI_COUNT];
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static u_int ipi_next_num;
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#endif
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#endif
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/*
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* arm_irq_memory_barrier()
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@ -121,3 +132,127 @@ arm_irq_memory_barrier(uintptr_t irq)
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cpu_l2cache_drain_writebuf();
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}
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#ifdef ARM_INTRNG
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#ifdef SMP
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/*
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* Lookup IPI source.
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*/
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static struct intr_irqsrc *
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intr_ipi_lookup(u_int ipi)
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{
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if (ipi >= INTR_IPI_COUNT)
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panic("%s: no such IPI %u", __func__, ipi);
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return (&ipi_sources[ipi]);
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}
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/*
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* interrupt controller dispatch function for IPIs. It should
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* be called straight from the interrupt controller, when associated
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* interrupt source is learned. Or from anybody who has an interrupt
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* source mapped.
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*/
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void
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intr_ipi_dispatch(struct intr_irqsrc *isrc, struct trapframe *tf)
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{
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void *arg;
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KASSERT(isrc != NULL, ("%s: no source", __func__));
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intr_ipi_increment_count(isrc->isrc_count, PCPU_GET(cpuid));
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/*
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* Supply ipi filter with trapframe argument
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* if none is registered.
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*/
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arg = isrc->isrc_arg != NULL ? isrc->isrc_arg : tf;
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isrc->isrc_ipifilter(arg);
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}
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/*
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* Map IPI into interrupt controller.
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*
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* Not SMP coherent.
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*/
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static int
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ipi_map(struct intr_irqsrc *isrc, u_int ipi)
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{
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boolean_t is_percpu;
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int error;
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if (ipi >= INTR_IPI_COUNT)
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panic("%s: no such IPI %u", __func__, ipi);
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KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
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isrc->isrc_type = INTR_ISRCT_NAMESPACE;
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isrc->isrc_nspc_type = INTR_IRQ_NSPC_IPI;
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isrc->isrc_nspc_num = ipi_next_num;
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error = PIC_REGISTER(intr_irq_root_dev, isrc, &is_percpu);
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if (error == 0) {
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isrc->isrc_dev = intr_irq_root_dev;
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ipi_next_num++;
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}
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return (error);
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}
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/*
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* Setup IPI handler to interrupt source.
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*
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* Note that there could be more ways how to send and receive IPIs
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* on a platform like fast interrupts for example. In that case,
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* one can call this function with ASIF_NOALLOC flag set and then
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* call intr_ipi_dispatch() when appropriate.
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*
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* Not SMP coherent.
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*/
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int
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intr_ipi_set_handler(u_int ipi, const char *name, intr_ipi_filter_t *filter,
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void *arg, u_int flags)
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{
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struct intr_irqsrc *isrc;
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int error;
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if (filter == NULL)
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return(EINVAL);
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isrc = intr_ipi_lookup(ipi);
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if (isrc->isrc_ipifilter != NULL)
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return (EEXIST);
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if ((flags & AISHF_NOALLOC) == 0) {
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error = ipi_map(isrc, ipi);
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if (error != 0)
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return (error);
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}
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isrc->isrc_ipifilter = filter;
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isrc->isrc_arg = arg;
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isrc->isrc_handlers = 1;
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isrc->isrc_count = intr_ipi_setup_counters(name);
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isrc->isrc_index = 0; /* it should not be used in IPI case */
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if (isrc->isrc_dev != NULL) {
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PIC_ENABLE_INTR(isrc->isrc_dev, isrc);
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PIC_ENABLE_SOURCE(isrc->isrc_dev, isrc);
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}
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return (0);
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}
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/*
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* Send IPI thru interrupt controller.
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*/
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void
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pic_ipi_send(cpuset_t cpus, u_int ipi)
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{
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struct intr_irqsrc *isrc;
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isrc = intr_ipi_lookup(ipi);
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KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
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PIC_IPI_SEND(intr_irq_root_dev, isrc, cpus);
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}
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#endif
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#endif
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@ -51,6 +51,15 @@
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#include <sys/intr.h>
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#ifdef SMP
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void intr_ipi_dispatch(struct intr_irqsrc *isrc, struct trapframe *tf);
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#define AISHF_NOALLOC 0x0001
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int intr_ipi_set_handler(u_int ipi, const char *name, intr_ipi_filter_t *filter,
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void *arg, u_int flags);
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#endif
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#else /* ARM_INTRNG */
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/* XXX move to std.* files? */
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@ -89,7 +89,7 @@ void intr_irq_handler(struct trapframe *tf);
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/* Root interrupt controller stuff. */
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static struct intr_irqsrc *irq_root_isrc;
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static device_t irq_root_dev;
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device_t intr_irq_root_dev;
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static intr_irq_filter_t *irq_root_filter;
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static void *irq_root_arg;
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static u_int irq_root_ipicount;
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@ -115,9 +115,6 @@ u_int irq_next_free;
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#ifdef SMP
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static boolean_t irq_assign_cpu = FALSE;
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static struct intr_irqsrc ipi_sources[INTR_IPI_COUNT];
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static u_int ipi_next_num;
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#endif
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/*
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@ -238,37 +235,21 @@ isrc_setup_counters(struct intr_irqsrc *isrc)
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}
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#ifdef SMP
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/*
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* Virtualization for interrupt source IPI counter increment.
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*/
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static inline void
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isrc_increment_ipi_count(struct intr_irqsrc *isrc, u_int cpu)
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{
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isrc->isrc_count[cpu]++;
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}
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/*
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* Virtualization for interrupt source IPI counters setup.
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*/
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static void
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isrc_setup_ipi_counters(struct intr_irqsrc *isrc, const char *name)
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u_long *
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intr_ipi_setup_counters(const char *name)
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{
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u_int index, i;
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char str[INTRNAME_LEN];
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index = atomic_fetchadd_int(&intrcnt_index, MAXCPU);
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isrc->isrc_index = index;
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isrc->isrc_count = &intrcnt[index];
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for (i = 0; i < MAXCPU; i++) {
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/*
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* We do not expect any race in IPI case here,
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* so locking is not needed.
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*/
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snprintf(str, INTRNAME_LEN, "cpu%d:%s", i, name);
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intrcnt_setname(str, index + i);
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}
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return (&intrcnt[index]);
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}
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#endif
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@ -679,7 +660,7 @@ intr_isrc_assign_cpu(void *arg, int cpu)
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struct intr_irqsrc *isrc = arg;
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int error;
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if (isrc->isrc_dev != irq_root_dev)
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if (isrc->isrc_dev != intr_irq_root_dev)
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return (EINVAL);
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mtx_lock(&isrc_table_lock);
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@ -926,7 +907,7 @@ intr_pic_claim_root(device_t dev, intptr_t xref, intr_irq_filter_t *filter,
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* Note that we further suppose that there is not threaded interrupt
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* routine (handler) on the root. See intr_irq_handler().
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*/
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if (irq_root_dev != NULL) {
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if (intr_irq_root_dev != NULL) {
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device_printf(dev, "another root already set\n");
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return (EBUSY);
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}
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@ -949,7 +930,7 @@ intr_pic_claim_root(device_t dev, intptr_t xref, intr_irq_filter_t *filter,
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device_printf(dev, "failed to install root pic handler\n");
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return (error);
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}
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irq_root_dev = dev;
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intr_irq_root_dev = dev;
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irq_root_filter = filter;
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irq_root_arg = arg;
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irq_root_ipicount = ipicount;
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@ -1210,132 +1191,6 @@ dosoftints(void)
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}
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#ifdef SMP
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/*
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* Lookup IPI source.
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*/
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static struct intr_irqsrc *
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intr_ipi_lookup(u_int ipi)
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{
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if (ipi >= INTR_IPI_COUNT)
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panic("%s: no such IPI %u", __func__, ipi);
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return (&ipi_sources[ipi]);
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}
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/*
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* interrupt controller dispatch function for IPIs. It should
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* be called straight from the interrupt controller, when associated
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* interrupt source is learned. Or from anybody who has an interrupt
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* source mapped.
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*/
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void
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intr_ipi_dispatch(struct intr_irqsrc *isrc, struct trapframe *tf)
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{
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void *arg;
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KASSERT(isrc != NULL, ("%s: no source", __func__));
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isrc_increment_ipi_count(isrc, PCPU_GET(cpuid));
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/*
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* Supply ipi filter with trapframe argument
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* if none is registered.
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*/
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arg = isrc->isrc_arg != NULL ? isrc->isrc_arg : tf;
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isrc->isrc_ipifilter(arg);
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}
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/*
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* Map IPI into interrupt controller.
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*
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* Not SMP coherent.
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*/
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static int
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ipi_map(struct intr_irqsrc *isrc, u_int ipi)
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{
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boolean_t is_percpu;
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int error;
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if (ipi >= INTR_IPI_COUNT)
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panic("%s: no such IPI %u", __func__, ipi);
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KASSERT(irq_root_dev != NULL, ("%s: no root attached", __func__));
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isrc->isrc_type = INTR_ISRCT_NAMESPACE;
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isrc->isrc_nspc_type = INTR_IRQ_NSPC_IPI;
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isrc->isrc_nspc_num = ipi_next_num;
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error = PIC_REGISTER(irq_root_dev, isrc, &is_percpu);
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debugf("ipi %u mapped to %u on %s - error %d\n", ipi, ipi_next_num,
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device_get_nameunit(irq_root_dev), error);
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if (error == 0) {
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isrc->isrc_dev = irq_root_dev;
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ipi_next_num++;
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}
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return (error);
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}
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/*
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* Setup IPI handler to interrupt source.
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*
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* Note that there could be more ways how to send and receive IPIs
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* on a platform like fast interrupts for example. In that case,
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* one can call this function with ASIF_NOALLOC flag set and then
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* call intr_ipi_dispatch() when appropriate.
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*
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* Not SMP coherent.
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*/
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int
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intr_ipi_set_handler(u_int ipi, const char *name, intr_ipi_filter_t *filter,
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void *arg, u_int flags)
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{
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struct intr_irqsrc *isrc;
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int error;
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if (filter == NULL)
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return(EINVAL);
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isrc = intr_ipi_lookup(ipi);
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if (isrc->isrc_ipifilter != NULL)
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return (EEXIST);
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if ((flags & AISHF_NOALLOC) == 0) {
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error = ipi_map(isrc, ipi);
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if (error != 0)
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return (error);
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}
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isrc->isrc_ipifilter = filter;
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isrc->isrc_arg = arg;
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isrc->isrc_handlers = 1;
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isrc_setup_ipi_counters(isrc, name);
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if (isrc->isrc_dev != NULL) {
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mtx_lock(&isrc_table_lock);
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PIC_ENABLE_INTR(isrc->isrc_dev, isrc);
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PIC_ENABLE_SOURCE(isrc->isrc_dev, isrc);
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mtx_unlock(&isrc_table_lock);
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}
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return (0);
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}
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/*
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* Send IPI thru interrupt controller.
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*/
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void
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pic_ipi_send(cpuset_t cpus, u_int ipi)
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{
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struct intr_irqsrc *isrc;
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isrc = intr_ipi_lookup(ipi);
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KASSERT(irq_root_dev != NULL, ("%s: no root attached", __func__));
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PIC_IPI_SEND(irq_root_dev, isrc, cpus);
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}
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/*
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* Init interrupt controller on another CPU.
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*/
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@ -1346,10 +1201,10 @@ intr_pic_init_secondary(void)
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/*
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* QQQ: Only root PIC is aware of other CPUs ???
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*/
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KASSERT(irq_root_dev != NULL, ("%s: no root attached", __func__));
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KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
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//mtx_lock(&isrc_table_lock);
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PIC_INIT_SECONDARY(irq_root_dev);
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PIC_INIT_SECONDARY(intr_irq_root_dev);
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//mtx_unlock(&isrc_table_lock);
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}
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#endif
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@ -1360,25 +1215,6 @@ DB_SHOW_COMMAND(irqs, db_show_irqs)
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u_int i, irqsum;
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struct intr_irqsrc *isrc;
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#ifdef SMP
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for (i = 0; i <= mp_maxid; i++) {
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struct pcpu *pc;
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u_int ipi, ipisum;
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pc = pcpu_find(i);
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if (pc != NULL) {
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for (ipisum = 0, ipi = 0; ipi < INTR_IPI_COUNT; ipi++) {
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isrc = intr_ipi_lookup(ipi);
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if (isrc->isrc_count != NULL)
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ipisum += isrc->isrc_count[i];
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}
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printf ("cpu%u: total %u ipis %u\n", i,
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pc->pc_cnt.v_intr, ipisum);
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}
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}
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db_printf("\n");
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#endif
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for (irqsum = 0, i = 0; i < NIRQ; i++) {
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isrc = irq_sources[i];
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if (isrc == NULL)
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@ -39,6 +39,8 @@
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#ifndef _SYS_INTR_H_
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#define _SYS_INTR_H_
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#include <sys/systm.h>
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#ifdef notyet
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#define INTR_SOLO INTR_MD1
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typedef int intr_irq_filter_t(void *arg, struct trapframe *tf);
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@ -101,6 +103,8 @@ u_int intr_namespace_map_irq(device_t dev, uint16_t type, uint16_t num);
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u_int intr_fdt_map_irq(phandle_t, pcell_t *, u_int);
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#endif
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extern device_t intr_irq_root_dev;
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int intr_pic_register(device_t dev, intptr_t xref);
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int intr_pic_unregister(device_t dev, intptr_t xref);
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int intr_pic_claim_root(device_t dev, intptr_t xref, intr_irq_filter_t *filter,
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@ -117,14 +121,19 @@ u_int intr_irq_next_cpu(u_int current_cpu, cpuset_t *cpumask);
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#ifdef SMP
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int intr_irq_bind(u_int, int);
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void intr_ipi_dispatch(struct intr_irqsrc *isrc, struct trapframe *tf);
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#define AISHF_NOALLOC 0x0001
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int intr_ipi_set_handler(u_int ipi, const char *name, intr_ipi_filter_t *filter,
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void *arg, u_int flags);
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void intr_pic_init_secondary(void);
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/* Virtualization for interrupt source IPI counter increment. */
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static inline void
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intr_ipi_increment_count(u_long *counter, u_int cpu)
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{
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KASSERT(cpu < MAXCPU, ("%s: too big cpu %u", __func__, cpu));
|
||||
counter[cpu]++;
|
||||
}
|
||||
|
||||
/* Virtualization for interrupt source IPI counters setup. */
|
||||
u_long * intr_ipi_setup_counters(const char *name);
|
||||
|
||||
#endif
|
||||
#endif /* _SYS_INTR_H */
|
||||
|
|
|
|||
Loading…
Reference in a new issue