mirror of
https://github.com/opnsense/src.git
synced 2026-06-08 16:22:46 -04:00
parent
964d0fd624
commit
58308fadec
359 changed files with 2658 additions and 458 deletions
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@ -1,3 +1,19 @@
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----------------------------------------
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4 April 2025. Summary of changes for version 20250404:
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Major changes:
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Update all the copyright continuation year to 2025 in the license header of all files
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Add complete support for 3 new ACPI tables ? MRRM,ERDT and RIMT (Tony Luck & V L Sunil)
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Add a license file to the project which is a great improvement (Dionna Glaze)
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Update DMAR and TPM2 tables to support their latest versions (Alexey Neyman and Stuart Yoder)
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A few fixes including local cache allocation, FFixedHW Region, attribute packing, string vs. non-string char array, vsnprintf()etc. along with some comments, spelling errors and code alignment (multiple awesome contributors)
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----------------------------------------
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12 December 2024. Summary of changes for version 20241212:
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||||
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|||
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@ -8,7 +8,7 @@
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*
|
||||
* 1. Copyright Notice
|
||||
*
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||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
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||||
|
|
@ -458,7 +458,7 @@ AdDisassembleOneTable (
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*/
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if (AcpiGbl_CaptureComments)
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{
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strncpy (Table->Signature, AcpiGbl_TableSig, ACPI_NAMESEG_SIZE);
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memcpy (Table->Signature, AcpiGbl_TableSig, ACPI_NAMESEG_SIZE);
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}
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#endif
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|
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|
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@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
@ -219,6 +219,7 @@ const AH_TABLE AcpiGbl_SupportedTables[] =
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{ACPI_SIG_DSDT, "Differentiated System Description Table (AML table)"},
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{ACPI_SIG_ECDT, "Embedded Controller Boot Resources Table"},
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{ACPI_SIG_EINJ, "Error Injection Table"},
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{ACPI_SIG_ERDT, "Enhanced Resource Director Technology Table"},
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{ACPI_SIG_ERST, "Error Record Serialization Table"},
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{ACPI_SIG_FACS, "Firmware ACPI Control Structure"},
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{ACPI_SIG_FADT, "Fixed ACPI Description Table (FADT)"},
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@ -235,6 +236,7 @@ const AH_TABLE AcpiGbl_SupportedTables[] =
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{ACPI_SIG_MCHI, "Management Controller Host Interface Table"},
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{ACPI_SIG_MPAM, "Memory System Resource Partitioning and Monitoring Table"},
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{ACPI_SIG_MPST, "Memory Power State Table"},
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{ACPI_SIG_MRRM, "Memory Range and Region Mapping Table"},
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{ACPI_SIG_MSCT, "Maximum System Characteristics Table"},
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{ACPI_SIG_MSDM, "Microsoft Data Management Table"},
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{ACPI_SIG_NFIT, "NVDIMM Firmware Interface Table"},
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|
|
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|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
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||||
|
|
@ -894,7 +894,7 @@ static void
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AcpiDmUpdateResourceName (
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ACPI_NAMESPACE_NODE *ResourceNode)
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{
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char Name[ACPI_NAMESEG_SIZE];
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char Name[ACPI_NAMESEG_SIZE] ACPI_NONSTRING;
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/* Ignore if a unique name has already been assigned */
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|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
@ -272,6 +272,7 @@ static const char *AcpiDmDmarSubnames[] =
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"Remapping Hardware Static Affinity",
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"ACPI Namespace Device Declaration",
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"SoC Integrated Address Translation Cache",
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"SoC Integrated Device Property",
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"Unknown Subtable Type" /* Reserved */
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};
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@ -312,6 +313,22 @@ static const char *AcpiDmEinjInstructions[] =
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"Unknown Instruction"
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};
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static const char *AcpiDmErdtSubnames[] =
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{
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"RMDD",
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"CACD",
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"DACD",
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"CMRC",
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"MMRC",
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"MARC",
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"CARC",
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"CMRD",
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"IBRD",
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"IBAD",
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"CARD",
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"RESERVED"
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};
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static const char *AcpiDmErstActions[] =
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{
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"Begin Write Operation",
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@ -660,6 +677,7 @@ const ACPI_DMTABLE_DATA AcpiDmTableData[] =
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{ACPI_SIG_DRTM, NULL, AcpiDmDumpDrtm, DtCompileDrtm, TemplateDrtm},
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{ACPI_SIG_ECDT, AcpiDmTableInfoEcdt, NULL, NULL, TemplateEcdt},
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{ACPI_SIG_EINJ, NULL, AcpiDmDumpEinj, DtCompileEinj, TemplateEinj},
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{ACPI_SIG_ERDT, NULL, AcpiDmDumpErdt, DtCompileErdt, TemplateErdt},
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{ACPI_SIG_ERST, NULL, AcpiDmDumpErst, DtCompileErst, TemplateErst},
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{ACPI_SIG_FADT, NULL, AcpiDmDumpFadt, DtCompileFadt, TemplateFadt},
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{ACPI_SIG_FPDT, NULL, AcpiDmDumpFpdt, DtCompileFpdt, TemplateFpdt},
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@ -675,6 +693,7 @@ const ACPI_DMTABLE_DATA AcpiDmTableData[] =
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{ACPI_SIG_MCHI, AcpiDmTableInfoMchi, NULL, NULL, TemplateMchi},
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{ACPI_SIG_MPAM, NULL, AcpiDmDumpMpam, DtCompileMpam, TemplateMpam},
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{ACPI_SIG_MPST, AcpiDmTableInfoMpst, AcpiDmDumpMpst, DtCompileMpst, TemplateMpst},
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{ACPI_SIG_MRRM, NULL, AcpiDmDumpMrrm, DtCompileMrrm, TemplateMrrm},
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{ACPI_SIG_MSCT, NULL, AcpiDmDumpMsct, DtCompileMsct, TemplateMsct},
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{ACPI_SIG_MSDM, NULL, AcpiDmDumpSlic, DtCompileSlic, TemplateMsdm},
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{ACPI_SIG_NFIT, AcpiDmTableInfoNfit, AcpiDmDumpNfit, DtCompileNfit, TemplateNfit},
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@ -689,6 +708,7 @@ const ACPI_DMTABLE_DATA AcpiDmTableData[] =
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{ACPI_SIG_RAS2, AcpiDmTableInfoRas2, AcpiDmDumpRas2, DtCompileRas2, TemplateRas2},
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{ACPI_SIG_RGRT, NULL, AcpiDmDumpRgrt, DtCompileRgrt, TemplateRgrt},
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{ACPI_SIG_RHCT, NULL, AcpiDmDumpRhct, DtCompileRhct, TemplateRhct},
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{ACPI_SIG_RIMT, NULL, AcpiDmDumpRimt, DtCompileRimt, TemplateRimt},
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{ACPI_SIG_RSDT, NULL, AcpiDmDumpRsdt, DtCompileRsdt, TemplateRsdt},
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{ACPI_SIG_S3PT, NULL, NULL, NULL, TemplateS3pt},
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{ACPI_SIG_SBST, AcpiDmTableInfoSbst, NULL, NULL, TemplateSbst},
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@ -1132,6 +1152,7 @@ AcpiDmDumpTable (
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case ACPI_DMT_ASPT:
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case ACPI_DMT_UINT16:
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case ACPI_DMT_DMAR:
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case ACPI_DMT_ERDT:
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case ACPI_DMT_HEST:
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case ACPI_DMT_HMAT:
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case ACPI_DMT_NFIT:
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@ -1185,6 +1206,11 @@ AcpiDmDumpTable (
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ByteLength = 10;
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break;
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case ACPI_DMT_BUF11:
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ByteLength = 11;
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break;
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case ACPI_DMT_BUF12:
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ByteLength = 12;
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@ -1201,6 +1227,16 @@ AcpiDmDumpTable (
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ByteLength = 18;
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break;
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case ACPI_DMT_BUF24:
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ByteLength = 24;
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break;
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case ACPI_DMT_BUF26:
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ByteLength = 26;
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break;
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case ACPI_DMT_BUF32:
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ByteLength = 32;
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@ -1419,9 +1455,12 @@ AcpiDmDumpTable (
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case ACPI_DMT_BUF7:
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case ACPI_DMT_BUF10:
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case ACPI_DMT_BUF11:
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case ACPI_DMT_BUF12:
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case ACPI_DMT_BUF16:
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case ACPI_DMT_BUF18:
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case ACPI_DMT_BUF24:
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case ACPI_DMT_BUF26:
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case ACPI_DMT_BUF32:
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case ACPI_DMT_BUF112:
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case ACPI_DMT_BUF128:
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@ -1767,6 +1806,20 @@ AcpiDmDumpTable (
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AcpiDmErstActions[Temp8]);
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break;
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case ACPI_DMT_ERDT:
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/* ERDT subtable types */
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Temp16 = *Target;
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if (Temp16 > ACPI_ERDT_TYPE_RESERVED)
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{
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Temp16 = ACPI_ERDT_TYPE_RESERVED;
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}
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AcpiOsPrintf (UINT8_FORMAT, *Target,
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AcpiDmErdtSubnames[Temp16]);
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break;
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case ACPI_DMT_ERSTINST:
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/* ERST Instruction types */
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@ -8,7 +8,7 @@
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*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
@ -1480,6 +1480,12 @@ AcpiDmDumpDmar (
|
|||
ScopeOffset = sizeof (ACPI_DMAR_SATC);
|
||||
break;
|
||||
|
||||
case ACPI_DMAR_TYPE_SIDP:
|
||||
|
||||
InfoTable = AcpiDmTableInfoDmar6;
|
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ScopeOffset = sizeof (ACPI_DMAR_SIDP);
|
||||
break;
|
||||
|
||||
default:
|
||||
|
||||
AcpiOsPrintf ("\n**** Unknown DMAR subtable type 0x%X\n\n",
|
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|
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@ -1717,6 +1723,233 @@ AcpiDmDumpEinj (
|
|||
}
|
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|
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|
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/*******************************************************************************
|
||||
*
|
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* FUNCTION: AcpiDmDumpErdt
|
||||
*
|
||||
* PARAMETERS: Table - A ERDT table
|
||||
*
|
||||
* RETURN: None
|
||||
*
|
||||
* DESCRIPTION: Format the contents of a ERDT. This table type consists
|
||||
* of an open-ended number of subtables.
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
void
|
||||
AcpiDmDumpErdt (
|
||||
ACPI_TABLE_HEADER *Table)
|
||||
{
|
||||
ACPI_STATUS Status;
|
||||
ACPI_SUBTBL_HDR_16 *Subtable, *Subsubtable;
|
||||
ACPI_ERDT_DACD_PATHS *ScopeTable;
|
||||
UINT32 Offset = sizeof (ACPI_TABLE_ERDT);
|
||||
UINT32 Suboffset;
|
||||
UINT32 ScopeOffset;
|
||||
UINT32 SubsubtableLength = 0;
|
||||
ACPI_DMTABLE_INFO *InfoTable, *TrailEntries, *DacdEntries;
|
||||
UINT32 NumTrailers = 0;
|
||||
|
||||
/* Main table */
|
||||
|
||||
Status = AcpiDmDumpTable (Table->Length, 0, Table, 0, AcpiDmTableInfoErdt);
|
||||
if (ACPI_FAILURE (Status))
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
/* Subtables */
|
||||
Subtable = ACPI_ADD_PTR (ACPI_SUBTBL_HDR_16, Table, Offset);
|
||||
while (Offset < Table->Length)
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{
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||||
|
||||
/* Dump common header */
|
||||
|
||||
AcpiOsPrintf ("\n");
|
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Status = AcpiDmDumpTable (Table->Length, Offset, Subtable,
|
||||
Subtable->Length, AcpiDmTableInfoErdtHdr);
|
||||
if (ACPI_FAILURE (Status))
|
||||
{
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||||
return;
|
||||
}
|
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|
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AcpiOsPrintf ("\n");
|
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Status = AcpiDmDumpTable (Table->Length, Offset, Subtable,
|
||||
Subtable->Length, AcpiDmTableInfoErdtRmdd);
|
||||
if (ACPI_FAILURE (Status))
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
/* Subtables of this RMDD table */
|
||||
|
||||
Suboffset = Offset + sizeof(ACPI_ERDT_RMDD);
|
||||
Subsubtable = ACPI_ADD_PTR (ACPI_SUBTBL_HDR_16, Table, Suboffset);
|
||||
while (Suboffset < Offset + Subtable->Length)
|
||||
{
|
||||
AcpiOsPrintf ("\n");
|
||||
|
||||
TrailEntries = NULL;
|
||||
DacdEntries = NULL;
|
||||
switch (Subsubtable->Type)
|
||||
{
|
||||
case ACPI_ERDT_TYPE_CACD:
|
||||
InfoTable = AcpiDmTableInfoErdtCacd;
|
||||
TrailEntries = AcpiDmTableInfoErdtCacdX2apic;
|
||||
SubsubtableLength = sizeof(ACPI_ERDT_CACD);
|
||||
break;
|
||||
|
||||
case ACPI_ERDT_TYPE_DACD:
|
||||
InfoTable = AcpiDmTableInfoErdtDacd;
|
||||
DacdEntries = AcpiDmTableInfoErdtDacdScope;
|
||||
SubsubtableLength = sizeof(ACPI_ERDT_DACD);
|
||||
break;
|
||||
|
||||
case ACPI_ERDT_TYPE_CMRC:
|
||||
InfoTable = AcpiDmTableInfoErdtCmrc;
|
||||
break;
|
||||
|
||||
case ACPI_ERDT_TYPE_MMRC:
|
||||
InfoTable = AcpiDmTableInfoErdtMmrc;
|
||||
TrailEntries = AcpiDmTableInfoErdtMmrcCorrFactor;
|
||||
SubsubtableLength = sizeof(ACPI_ERDT_MMRC);
|
||||
break;
|
||||
|
||||
case ACPI_ERDT_TYPE_MARC:
|
||||
InfoTable = AcpiDmTableInfoErdtMarc;
|
||||
break;
|
||||
|
||||
case ACPI_ERDT_TYPE_CARC:
|
||||
InfoTable = AcpiDmTableInfoErdtCarc;
|
||||
break;
|
||||
|
||||
case ACPI_ERDT_TYPE_CMRD:
|
||||
InfoTable = AcpiDmTableInfoErdtCmrd;
|
||||
break;
|
||||
|
||||
case ACPI_ERDT_TYPE_IBRD:
|
||||
InfoTable = AcpiDmTableInfoErdtIbrd;
|
||||
TrailEntries = AcpiDmTableInfoErdtIbrdCorrFactor;
|
||||
SubsubtableLength = sizeof(ACPI_ERDT_IBRD);
|
||||
break;
|
||||
|
||||
case ACPI_ERDT_TYPE_IBAD:
|
||||
InfoTable = AcpiDmTableInfoErdtIbad;
|
||||
break;
|
||||
|
||||
case ACPI_ERDT_TYPE_CARD:
|
||||
InfoTable = AcpiDmTableInfoErdtCard;
|
||||
break;
|
||||
|
||||
default:
|
||||
AcpiOsPrintf ("\n**** Unknown RMDD subtable type 0x%X\n",
|
||||
Subsubtable->Type);
|
||||
|
||||
/* Attempt to continue */
|
||||
|
||||
if (!Subsubtable->Length)
|
||||
{
|
||||
AcpiOsPrintf ("Invalid zero length subtable\n");
|
||||
return;
|
||||
}
|
||||
goto NextSubsubtable;
|
||||
}
|
||||
|
||||
/* Dump subtable header */
|
||||
|
||||
Status = AcpiDmDumpTable (Table->Length, Suboffset, Subsubtable,
|
||||
Subsubtable->Length, AcpiDmTableInfoErdtHdr);
|
||||
if (ACPI_FAILURE (Status))
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
/* Dump subtable body */
|
||||
|
||||
Status = AcpiDmDumpTable (Table->Length, Suboffset, Subsubtable,
|
||||
Subsubtable->Length, InfoTable);
|
||||
if (ACPI_FAILURE (Status))
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
/* CACD, MMRC, and IBRD subtables have simple flex array at end */
|
||||
|
||||
if (TrailEntries)
|
||||
{
|
||||
NumTrailers = 0;
|
||||
while (NumTrailers < Subsubtable->Length - SubsubtableLength)
|
||||
{
|
||||
|
||||
/* Dump one flex array element */
|
||||
|
||||
Status = AcpiDmDumpTable (Table->Length, Suboffset +
|
||||
SubsubtableLength + NumTrailers,
|
||||
ACPI_ADD_PTR (ACPI_SUBTBL_HDR_16, Subsubtable,
|
||||
SubsubtableLength + NumTrailers),
|
||||
sizeof(UINT32), TrailEntries);
|
||||
if (ACPI_FAILURE (Status))
|
||||
{
|
||||
return;
|
||||
}
|
||||
NumTrailers += sizeof(UINT32);
|
||||
}
|
||||
}
|
||||
|
||||
/* DACD subtable has flex array of device agent structures */
|
||||
|
||||
if (DacdEntries) {
|
||||
ScopeOffset = Suboffset + SubsubtableLength;
|
||||
ScopeTable = ACPI_ADD_PTR (ACPI_ERDT_DACD_PATHS,
|
||||
Subsubtable, SubsubtableLength);
|
||||
while (ScopeOffset < Suboffset + Subsubtable->Length)
|
||||
{
|
||||
/* Dump one device agent structure */
|
||||
|
||||
AcpiOsPrintf ("\n");
|
||||
Status = AcpiDmDumpTable (Table->Length, ScopeOffset,
|
||||
ScopeTable, ScopeTable->Header.Length, DacdEntries);
|
||||
if (ACPI_FAILURE (Status))
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
/* Flex array of UINT8 for device path */
|
||||
|
||||
NumTrailers = 0;
|
||||
while (NumTrailers < ScopeTable->Header.Length - sizeof(ACPI_ERDT_DACD_PATHS))
|
||||
{
|
||||
/* Dump one UINT8 of the device path */
|
||||
|
||||
Status = AcpiDmDumpTable (Table->Length, ScopeOffset +
|
||||
sizeof(ACPI_ERDT_DACD_PATHS) + NumTrailers,
|
||||
ACPI_ADD_PTR (ACPI_SUBTBL_HDR_16, ScopeTable,
|
||||
sizeof(*ScopeTable) + NumTrailers),
|
||||
sizeof(UINT32), AcpiDmTableInfoErdtDacdPath);
|
||||
if (ACPI_FAILURE (Status))
|
||||
{
|
||||
return;
|
||||
}
|
||||
NumTrailers++;
|
||||
}
|
||||
|
||||
ScopeOffset += ScopeTable->Header.Length;
|
||||
ScopeTable = ACPI_ADD_PTR (ACPI_ERDT_DACD_PATHS,
|
||||
ScopeTable, ScopeTable->Header.Length);
|
||||
}
|
||||
}
|
||||
NextSubsubtable:
|
||||
Suboffset += Subsubtable->Length;
|
||||
Subsubtable = ACPI_ADD_PTR (ACPI_SUBTBL_HDR_16, Table, Suboffset);
|
||||
}
|
||||
|
||||
Offset += Subtable->Length;
|
||||
Subtable = ACPI_ADD_PTR (ACPI_SUBTBL_HDR_16, Subtable,
|
||||
Subtable->Length);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* FUNCTION: AcpiDmDumpErst
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
@ -1471,6 +1471,54 @@ AcpiDmDumpMpst (
|
|||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* FUNCTION: AcpiDmDumpMrrm
|
||||
*
|
||||
* PARAMETERS: Table - A MRRM table
|
||||
*
|
||||
* RETURN: None
|
||||
*
|
||||
* DESCRIPTION: Format the contents of a MRRM
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
void
|
||||
AcpiDmDumpMrrm (
|
||||
ACPI_TABLE_HEADER *Table)
|
||||
{
|
||||
ACPI_STATUS Status;
|
||||
ACPI_MRRM_MEM_RANGE_ENTRY *Subtable;
|
||||
UINT16 Offset = sizeof (ACPI_TABLE_MRRM);
|
||||
|
||||
/* Main table */
|
||||
|
||||
Status = AcpiDmDumpTable (Table->Length, 0, Table, 0, AcpiDmTableInfoMrrm);
|
||||
if (ACPI_FAILURE (Status))
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
/* Subtables (all are same type) */
|
||||
|
||||
Subtable = ACPI_ADD_PTR (ACPI_MRRM_MEM_RANGE_ENTRY, Table, Offset);
|
||||
while (Offset < Table->Length)
|
||||
{
|
||||
AcpiOsPrintf ("\n");
|
||||
Status = AcpiDmDumpTable (Table->Length, Offset, Subtable,
|
||||
Subtable->Header.Length, AcpiDmTableInfoMrrm0);
|
||||
if (ACPI_FAILURE (Status))
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
Offset += Subtable->Header.Length;
|
||||
Subtable = ACPI_ADD_PTR (ACPI_MRRM_MEM_RANGE_ENTRY, Subtable,
|
||||
Subtable->Header.Length);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* FUNCTION: AcpiDmDumpMsct
|
||||
|
|
@ -2618,6 +2666,138 @@ AcpiDmDumpRhct (
|
|||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* FUNCTION: AcpiDmDumpRimt
|
||||
*
|
||||
* PARAMETERS: Table - A RIMT table
|
||||
*
|
||||
* RETURN: None
|
||||
*
|
||||
* DESCRIPTION: Format the contents of a RIMT.
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
void
|
||||
AcpiDmDumpRimt (
|
||||
ACPI_TABLE_HEADER *Table)
|
||||
{
|
||||
ACPI_RIMT_PLATFORM_DEVICE *PlatNode;
|
||||
ACPI_RIMT_PCIE_RC *PcieNode;
|
||||
ACPI_RIMT_NODE *Subtable;
|
||||
ACPI_STATUS Status;
|
||||
UINT32 Length = Table->Length;
|
||||
UINT16 SubtableOffset;
|
||||
UINT32 NodeOffset;
|
||||
UINT16 i;
|
||||
UINT32 Offset = sizeof (ACPI_TABLE_RIMT);
|
||||
|
||||
/* Main table */
|
||||
|
||||
Status = AcpiDmDumpTable (Length, 0, Table, 0, AcpiDmTableInfoRimt);
|
||||
if (ACPI_FAILURE (Status))
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
/* Subtables */
|
||||
|
||||
while (Offset < Table->Length)
|
||||
{
|
||||
AcpiOsPrintf ("\n");
|
||||
|
||||
/* Common subtable header */
|
||||
|
||||
Subtable = ACPI_ADD_PTR (ACPI_RIMT_NODE, Table, Offset);
|
||||
if (Subtable->Length < sizeof (ACPI_RIMT_NODE))
|
||||
{
|
||||
AcpiOsPrintf ("Invalid subtable length\n");
|
||||
return;
|
||||
}
|
||||
Status = AcpiDmDumpTable (Table->Length, Offset, Subtable,
|
||||
Subtable->Length, AcpiDmTableInfoRimtNodeHdr);
|
||||
if (ACPI_FAILURE (Status))
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
Length = sizeof (ACPI_RIMT_NODE);
|
||||
|
||||
if (Subtable->Length < Length)
|
||||
{
|
||||
AcpiOsPrintf ("Invalid subtable length\n");
|
||||
return;
|
||||
}
|
||||
SubtableOffset = (UINT16) Length;
|
||||
|
||||
switch (Subtable->Type)
|
||||
{
|
||||
case ACPI_RIMT_NODE_TYPE_IOMMU:
|
||||
Status = AcpiDmDumpTable (Table->Length, Offset + SubtableOffset,
|
||||
ACPI_ADD_PTR (ACPI_RIMT_IOMMU, Subtable, SubtableOffset),
|
||||
sizeof (ACPI_RIMT_IOMMU), AcpiDmTableInfoRimtIommu);
|
||||
|
||||
break;
|
||||
|
||||
case ACPI_RIMT_NODE_TYPE_PCIE_ROOT_COMPLEX:
|
||||
Status = AcpiDmDumpTable (Table->Length, Offset + SubtableOffset,
|
||||
ACPI_ADD_PTR (ACPI_RIMT_PCIE_RC, Subtable, SubtableOffset),
|
||||
sizeof (ACPI_RIMT_PCIE_RC), AcpiDmTableInfoRimtPcieRc);
|
||||
|
||||
PcieNode = ACPI_ADD_PTR (ACPI_RIMT_PCIE_RC, Subtable, SubtableOffset);
|
||||
|
||||
/* Dump the ID mappings */
|
||||
NodeOffset = PcieNode->IdMappingOffset;
|
||||
for (i = 0; i < PcieNode->NumIdMappings; i++)
|
||||
{
|
||||
AcpiOsPrintf ("\n");
|
||||
Length = sizeof (ACPI_RIMT_ID_MAPPING);
|
||||
Status = AcpiDmDumpTable (Table->Length, Offset + NodeOffset,
|
||||
ACPI_ADD_PTR (ACPI_RIMT_ID_MAPPING, Subtable, NodeOffset),
|
||||
Length, AcpiDmTableInfoRimtIdMapping);
|
||||
if (ACPI_FAILURE (Status))
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
NodeOffset += Length;
|
||||
}
|
||||
break;
|
||||
|
||||
case ACPI_RIMT_NODE_TYPE_PLAT_DEVICE:
|
||||
Status = AcpiDmDumpTable (Table->Length, Offset + SubtableOffset,
|
||||
ACPI_ADD_PTR (ACPI_RIMT_PLATFORM_DEVICE, Subtable, SubtableOffset),
|
||||
sizeof (ACPI_RIMT_PLATFORM_DEVICE), AcpiDmTableInfoRimtPlatDev);
|
||||
PlatNode = ACPI_ADD_PTR (ACPI_RIMT_PLATFORM_DEVICE, Subtable, SubtableOffset);
|
||||
|
||||
/* Dump the ID mappings */
|
||||
NodeOffset = PlatNode->IdMappingOffset;
|
||||
for (i = 0; i < PlatNode->NumIdMappings; i++)
|
||||
{
|
||||
AcpiOsPrintf ("\n");
|
||||
Length = sizeof (ACPI_RIMT_ID_MAPPING);
|
||||
Status = AcpiDmDumpTable (Table->Length, Offset + NodeOffset,
|
||||
ACPI_ADD_PTR (ACPI_RIMT_ID_MAPPING, Subtable, NodeOffset),
|
||||
Length, AcpiDmTableInfoRimtIdMapping);
|
||||
if (ACPI_FAILURE (Status))
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
NodeOffset += Length;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
/* Point to next subtable */
|
||||
|
||||
Offset += Subtable->Length;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
@ -1011,7 +1011,8 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoDmarScope[] =
|
|||
{
|
||||
{ACPI_DMT_DMAR_SCOPE, ACPI_DMARS_OFFSET (EntryType), "Device Scope Type", 0},
|
||||
{ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Length), "Entry Length", DT_LENGTH},
|
||||
{ACPI_DMT_UINT16, ACPI_DMARS_OFFSET (Reserved), "Reserved", 0},
|
||||
{ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Flags), "Flags", 0},
|
||||
{ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Reserved), "Reserved", 0},
|
||||
{ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EnumerationId), "Enumeration ID", 0},
|
||||
{ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Bus), "PCI Bus Number", 0},
|
||||
ACPI_DMT_TERMINATOR
|
||||
|
|
@ -1024,7 +1025,8 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoDmarScope[] =
|
|||
ACPI_DMTABLE_INFO AcpiDmTableInfoDmar0[] =
|
||||
{
|
||||
{ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Flags), "Flags", 0},
|
||||
{ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Reserved), "Reserved", 0},
|
||||
{ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Size), "Size (decoded below)", 0},
|
||||
{ACPI_DMT_FLAGS4_0, ACPI_DMAR0_FLAG_OFFSET (Size,0), "Size (pages, log2)", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Segment), "PCI Segment Number", 0},
|
||||
{ACPI_DMT_UINT64, ACPI_DMAR0_OFFSET (Address), "Register Base Address", 0},
|
||||
ACPI_DMT_TERMINATOR
|
||||
|
|
@ -1071,7 +1073,7 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoDmar4[] =
|
|||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
/* 5: Hardware Unit Definition */
|
||||
/* 5: SoC Integrated Address Translation Cache */
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoDmar5[] =
|
||||
{
|
||||
|
|
@ -1081,6 +1083,16 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoDmar5[] =
|
|||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
/* 6: SoC Integrated Device Property */
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoDmar6[] =
|
||||
{
|
||||
{ACPI_DMT_UINT16, ACPI_DMAR6_OFFSET (Reserved), "Reserved", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_DMAR6_OFFSET (Segment), "PCI Segment Number", 0},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* DRTM - Dynamic Root of Trust for Measurement table
|
||||
|
|
@ -1188,6 +1200,276 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoEinj0[] =
|
|||
};
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* ERDT - Enhanced Resource Director Technology table
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoErdt[] =
|
||||
{
|
||||
{ACPI_DMT_UINT32, ACPI_ERDT_OFFSET (MaxClos), "Maximum supported CLOSID", 0},
|
||||
{ACPI_DMT_BUF24, ACPI_ERDT_OFFSET (Reserved), "Reserved", 0},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* ERDT - Common Subtable Header
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoErdtHdr[] =
|
||||
{
|
||||
{ACPI_DMT_ERDT, ACPI_ERDT_HDR_OFFSET (Type), "Type", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_ERDT_HDR_OFFSET (Length), "Length", DT_LENGTH},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* RMDD - ERDT Resource Management Domain Description subtable
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoErdtRmdd[] =
|
||||
{
|
||||
{ACPI_DMT_UINT16, ACPI_ERDT_RMDD_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
|
||||
{ACPI_DMT_FLAG0, ACPI_ERDT_RMDD_FLAG_OFFSET (Flags,0), "L3 Domain", 0},
|
||||
{ACPI_DMT_FLAG1, ACPI_ERDT_RMDD_FLAG_OFFSET (Flags,0), "I/O L3 Domain", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_ERDT_RMDD_OFFSET (IO_l3_Slices), "I/O L3 Slices", 0},
|
||||
{ACPI_DMT_UINT8, ACPI_ERDT_RMDD_OFFSET (IO_l3_Sets), "I/O L3 Sets", 0},
|
||||
{ACPI_DMT_UINT8, ACPI_ERDT_RMDD_OFFSET (IO_l3_Ways), "I/O L3 Ways", 0},
|
||||
{ACPI_DMT_UINT64, ACPI_ERDT_RMDD_OFFSET (Reserved), "Reserved", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_ERDT_RMDD_OFFSET (DomainId), "Domain ID", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_ERDT_RMDD_OFFSET (MaxRmid), "Maximum supported RMID", 0},
|
||||
{ACPI_DMT_UINT64, ACPI_ERDT_RMDD_OFFSET (CregBase), "Control Register Base Address", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_ERDT_RMDD_OFFSET (CregSize), "Control Register Base Size", 0},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* RMDD - CACD CPU Agent Collection Description subtable
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoErdtCacd[] =
|
||||
{
|
||||
{ACPI_DMT_UINT16, ACPI_ERDT_CACD_OFFSET (Reserved), "Reserved", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_ERDT_CACD_OFFSET (DomainId), "Domain ID", 0},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoErdtCacdX2apic[] =
|
||||
{
|
||||
{ACPI_DMT_UINT32, 0, "X2ApicID", DT_OPTIONAL},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* RMDD - DACD Device Agent Collection Description subtable
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoErdtDacd[] =
|
||||
{
|
||||
{ACPI_DMT_UINT16, ACPI_ERDT_DACD_OFFSET (Reserved), "Reserved", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_ERDT_DACD_OFFSET (DomainId), "Domain ID", 0},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoErdtDacdScope[] =
|
||||
{
|
||||
{ACPI_DMT_UINT8, ACPI_ERDT_DACD_PATH_OFFSET (Header.Type), "PCIType", DT_OPTIONAL},
|
||||
{ACPI_DMT_UINT8, ACPI_ERDT_DACD_PATH_OFFSET (Header.Length), "Length", DT_OPTIONAL},
|
||||
{ACPI_DMT_UINT16, ACPI_ERDT_DACD_PATH_OFFSET (Segment), "Segment", DT_OPTIONAL},
|
||||
{ACPI_DMT_UINT8, ACPI_ERDT_DACD_PATH_OFFSET (Reserved), "Reserved", DT_OPTIONAL},
|
||||
{ACPI_DMT_UINT8, ACPI_ERDT_DACD_PATH_OFFSET (StartBus), "StartBus", DT_OPTIONAL},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoErdtDacdPath[] =
|
||||
{
|
||||
{ACPI_DMT_UINT8, 0, "Path", DT_OPTIONAL},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* RMDD - Cache Monitoring Registers for CPU Agents subtable
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoErdtCmrc[] =
|
||||
{
|
||||
{ACPI_DMT_UINT32, ACPI_ERDT_CMRC_OFFSET (Reserved1), "Reserved", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_ERDT_CMRC_OFFSET (Flags), "Flags", 0},
|
||||
{ACPI_DMT_UINT8, ACPI_ERDT_CMRC_OFFSET (IndexFn), "Register Index Function", 0},
|
||||
{ACPI_DMT_BUF11, ACPI_ERDT_CMRC_OFFSET (Reserved2), "Reserved", 0},
|
||||
{ACPI_DMT_UINT64, ACPI_ERDT_CMRC_OFFSET (CmtRegBase), "CMT Register Base Address", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_ERDT_CMRC_OFFSET (CmtRegSize), "CMT Register Size", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_ERDT_CMRC_OFFSET (ClumpSize), "Clump Size", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_ERDT_CMRC_OFFSET (ClumpStride), "Clump Stride", 0},
|
||||
{ACPI_DMT_UINT64, ACPI_ERDT_CMRC_OFFSET (UpScale), "Upscale factor", 0},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* RMDD - Memory-bandwidth Monitoring Registers for CPU agents subtable
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoErdtMmrc[] =
|
||||
{
|
||||
{ACPI_DMT_UINT32, ACPI_ERDT_MMRC_OFFSET (Reserved1), "Reserved", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_ERDT_MMRC_OFFSET (Flags), "Flags", 0},
|
||||
{ACPI_DMT_UINT8, ACPI_ERDT_MMRC_OFFSET (IndexFn), "Register Index Function", 0},
|
||||
{ACPI_DMT_BUF11, ACPI_ERDT_MMRC_OFFSET (Reserved2), "Reserved", 0},
|
||||
{ACPI_DMT_UINT64, ACPI_ERDT_MMRC_OFFSET (RegBase), "MBM Register Base Address", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_ERDT_MMRC_OFFSET (RegSize), "MBM Register Size", 0},
|
||||
{ACPI_DMT_UINT8, ACPI_ERDT_MMRC_OFFSET (CounterWidth), "MBM Counter Width", 0},
|
||||
{ACPI_DMT_UINT64, ACPI_ERDT_MMRC_OFFSET (UpScale), "Upscale factor", 0},
|
||||
{ACPI_DMT_UINT56, ACPI_ERDT_MMRC_OFFSET (Reserved3), "Reserved", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_ERDT_MMRC_OFFSET (CorrFactorListLen), "Corr Factor List Length", 0},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoErdtMmrcCorrFactor[] =
|
||||
{
|
||||
{ACPI_DMT_UINT32, 0, "CorrFactor", DT_OPTIONAL},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* RMDD - Memory-bandwidth Allocation Registers for CPU agents subtable
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoErdtMarc[] =
|
||||
{
|
||||
{ACPI_DMT_UINT16, ACPI_ERDT_MARC_OFFSET (Reserved1), "Reserved", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_ERDT_MARC_OFFSET (Flags), "Flags", 0},
|
||||
{ACPI_DMT_UINT8, ACPI_ERDT_MARC_OFFSET (IndexFn), "Register Index Function", 0},
|
||||
{ACPI_DMT_UINT56, ACPI_ERDT_MARC_OFFSET (Reserved2), "Reserved", 0},
|
||||
{ACPI_DMT_UINT64, ACPI_ERDT_MARC_OFFSET (RegBaseOpt), "MBA Register Opt Base Address", 0},
|
||||
{ACPI_DMT_UINT64, ACPI_ERDT_MARC_OFFSET (RegBaseMin), "MBA Register Min Base Address", 0},
|
||||
{ACPI_DMT_UINT64, ACPI_ERDT_MARC_OFFSET (RegBaseMax), "MBA Register Max Base Address", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_ERDT_MARC_OFFSET (MbaRegSize), "MBA Register Size", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_ERDT_MARC_OFFSET (MbaCtrlRange), "MBA Control Range", 0},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* RMDD - Cache Allocation Registers for CPU Agents subtable
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoErdtCarc[] =
|
||||
{
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* RMDD - Cache Monitoring Registers for Device Agents subtable
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoErdtCmrd[] =
|
||||
{
|
||||
{ACPI_DMT_UINT32, ACPI_ERDT_CMRD_OFFSET (Reserved1), "Reserved", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_ERDT_CMRD_OFFSET (Flags), "Flags", 0},
|
||||
{ACPI_DMT_UINT8, ACPI_ERDT_CMRD_OFFSET (IndexFn), "Register Index Function", 0},
|
||||
{ACPI_DMT_BUF11, ACPI_ERDT_CMRD_OFFSET (Reserved2), "Reserved", 0},
|
||||
{ACPI_DMT_UINT64, ACPI_ERDT_CMRD_OFFSET (RegBase), "CMRD Register Base Address", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_ERDT_CMRD_OFFSET (RegSize), "CMRD Register Size", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_ERDT_CMRD_OFFSET (CmtRegOff), "Register Offset", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_ERDT_CMRD_OFFSET (CmtClumpSize), "Clump Size", 0},
|
||||
{ACPI_DMT_UINT64, ACPI_ERDT_CMRD_OFFSET (UpScale), "Upscale factor", 0},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* RMDD - O Bandwidth Monitoring Registers for Device Agents subtable
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoErdtIbrd[] =
|
||||
{
|
||||
{ACPI_DMT_UINT32, ACPI_ERDT_IBRD_OFFSET (Reserved1), "Reserved", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_ERDT_IBRD_OFFSET (Flags), "Flags", 0},
|
||||
{ACPI_DMT_UINT8, ACPI_ERDT_IBRD_OFFSET (IndexFn), "Register Index Function", 0},
|
||||
{ACPI_DMT_BUF11, ACPI_ERDT_IBRD_OFFSET (Reserved2), "Reserved", 0},
|
||||
{ACPI_DMT_UINT64, ACPI_ERDT_IBRD_OFFSET (RegBase), "IBRD Register Base Address", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_ERDT_IBRD_OFFSET (RegSize), "IBRD Register Size", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_ERDT_IBRD_OFFSET (TotalBwOffset), "TotalBw Offset", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_ERDT_IBRD_OFFSET (IOMissBwOffset), "IO Miss Offset", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_ERDT_IBRD_OFFSET (TotalBwClump), "TotalBw Clump", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_ERDT_IBRD_OFFSET (IOMissBwClump), "IO Miss Clump", 0},
|
||||
{ACPI_DMT_UINT56, ACPI_ERDT_IBRD_OFFSET (Reserved3), "Reserved", 0},
|
||||
{ACPI_DMT_UINT8, ACPI_ERDT_IBRD_OFFSET (CounterWidth), "Counter Width", 0},
|
||||
{ACPI_DMT_UINT64, ACPI_ERDT_IBRD_OFFSET (UpScale), "Upscale factor", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_ERDT_IBRD_OFFSET (CorrFactorListLen), "Corr Factor List Length", 0},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoErdtIbrdCorrFactor[] =
|
||||
{
|
||||
{ACPI_DMT_UINT32, 0, "CorrFactor", DT_OPTIONAL},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* RMDD - O bandwidth Allocation Registers for Device Agents subtable
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoErdtIbad[] =
|
||||
{
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* RMDD - Cache Allocation Registers for Device Agents subtable
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoErdtCard[] =
|
||||
{
|
||||
{ACPI_DMT_UINT32, ACPI_ERDT_CARD_OFFSET (Reserved1), "Reserved", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_ERDT_CARD_OFFSET (Flags), "Flags", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_ERDT_CARD_OFFSET (ContentionMask), "ContentionMask", 0},
|
||||
{ACPI_DMT_UINT8, ACPI_ERDT_CARD_OFFSET (IndexFn), "Register Index Function", 0},
|
||||
{ACPI_DMT_UINT56, ACPI_ERDT_CARD_OFFSET (Reserved2), "Register Index Function", 0},
|
||||
{ACPI_DMT_UINT64, ACPI_ERDT_CARD_OFFSET (RegBase), "CARD Register Base Address", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_ERDT_CARD_OFFSET (RegSize), "CARD Register Size", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_ERDT_CARD_OFFSET (CatRegOffset), "CARD Register Offset", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_ERDT_CARD_OFFSET (CatRegBlockSize), "CARD Register Block Size", 0},
|
||||
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* ERST - Error Record Serialization table
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
@ -1418,6 +1418,39 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoMpst2[] =
|
|||
};
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* MRRM - Memory Range and Region Mapping Table
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoMrrm[] =
|
||||
{
|
||||
{ACPI_DMT_UINT8, ACPI_MRRM_OFFSET (MaxMemRegion), "Max Memory Regions", 0},
|
||||
{ACPI_DMT_UINT8, ACPI_MRRM_OFFSET (Flags), "Region Assignment Type", 0},
|
||||
{ACPI_DMT_BUF26, ACPI_MRRM_OFFSET (Reserved), "Reserved", 0},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
/* MRRM Subtable */
|
||||
|
||||
/* 0: Memory Range entry */
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoMrrm0[] =
|
||||
{
|
||||
{ACPI_DMT_UINT16, ACPI_MRRM0_OFFSET (Header.Type), "Memory Range", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_MRRM0_OFFSET (Header.Length), "Length", DT_LENGTH},
|
||||
{ACPI_DMT_UINT32, ACPI_MRRM0_OFFSET (Reserved0), "Reserved", 0},
|
||||
{ACPI_DMT_UINT64, ACPI_MRRM0_OFFSET (AddrBase), "System Address Base", 0},
|
||||
{ACPI_DMT_UINT64, ACPI_MRRM0_OFFSET (AddrLen), "System Address Length", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_MRRM0_OFFSET (RegionIdFlags), "Region Valid Flags", 0},
|
||||
{ACPI_DMT_UINT8, ACPI_MRRM0_OFFSET (LocalRegionId), "Static Local Region ID", 0},
|
||||
{ACPI_DMT_UINT8, ACPI_MRRM0_OFFSET (RemoteRegionId), "Static Remote Region ID", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_MRRM0_OFFSET (Reserved1), "Reserved", 0},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* MSCT - Maximum System Characteristics Table (ACPI 4.0)
|
||||
|
|
@ -2207,6 +2240,97 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoRhctHartInfo2[] =
|
|||
};
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* RIMT - RISC-V IO Mapping Table
|
||||
*
|
||||
* https://github.com/riscv-non-isa/riscv-acpi-rimt
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoRimt[] =
|
||||
{
|
||||
{ACPI_DMT_UINT32, ACPI_RIMT_OFFSET (NumNodes), "Number of RIMT Nodes", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_RIMT_OFFSET (NodeOffset), "Offset to RIMT Node Array", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_RIMT_OFFSET (Reserved), "Reserved", 0},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
|
||||
/* Common Subtable header (one per Subtable) */
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoRimtNodeHdr[] =
|
||||
{
|
||||
{ACPI_DMT_UINT8, ACPI_RIMTH_OFFSET (Type), "Type", 0},
|
||||
{ACPI_DMT_UINT8, ACPI_RIMTH_OFFSET (Revision), "Revision", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_RIMTH_OFFSET (Length), "Length", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_RIMTH_OFFSET (Reserved), "Reserved", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_RIMTH_OFFSET (Id), "ID", 0},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
/* 0: IOMMU Node type */
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoRimtIommu[] =
|
||||
{
|
||||
{ACPI_DMT_NAME8, ACPI_RIMTI_OFFSET (HardwareId), "Hardware ID", 0},
|
||||
{ACPI_DMT_UINT64, ACPI_RIMTI_OFFSET (BaseAddress), "Base Address", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_RIMTI_OFFSET (Flags), "Flags", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_RIMTI_OFFSET (ProximityDomain), "Proximity Domain", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_RIMTI_OFFSET (PcieSegmentNumber), "PCIe Segment number", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_RIMTI_OFFSET (PcieBdf), "PCIe B/D/F", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_RIMTI_OFFSET (NumInterruptWires), "Number of interrupt wires", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_RIMTI_OFFSET (InterruptWireOffset), "Interrupt wire array offset", 0},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoRimtIommuWire[] =
|
||||
{
|
||||
{ACPI_DMT_UINT32, ACPI_RIMTW_OFFSET (IrqNum), "Interrupt Number", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_RIMTW_OFFSET (Flags), "Flags", 0},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
/* 1: PCIE Root Complex Node type */
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoRimtPcieRc[] =
|
||||
{
|
||||
{ACPI_DMT_UINT32, ACPI_RIMTP_OFFSET (Flags), "Flags", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_RIMTP_OFFSET (Reserved), "Reserved", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_RIMTP_OFFSET (PcieSegmentNumber), "PCIe Segment number", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_RIMTP_OFFSET (IdMappingOffset), "ID mapping array offset", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_RIMTP_OFFSET (NumIdMappings), "Number of ID mappings", 0},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoRimtIdMapping[] =
|
||||
{
|
||||
{ACPI_DMT_UINT32, ACPI_RIMTM_OFFSET (SourceIdBase), "Source ID Base", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_RIMTM_OFFSET (NumIds), "Number of IDs", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_RIMTM_OFFSET (DestIdBase), "Destination Device ID Base", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_RIMTM_OFFSET (DestOffset), "Destination IOMMU Offset", 0},
|
||||
{ACPI_DMT_UINT32, ACPI_RIMTM_OFFSET (Flags), "Flags", 0},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
/* 2: Platform Device Node type */
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoRimtPlatDev[] =
|
||||
{
|
||||
{ACPI_DMT_UINT16, ACPI_RIMTN_OFFSET (IdMappingOffset), "ID mapping array offset", 0},
|
||||
{ACPI_DMT_UINT16, ACPI_RIMTN_OFFSET (NumIdMappings), "Number of ID mappings", 0},
|
||||
{ACPI_DMT_STRING, ACPI_RIMTN_OFFSET (DeviceName[0]), "Device Object Name", 0},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
ACPI_DMTABLE_INFO AcpiDmTableInfoRimtPlatDevPad[] =
|
||||
{
|
||||
{ACPI_DMT_RAW_BUFFER, 0, "Padding", DT_OPTIONAL},
|
||||
ACPI_DMT_TERMINATOR
|
||||
};
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* S3PT - S3 Performance Table
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
@ -210,7 +210,8 @@ UtLocalCacheCalloc (
|
|||
}
|
||||
}
|
||||
|
||||
if ((AslGbl_StringCacheNext + Length) >= AslGbl_StringCacheLast)
|
||||
if ((!AslGbl_StringCacheNext) ||
|
||||
((AslGbl_StringCacheNext + Length) >= AslGbl_StringCacheLast))
|
||||
{
|
||||
/* Allocate a new buffer */
|
||||
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@ NoEcho('
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@ NoEcho('
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@ NoEcho('
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
@ -546,9 +546,9 @@ MtMethodAnalysisWalkBegin (
|
|||
else if (HidExists && AdrExists)
|
||||
{
|
||||
/*
|
||||
* According to the ACPI spec, "A device object must contain
|
||||
* either an _HID object or an _ADR object, but should not contain
|
||||
* both".
|
||||
* "A device object must contain either an _HID object or
|
||||
* an _ADR object, but must not contain both".
|
||||
* (ACPI spec 6.3, Errata A Section 6.1, page 327)
|
||||
*/
|
||||
AslError (ASL_WARNING, ASL_MSG_MULTIPLE_TYPES, Op,
|
||||
"Device object requires either a _HID or _ADR, but not both");
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -11,7 +11,7 @@ NoEcho('
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
@ -294,7 +294,7 @@ OpcParsePrintf (
|
|||
if (StringToProcess)
|
||||
{
|
||||
NewString = UtLocalCacheCalloc (StringLength + 1);
|
||||
strncpy (NewString, StartPosition, StringLength);
|
||||
memcpy (NewString, StartPosition, StringLength);
|
||||
|
||||
NewOp = TrAllocateOp (PARSEOP_STRING_LITERAL);
|
||||
NewOp->Asl.Value.String = NewString;
|
||||
|
|
@ -383,7 +383,7 @@ OpcParsePrintf (
|
|||
if (StringToProcess)
|
||||
{
|
||||
NewString = UtLocalCacheCalloc (StringLength + 1);
|
||||
strncpy (NewString, StartPosition, StringLength);
|
||||
memcpy (NewString, StartPosition, StringLength);
|
||||
|
||||
NewOp = TrAllocateOp (PARSEOP_STRING_LITERAL);
|
||||
NewOp->Asl.Value.String = NewString;
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -11,7 +11,7 @@ NoEcho('
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -11,7 +11,7 @@ NoEcho('
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@ NoEcho('
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@ NoEcho('
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@ NoEcho('
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
* 1. Copyright Notice
|
||||
*
|
||||
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
|
||||
* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* 2. License
|
||||
|
|
|
|||
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Reference in a new issue