Increase the number of TX DMA segments from 32 to 35. It turned

out 32 is not enough to support a full sized TSO packet.
While I'm here fix a long standing bug introduced in r169632 in
bce(4) where it didn't include L2 header length of TSO packet in
the maximum DMA segment size calculation.

In collaboration with:	rmacklem
MFC after:		2 weeks
This commit is contained in:
Pyun YongHyeon 2014-03-31 01:54:59 +00:00
parent 8a27a339b6
commit 52ee8ac027
11 changed files with 12 additions and 12 deletions

View file

@ -42,7 +42,7 @@
#define AGE_TSO_MAXSEGSIZE 4096
#define AGE_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header))
#define AGE_MAXTXSEGS 32
#define AGE_MAXTXSEGS 35
#define AGE_RX_BUF_ALIGN 8
#ifndef __NO_STRICT_ALIGNMENT
#define AGE_RX_BUF_SIZE (MCLBYTES - AGE_RX_BUF_ALIGN)

View file

@ -42,7 +42,7 @@
#define ALC_TSO_MAXSEGSIZE 4096
#define ALC_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header))
#define ALC_MAXTXSEGS 32
#define ALC_MAXTXSEGS 35
#define ALC_ADDR_LO(x) ((uint64_t) (x) & 0xFFFFFFFF)
#define ALC_ADDR_HI(x) ((uint64_t) (x) >> 32)

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@ -40,7 +40,7 @@
#define ALE_TSO_MAXSEGSIZE 4096
#define ALE_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header))
#define ALE_MAXTXSEGS 32
#define ALE_MAXTXSEGS 35
#define ALE_ADDR_LO(x) ((uint64_t) (x) & 0xFFFFFFFF)
#define ALE_ADDR_HI(x) ((uint64_t) (x) >> 32)

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@ -6309,8 +6309,8 @@ struct fw_info {
#define BCE_TX_TIMEOUT 5
#define BCE_MAX_SEGMENTS 32
#define BCE_TSO_MAX_SIZE 65536
#define BCE_MAX_SEGMENTS 35
#define BCE_TSO_MAX_SIZE (65535 + sizeof(struct ether_vlan_header))
#define BCE_TSO_MAX_SEG_SIZE 4096
#define BCE_DMA_ALIGN 8

View file

@ -2852,7 +2852,7 @@ struct bge_gib {
*/
#define BGE_NSEG_JUMBO 4
#define BGE_NSEG_NEW 32
#define BGE_NSEG_NEW 35
#define BGE_TSOSEG_SZ 4096
/* Maximum DMA address for controllers that have 40bit DMA address bug. */

View file

@ -250,7 +250,7 @@ struct fxp_cb_ucode {
/*
* Number of DMA segments in a TxCB.
*/
#define FXP_NTXSEG 32
#define FXP_NTXSEG 35
struct fxp_tbd {
uint32_t tb_addr;

View file

@ -49,7 +49,7 @@
#define JME_RX_RING_ALIGN 16
#define JME_TSO_MAXSEGSIZE 4096
#define JME_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header))
#define JME_MAXTXSEGS 32
#define JME_MAXTXSEGS 35
#define JME_RX_BUF_ALIGN sizeof(uint64_t)
#define JME_SSB_ALIGN 16

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@ -2338,7 +2338,7 @@ struct msk_stat_desc {
#endif
#define MSK_RX_BUF_ALIGN 8
#define MSK_JUMBO_RX_RING_CNT MSK_RX_RING_CNT
#define MSK_MAXTXSEGS 32
#define MSK_MAXTXSEGS 35
#define MSK_TSO_MAXSGSIZE 4096
#define MSK_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header))

View file

@ -40,7 +40,7 @@
(NFE_JUMBO_FRAMELEN - NFE_RX_HEADERS)
#define NFE_MIN_FRAMELEN (ETHER_MIN_LEN - ETHER_CRC_LEN)
#define NFE_MAX_SCATTER 32
#define NFE_MAX_SCATTER 35
#define NFE_TSO_MAXSGSIZE 4096
#define NFE_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header))

View file

@ -284,7 +284,7 @@ struct sge_desc {
#define SGE_RX_RING_CNT 256 /* [8, 1024] */
#define SGE_TX_RING_CNT 256 /* [8, 8192] */
#define SGE_DESC_ALIGN 16
#define SGE_MAXTXSEGS 32
#define SGE_MAXTXSEGS 35
#define SGE_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header))
#define SGE_TSO_MAXSEGSIZE 4096
#define SGE_RX_BUF_ALIGN sizeof(uint64_t)

View file

@ -776,7 +776,7 @@ struct rl_stats {
#define RL_TX_DESC_CNT RL_8169_TX_DESC_CNT
#define RL_RX_DESC_CNT RL_8169_RX_DESC_CNT
#define RL_RX_JUMBO_DESC_CNT RL_RX_DESC_CNT
#define RL_NTXSEGS 32
#define RL_NTXSEGS 35
#define RL_RING_ALIGN 256
#define RL_DUMP_ALIGN 64