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amd64 pmap: do not set PG_G for usermode pmap pml5 kernel entry

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Sponsored by:	Advanced Micro Devices (AMD)
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
This commit is contained in:
Konstantin Belousov 2024-09-16 20:57:23 +03:00
parent bbb00b1719
commit 4f82af24f1
1 changed files with 2 additions and 2 deletions
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4
sys/amd64/amd64/pmap.c
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@ -4375,7 +4375,7 @@ pmap_pinit_pml5(vm_page_t pml5pg)
* entering all existing kernel mappings into level 5 table.
*/
pm_pml5[pmap_pml5e_index(UPT_MAX_ADDRESS)] = KPML4phys | X86_PG_V |
X86_PG_RW | X86_PG_A | X86_PG_M | pg_g |
X86_PG_RW | X86_PG_A | X86_PG_M |
pmap_cache_bits(kernel_pmap, VM_MEMATTR_DEFAULT, false);
/*
@ -4412,7 +4412,7 @@ pmap_pinit_pml5_pti(vm_page_t pml5pgu)
*/
pm_pml5u[pmap_pml5e_index(UPT_MAX_ADDRESS)] =
pmap_kextract((vm_offset_t)pti_pml4) |
X86_PG_V | X86_PG_RW | X86_PG_A | X86_PG_M | pg_g |
X86_PG_V | X86_PG_RW | X86_PG_A | X86_PG_M |
pmap_cache_bits(kernel_pmap, VM_MEMATTR_DEFAULT, false);
}