From 4e72678deecd23f669f8cf225e67b6a6254c991f Mon Sep 17 00:00:00 2001 From: Bruce Evans Date: Tue, 2 Dec 2003 15:02:12 +0000 Subject: [PATCH] Fixed panics in apic interrupt handlers if kernel profiling is turned on. MCOUNT and FAKE_MCOUNT() may clobber all the call-used registers, and one FAKE_MCOUNT() was placed so that an active %eax was clobbered. The fix is to move this FAKE_MCOUNT() earlier where it should have been anyway. Fixed 3 layers of bitrot in the comment about why this FAKE_MCOUNT() was where it was by removing the comment. (mcount() should be called as early as possible after entering a new level, but an implementation detail got in the way until 3 layers of changes ago.) Kernel profiling still gives wrong results because the new interrupt code rearranged object files too much. mcount() depends on trap, syscall and interrupt handlers being between certain magic labels with interrupt handlers last, and on nothing else being there. Splitting up exception.o moved the magic labels to effectively random places relative to what they are supposed to delimit. This mainly broke the call graph; the flat profile is still usable. --- sys/i386/i386/apic_vector.s | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/i386/i386/apic_vector.s b/sys/i386/i386/apic_vector.s index ecc4c674172..871fd798167 100644 --- a/sys/i386/i386/apic_vector.s +++ b/sys/i386/i386/apic_vector.s @@ -81,13 +81,13 @@ IDTVEC(vec_name) ; \ mov %ax, %es ; \ movl $KPSEL, %eax ; /* reload with per-CPU data segment */ \ mov %ax, %fs ; \ + FAKE_MCOUNT(13*4(%esp)) ; \ movl lapic, %edx ; /* pointer to local APIC */ \ movl LA_ISR + 16 * (index)(%edx), %eax ; /* load ISR */ \ bsrl %eax, %eax ; /* index of highset set bit in ISR */ \ jz 2f ; \ addl $(32 * index),%eax ; \ 1: ; \ - FAKE_MCOUNT(13*4(%esp)) ; /* XXX avoid double count */ \ pushl %eax ; /* pass the IRQ */ \ call lapic_handle_intr ; \ addl $4, %esp ; /* discard parameter */ \