From 4c0fdc5a3d80e4a9dce5800d6d4c2f7fc60fcd87 Mon Sep 17 00:00:00 2001 From: Michael Zhilin Date: Wed, 15 Mar 2017 18:57:18 +0000 Subject: [PATCH] [bhnd] fix mask for PMU control This patch fixes typo which results in extra bits of PMU control register. PR: 217782 Submitted by: Svyatoslav Found by: PVS-Studio --- sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c b/sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c index 7744da60222..1df24ffa957 100644 --- a/sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c +++ b/sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c @@ -2023,7 +2023,7 @@ bhnd_pmu1_pllinit0(struct bhnd_pmu_softc *sc, uint32_t xtal) /* Write XtalFreq. Set the divisor also. */ pmuctrl = BHND_PMU_READ_4(sc, BHND_PMU_CTRL); - pmuctrl = ~(BHND_PMU_CTRL_ILP_DIV_MASK | BHND_PMU_CTRL_XTALFREQ_MASK); + pmuctrl &= ~(BHND_PMU_CTRL_ILP_DIV_MASK | BHND_PMU_CTRL_XTALFREQ_MASK); pmuctrl |= BHND_PMU_SET_BITS(((xt->fref + 127) / 128) - 1, BHND_PMU_CTRL_ILP_DIV); pmuctrl |= BHND_PMU_SET_BITS(xt->xf, BHND_PMU_CTRL_XTALFREQ);