From 49ba3f32c8f48e8e1427f7858f544f435ea5465b Mon Sep 17 00:00:00 2001 From: Emmanuel Vadot Date: Thu, 24 Nov 2016 01:24:26 +0000 Subject: [PATCH] Enable the SCL and SDA i2c line for DDC. This is an undocumented register that we need to set if we do not want to rely on u-boot or other bootloader. --- sys/arm/allwinner/a10_hdmi.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/sys/arm/allwinner/a10_hdmi.c b/sys/arm/allwinner/a10_hdmi.c index 96613719e2e..dc12d4d5c72 100644 --- a/sys/arm/allwinner/a10_hdmi.c +++ b/sys/arm/allwinner/a10_hdmi.c @@ -189,6 +189,9 @@ __FBSDID("$FreeBSD$"); #define DDC_ADDR 0x50 #define EDDC_ADDR 0x60 #define EDID_LENGTH 128 +#define DDC_CTRL_LINE 0x540 +#define DDC_LINE_SCL_ENABLE (1 << 8) +#define DDC_LINE_SDA_ENABLE (1 << 9) #define HDMI_ENABLE_DELAY 50000 #define DDC_READ_RETRY 4 #define EXT_TAG 0x00 @@ -494,6 +497,10 @@ a10hdmi_get_edid(device_t dev, uint8_t **edid, uint32_t *edid_len) /* Configure DDC clock */ HDMI_WRITE(sc, DDC_CLOCK, DDC_CLOCK_M | DDC_CLOCK_N); + /* Enable SDA/SCL */ + HDMI_WRITE(sc, DDC_CTRL_LINE, + DDC_LINE_SCL_ENABLE | DDC_LINE_SDA_ENABLE); + /* Read EDID block */ error = a10hdmi_ddc_read(sc, 0, sc->edid); if (error == 0) {