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Minor rearrangement of the locore <-> initarm interface. Pass in a

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structure with the first 4 registers to allow a wider range of boot
loaders to work.  Future commits will make use of this to centralize
support for the different loaders.
This commit is contained in:
Warner Losh 2012-06-03 18:34:32 +00:00
parent 2faa5be555
commit 4623180919
12 changed files with 56 additions and 47 deletions
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50
sys/arm/arm/locore.S
View file

@ -37,6 +37,7 @@
#include <machine/asm.h>
#include <machine/armreg.h>
#include <machine/pte.h>
__FBSDID("$FreeBSD$");
/* What size should this really be ? It is only used by initarm() */
@ -61,22 +62,25 @@ __FBSDID("$FreeBSD$");
.globl physaddr
.set physaddr,PHYSADDR
ENTRY_NP(btext)
/*
* On entry:
* r0 - metadata pointer or 0
* On entry for FreeBSD boot ABI:
* r0 - metadata pointer or 0 (boothowto on AT91's boot2)
* r1 - if (r0 == 0) then metadata pointer
* On entry for Linux boot ABI:
* r0 - 0
* r1 - machine type (passed as arg2 to initarm)
* r2 - Pointer to a tagged list or dtb image (phys addr) (passed as arg1 initarm)
*
* For both types of boot we gather up the args, put them in a struct arm_boot_params
* structure and pass that to initarm.
*/
ENTRY_NP(btext)
ASENTRY_NP(_start)
mov r9, r0 /* 0 or boot mode from boot2 */
mov r8, r1 /* Save Machine type */
mov ip, r2 /* Save meta data */
mov fp, r3 /* Future expantion */
/* Move metadata ptr to r12 (ip) */
mov ip, r0
ldr r0, =0
cmp ip, r0
bne 1f
mov ip, r1
1:
/* Make sure interrupts are disabled. */
mrs r7, cpsr
orr r7, r7, #(I32_bit|F32_bit)
@ -91,25 +95,25 @@ ASENTRY_NP(_start)
*/
mrc p15, 0, r2, c1, c0, 0
ands r2, r2, #CPU_CONTROL_MMU_ENABLE
ldreq r8, =PHYSADDR
ldrne r8, =LOADERRAMADDR
cmp r7, r8
ldreq r6, =PHYSADDR
ldrne r6, =LOADERRAMADDR
cmp r7, r6
bls flash_lower
cmp r7, pc
bhi from_ram
b do_copy
flash_lower:
cmp r8, pc
cmp r6, pc
bls from_ram
do_copy:
ldr r9, =KERNBASE
ldr r7, =KERNBASE
adr r1, _start
ldr r0, Lreal_start
ldr r2, Lend
sub r2, r2, r0
sub r0, r0, r9
add r0, r0, r8
sub r0, r0, r7
add r0, r0, r6
mov r4, r0
bl memcpy
ldr r0, Lram_offset
@ -186,8 +190,14 @@ mmu_done:
ldr pc, .Lvirt_done
virt_done:
mov r0, ip /* Load argument: metadata ptr */
mov r1, #20 /* loader info size is 20 bytes also second arg */
subs sp, sp, r1 /* allocate arm_boot_params struct on stack */
mov r0, sp /* loader info pointer is first arg */
str r1, [r0] /* Store length of loader info */
str r9, [r0, #4] /* Store r0 from boot loader */
str r8, [r0, #8] /* Store r1 from boot loader */
str ip, [r0, #12] /* store r2 from boot loader */
str fp, [r0, #16] /* store r3 from boot loader */
mov fp, #0 /* trace back starts here */
bl _C_LABEL(initarm) /* Off we go */

7
sys/arm/at91/at91_machdep.c
View file

@ -132,9 +132,6 @@ struct pv_addr undstack;
struct pv_addr abtstack;
struct pv_addr kernelstack;
static void *boot_arg1;
static void *boot_arg2;
static struct trapframe proc0_tf;
/* Static device mappings. */
@ -236,7 +233,7 @@ at91_ramsize(void)
}
void *
initarm(void *arg, void *arg2)
initarm(struct arm_boot_params *abp)
{
struct pv_addr kernel_l1pt;
struct pv_addr dpcpu;
@ -247,8 +244,6 @@ initarm(void *arg, void *arg2)
uint32_t memsize;
vm_offset_t lastaddr;
boot_arg1 = arg;
boot_arg2 = arg2;
set_cpufuncs();
lastaddr = fake_preload_metadata();
pcpu_init(pcpup, 0, sizeof(struct pcpu));

8
sys/arm/econa/econa_machdep.c
View file

@ -123,9 +123,6 @@ struct pv_addr undstack;
struct pv_addr abtstack;
struct pv_addr kernelstack;
static void *boot_arg1;
static void *boot_arg2;
static struct trapframe proc0_tf;
/* Static device mappings. */
@ -186,7 +183,7 @@ static const struct pmap_devmap econa_devmap[] = {
void *
initarm(void *arg, void *arg2)
initarm(struct arm_boot_params *abp)
{
struct pv_addr kernel_l1pt;
volatile uint32_t * ddr = (uint32_t *)0x4000000C;
@ -198,9 +195,6 @@ initarm(void *arg, void *arg2)
uint32_t memsize;
int mem_info;
boot_arg1 = arg;
boot_arg2 = arg2;
boothowto = RB_VERBOSE;
set_cpufuncs();

20
sys/arm/include/cpu.h
View file

@ -6,8 +6,8 @@
#include <machine/armreg.h>
void cpu_halt(void);
void swi_vm(void *);
void cpu_halt(void);
void swi_vm(void *);
#ifdef _KERNEL
static __inline uint64_t
@ -25,8 +25,8 @@ get_cyclecount(void)
#define TRAPF_PC(tfp) ((tfp)->tf_pc)
#define cpu_getstack(td) ((td)->td_frame->tf_usr_sp)
#define cpu_setstack(td, sp) ((td)->td_frame->tf_usr_sp = (sp))
#define cpu_getstack(td) ((td)->td_frame->tf_usr_sp)
#define cpu_setstack(td, sp) ((td)->td_frame->tf_usr_sp = (sp))
#define cpu_spinwait() /* nothing */
#define ARM_NVEC 8
@ -34,12 +34,20 @@ get_cyclecount(void)
extern vm_offset_t vector_page;
struct arm_boot_params {
register_t abp_size; /* Size of this structure */
register_t abp_r0; /* r0 from the boot loader */
register_t abp_r1; /* r1 from the boot loader */
register_t abp_r2; /* r2 from the boot loader */
register_t abp_r3; /* r3 from the boot loader */
};
void arm_vector_init(vm_offset_t, int);
void fork_trampoline(void);
void identify_arm_cpu(void);
void *initarm(void *, void *);
void *initarm(struct arm_boot_params *);
extern char btext[];
extern char etext[];
int badaddr_read (void *, size_t, void *);
int badaddr_read(void *, size_t, void *);
#endif /* !MACHINE_CPU_H */

4
sys/arm/mv/mv_machdep.c
View file

@ -306,16 +306,18 @@ physmap_init(void)
}
void *
initarm(void *mdp, void *unused __unused)
initarm(struct arm_boot_params *abp)
{
struct pv_addr kernel_l1pt;
struct pv_addr dpcpu;
vm_offset_t dtbp, freemempos, l2_start, lastaddr;
uint32_t memsize, l2size;
void *kmdp;
void *mdp;
u_int l1pagetable;
int i = 0, j = 0, err_devmap = 0;
mdp = (void *)abp->abp_r0;
kmdp = NULL;
lastaddr = 0;
memsize = 0;

2
sys/arm/s3c2xx0/s3c24x0_machdep.c
View file

@ -234,7 +234,7 @@ bus_dma_get_range_nb(void)
}
void *
initarm(void *arg, void *arg2)
initarm(struct arm_boot_params *abp)
{
struct pv_addr kernel_l1pt;
int loop;

2
sys/arm/sa11x0/assabet_machdep.c
View file

@ -201,7 +201,7 @@ cpu_reset()
#define CPU_SA110_CACHE_CLEAN_SIZE (0x4000 * 2)
void *
initarm(void *arg, void *arg2)
initarm(struct arm_boot_params *abp)
{
struct pcpu *pc;
struct pv_addr kernel_l1pt;

2
sys/arm/xscale/i80321/ep80219_machdep.c
View file

@ -181,7 +181,7 @@ static const struct pmap_devmap ep80219_devmap[] = {
extern vm_offset_t xscale_cache_clean_addr;
void *
initarm(void *arg, void *arg2)
initarm(struct arm_boot_params *abp)
{
struct pv_addr kernel_l1pt;
struct pv_addr dpcpu;

2
sys/arm/xscale/i80321/iq31244_machdep.c
View file

@ -182,7 +182,7 @@ static const struct pmap_devmap iq80321_devmap[] = {
extern vm_offset_t xscale_cache_clean_addr;
void *
initarm(void *arg, void *arg2)
initarm(struct arm_boot_params *abp)
{
struct pv_addr kernel_l1pt;
struct pv_addr dpcpu;

2
sys/arm/xscale/i8134x/crb_machdep.c
View file

@ -178,7 +178,7 @@ static const struct pmap_devmap iq81342_devmap[] = {
extern vm_offset_t xscale_cache_clean_addr;
void *
initarm(void *arg, void *arg2)
initarm(struct arm_boot_params *abp)
{
struct pv_addr kernel_l1pt;
struct pv_addr dpcpu;

2
sys/arm/xscale/ixp425/avila_machdep.c
View file

@ -225,7 +225,7 @@ static const struct pmap_devmap ixp435_devmap[] = {
extern vm_offset_t xscale_cache_clean_addr;
void *
initarm(void *arg, void *arg2)
initarm(struct arm_boot_params *abp)
{
#define next_chunk2(a,b) (((a) + (b)) &~ ((b)-1))
#define next_page(a) next_chunk2(a,PAGE_SIZE)

2
sys/arm/xscale/pxa/pxa_machdep.c
View file

@ -162,7 +162,7 @@ static const struct pmap_devmap pxa_devmap[] = {
extern vm_offset_t xscale_cache_clean_addr;
void *
initarm(void *arg, void *arg2)
initarm(struct arm_boot_params *abp)
{
struct pv_addr kernel_l1pt;
struct pv_addr dpcpu;