mirror of
https://github.com/opnsense/src.git
synced 2026-06-08 16:22:46 -04:00
Remove completely duplicate '#ifdef XEN' section.
This commit is contained in:
parent
c7e8722ca0
commit
45096d8c43
1 changed files with 0 additions and 30 deletions
|
|
@ -103,35 +103,6 @@
|
|||
*/
|
||||
|
||||
/* Interrupts for local APIC LVT entries other than the timer. */
|
||||
#ifdef XEN
|
||||
/* These are the Xen i386 APIC definitions */
|
||||
#define APIC_LOCAL_INTS 240
|
||||
#define APIC_ERROR_INT APIC_LOCAL_INTS
|
||||
#define APIC_THERMAL_INT (APIC_LOCAL_INTS + 1)
|
||||
#define APIC_CMC_INT (APIC_LOCAL_INTS + 2)
|
||||
#define APIC_IPI_INTS (APIC_LOCAL_INTS + 3)
|
||||
|
||||
#define IPI_RENDEZVOUS (APIC_IPI_INTS) /* Inter-CPU rendezvous. */
|
||||
#define IPI_INVLTLB (APIC_IPI_INTS + 1) /* TLB Shootdown IPIs */
|
||||
#define IPI_INVLPG (APIC_IPI_INTS + 2)
|
||||
#define IPI_INVLRNG (APIC_IPI_INTS + 3)
|
||||
#define IPI_INVLCACHE (APIC_IPI_INTS + 4)
|
||||
#define IPI_LAZYPMAP (APIC_IPI_INTS + 5) /* Lazy pmap release. */
|
||||
/* Vector to handle bitmap based IPIs */
|
||||
#define IPI_BITMAP_VECTOR (APIC_IPI_INTS + 6)
|
||||
|
||||
/* IPIs handled by IPI_BITMAPED_VECTOR (XXX ups is there a better place?) */
|
||||
#define IPI_AST 0 /* Generate software trap. */
|
||||
#define IPI_PREEMPT 1
|
||||
#define IPI_HARDCLOCK 2
|
||||
#define IPI_BITMAP_LAST IPI_HARDCLOCK
|
||||
#define IPI_IS_BITMAPED(x) ((x) <= IPI_BITMAP_LAST)
|
||||
|
||||
#define IPI_STOP (APIC_IPI_INTS + 7) /* Stop CPU until restarted. */
|
||||
#define IPI_STOP_HARD (APIC_IPI_INTS + 8) /* Stop CPU with a NMI. */
|
||||
|
||||
#else /* XEN */
|
||||
/* These are the normal i386 APIC definitions */
|
||||
#define APIC_LOCAL_INTS 240
|
||||
#define APIC_ERROR_INT APIC_LOCAL_INTS
|
||||
#define APIC_THERMAL_INT (APIC_LOCAL_INTS + 1)
|
||||
|
|
@ -156,7 +127,6 @@
|
|||
|
||||
#define IPI_STOP (APIC_IPI_INTS + 7) /* Stop CPU until restarted. */
|
||||
#define IPI_STOP_HARD (APIC_IPI_INTS + 8) /* Stop CPU with a NMI. */
|
||||
#endif /* XEN */
|
||||
|
||||
/*
|
||||
* The spurious interrupt can share the priority class with the IPIs since
|
||||
|
|
|
|||
Loading…
Reference in a new issue