diff --git a/sys/dev/dc/if_dc.c b/sys/dev/dc/if_dc.c index 3b5e91ad542..c27a45e823c 100644 --- a/sys/dev/dc/if_dc.c +++ b/sys/dev/dc/if_dc.c @@ -799,10 +799,13 @@ static int dc_miibus_readreg(dev, phy, reg) frame.mii_phyaddr = phy; frame.mii_regaddr = reg; - phy_reg = CSR_READ_4(sc, DC_NETCFG); - CSR_WRITE_4(sc, DC_NETCFG, phy_reg & ~DC_NETCFG_PORTSEL); + if (sc->dc_type == DC_TYPE_98713) { + phy_reg = CSR_READ_4(sc, DC_NETCFG); + CSR_WRITE_4(sc, DC_NETCFG, phy_reg & ~DC_NETCFG_PORTSEL); + } dc_mii_readreg(sc, &frame); - CSR_WRITE_4(sc, DC_NETCFG, phy_reg); + if (sc->dc_type == DC_TYPE_98713) + CSR_WRITE_4(sc, DC_NETCFG, phy_reg); return(frame.mii_data); } @@ -869,10 +872,13 @@ static int dc_miibus_writereg(dev, phy, reg, data) frame.mii_regaddr = reg; frame.mii_data = data; - phy_reg = CSR_READ_4(sc, DC_NETCFG); - CSR_WRITE_4(sc, DC_NETCFG, phy_reg & ~DC_NETCFG_PORTSEL); + if (sc->dc_type == DC_TYPE_98713) { + phy_reg = CSR_READ_4(sc, DC_NETCFG); + CSR_WRITE_4(sc, DC_NETCFG, phy_reg & ~DC_NETCFG_PORTSEL); + } dc_mii_writereg(sc, &frame); - CSR_WRITE_4(sc, DC_NETCFG, phy_reg); + if (sc->dc_type == DC_TYPE_98713) + CSR_WRITE_4(sc, DC_NETCFG, phy_reg); return(0); } diff --git a/sys/dev/vr/if_vr.c b/sys/dev/vr/if_vr.c index 7c3729f8943..662e7be3456 100644 --- a/sys/dev/vr/if_vr.c +++ b/sys/dev/vr/if_vr.c @@ -1262,14 +1262,14 @@ static int vr_encap(sc, c, m_head) MGETHDR(m_new, M_DONTWAIT, MT_DATA); if (m_new == NULL) { - printf("vr%d: no memory for tx list", sc->vr_unit); + printf("vr%d: no memory for tx list\n", sc->vr_unit); return(1); } if (m_head->m_pkthdr.len > MHLEN) { MCLGET(m_new, M_DONTWAIT); if (!(m_new->m_flags & M_EXT)) { m_freem(m_new); - printf("vr%d: no memory for tx list", + printf("vr%d: no memory for tx list\n", sc->vr_unit); return(1); } @@ -1346,7 +1346,11 @@ static void vr_start(ifp) sc->vr_cdata.vr_tx_free = cur_tx->vr_nextdesc; /* Pack the data into the descriptor. */ - vr_encap(sc, cur_tx, m_head); + if (vr_encap(sc, cur_tx, m_head)) { + IF_PREPEND(&ifp->if_snd, m_head); + cur_tx = NULL; + break; + } if (cur_tx != start_tx) VR_TXOWN(cur_tx) = VR_TXSTAT_OWN; diff --git a/sys/pci/if_dc.c b/sys/pci/if_dc.c index 3b5e91ad542..c27a45e823c 100644 --- a/sys/pci/if_dc.c +++ b/sys/pci/if_dc.c @@ -799,10 +799,13 @@ static int dc_miibus_readreg(dev, phy, reg) frame.mii_phyaddr = phy; frame.mii_regaddr = reg; - phy_reg = CSR_READ_4(sc, DC_NETCFG); - CSR_WRITE_4(sc, DC_NETCFG, phy_reg & ~DC_NETCFG_PORTSEL); + if (sc->dc_type == DC_TYPE_98713) { + phy_reg = CSR_READ_4(sc, DC_NETCFG); + CSR_WRITE_4(sc, DC_NETCFG, phy_reg & ~DC_NETCFG_PORTSEL); + } dc_mii_readreg(sc, &frame); - CSR_WRITE_4(sc, DC_NETCFG, phy_reg); + if (sc->dc_type == DC_TYPE_98713) + CSR_WRITE_4(sc, DC_NETCFG, phy_reg); return(frame.mii_data); } @@ -869,10 +872,13 @@ static int dc_miibus_writereg(dev, phy, reg, data) frame.mii_regaddr = reg; frame.mii_data = data; - phy_reg = CSR_READ_4(sc, DC_NETCFG); - CSR_WRITE_4(sc, DC_NETCFG, phy_reg & ~DC_NETCFG_PORTSEL); + if (sc->dc_type == DC_TYPE_98713) { + phy_reg = CSR_READ_4(sc, DC_NETCFG); + CSR_WRITE_4(sc, DC_NETCFG, phy_reg & ~DC_NETCFG_PORTSEL); + } dc_mii_writereg(sc, &frame); - CSR_WRITE_4(sc, DC_NETCFG, phy_reg); + if (sc->dc_type == DC_TYPE_98713) + CSR_WRITE_4(sc, DC_NETCFG, phy_reg); return(0); } diff --git a/sys/pci/if_vr.c b/sys/pci/if_vr.c index 7c3729f8943..662e7be3456 100644 --- a/sys/pci/if_vr.c +++ b/sys/pci/if_vr.c @@ -1262,14 +1262,14 @@ static int vr_encap(sc, c, m_head) MGETHDR(m_new, M_DONTWAIT, MT_DATA); if (m_new == NULL) { - printf("vr%d: no memory for tx list", sc->vr_unit); + printf("vr%d: no memory for tx list\n", sc->vr_unit); return(1); } if (m_head->m_pkthdr.len > MHLEN) { MCLGET(m_new, M_DONTWAIT); if (!(m_new->m_flags & M_EXT)) { m_freem(m_new); - printf("vr%d: no memory for tx list", + printf("vr%d: no memory for tx list\n", sc->vr_unit); return(1); } @@ -1346,7 +1346,11 @@ static void vr_start(ifp) sc->vr_cdata.vr_tx_free = cur_tx->vr_nextdesc; /* Pack the data into the descriptor. */ - vr_encap(sc, cur_tx, m_head); + if (vr_encap(sc, cur_tx, m_head)) { + IF_PREPEND(&ifp->if_snd, m_head); + cur_tx = NULL; + break; + } if (cur_tx != start_tx) VR_TXOWN(cur_tx) = VR_TXSTAT_OWN;