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Fix calculation of LCD CH1 SCLK1 output frequency when SCLK2 /2 is used

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PR:		208680
Reported by:	David Binderman <dcb314@hotmail.com>
This commit is contained in:
Jared McNeill 2016-04-26 12:36:12 +00:00
parent 63270b0b65
commit 39fe39bca9
1 changed files with 3 additions and 2 deletions
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5
sys/arm/allwinner/clk/aw_lcdclk.c
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@ -266,7 +266,7 @@ static int
aw_lcdclk_recalc_freq(struct clknode *clk, uint64_t *freq)
{
struct aw_lcdclk_softc *sc;
uint32_t val, m;
uint32_t val, m, src_sel;
sc = clknode_get_softc(clk);
@ -281,7 +281,8 @@ aw_lcdclk_recalc_freq(struct clknode *clk, uint64_t *freq)
*freq = *freq / m;
if (sc->id == CLK_IDX_CH1_SCLK1) {
if ((val & CH1_SCLK1_SEL) == CH1_SCLK1_SEL_SCLK2_DIV2)
src_sel = (val & CH1_SCLK1_SEL) >> CH1_SCLK1_SEL_SHIFT;
if (src_sel == CH1_SCLK1_SEL_SCLK2_DIV2)
*freq /= 2;
}