From 392777822f582e0d7ca61c852a82c960b2ef022b Mon Sep 17 00:00:00 2001 From: Alexander Motin Date: Fri, 15 Jan 2010 23:58:37 +0000 Subject: [PATCH] MFC r202011: While AHCI specification tells that multi-vector MSI doesn't use global IS register, nVidia chipsets have different oppinion, requiring every interrupt to be acknowledged there. While there, add interrupt descriptions in multi-vector MSI mode. --- sys/dev/ahci/ahci.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/sys/dev/ahci/ahci.c b/sys/dev/ahci/ahci.c index 698da60ab1f..784821d970c 100644 --- a/sys/dev/ahci/ahci.c +++ b/sys/dev/ahci/ahci.c @@ -570,6 +570,12 @@ ahci_setup_interrupt(device_t dev) device_printf(dev, "unable to setup interrupt\n"); return ENXIO; } + if (ctlr->numirqs > 1) { + bus_describe_intr(dev, ctlr->irqs[i].r_irq, + ctlr->irqs[i].handle, + ctlr->irqs[i].mode == AHCI_IRQ_MODE_ONE ? + "ch%d" : "%d", i); + } } return (0); } @@ -624,8 +630,14 @@ ahci_intr_one(void *data) int unit; unit = irq->r_irq_rid - 1; + /* Some controllers have edge triggered IS. */ + if (ctlr->quirks & AHCI_Q_EDGEIS) + ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit); if ((arg = ctlr->interrupt[unit].argument)) ctlr->interrupt[unit].function(arg); + /* AHCI declares level triggered IS. */ + if (!(ctlr->quirks & AHCI_Q_EDGEIS)) + ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit); } static struct resource *