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openssl: Fix detection of ARMv7 and ARM64 CPU features

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OpenSSL assumes the same value for AT_HWCAP=16 (Linux)
So it ends up calling elf_auxv_info() with AT_CANARY which
returns ENOENT, and all acceleration features are disabled.

With this, my ARM64 test machine runs the benchmark
`openssl speed -evp aes-256-gcm` nearly 20x faster
going from 100 MB/sec to 2000 MB/sec

It also improves sha256 from 300 MB/sec to 1800 MB/sec

This fix has been accepted but not yet merged upstream:
https://github.com/openssl/openssl/pull/17082

PR:		259937
Reviewed by:	manu, imp
MFC after:	immediate
Relnotes:	yes
Fixes:		88e852c0b5 ("OpenSSL: Merge OpenSSL 1.1.1j")
Sponsored by:	Ampere Computing LLC
Sponsored by:	Klara Inc.
Differential Revision:	https://reviews.freebsd.org/D33060

(cherry picked from commit d9bb798725)
This commit is contained in:
Allan Jude 2021-11-19 15:14:30 +00:00
parent d16fbc488e
commit 32a2fed6e7
1 changed files with 9 additions and 6 deletions
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15
crypto/openssl/crypto/armcap.c
View file

@ -106,20 +106,23 @@ static unsigned long getauxval(unsigned long key)
* ARM puts the feature bits for Crypto Extensions in AT_HWCAP2, whereas
* AArch64 used AT_HWCAP.
*/
# ifndef AT_HWCAP
# define AT_HWCAP 16
# endif
# ifndef AT_HWCAP2
# define AT_HWCAP2 26
# endif
# if defined(__arm__) || defined (__arm)
# define HWCAP 16
/* AT_HWCAP */
# define HWCAP AT_HWCAP
# define HWCAP_NEON (1 << 12)
# define HWCAP_CE 26
/* AT_HWCAP2 */
# define HWCAP_CE AT_HWCAP2
# define HWCAP_CE_AES (1 << 0)
# define HWCAP_CE_PMULL (1 << 1)
# define HWCAP_CE_SHA1 (1 << 2)
# define HWCAP_CE_SHA256 (1 << 3)
# elif defined(__aarch64__)
# define HWCAP 16
/* AT_HWCAP */
# define HWCAP AT_HWCAP
# define HWCAP_NEON (1 << 1)
# define HWCAP_CE HWCAP