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Invalidate cachelines for bounce pages on PREREAD too, there may still be

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stale entries from a previous transfer.
This commit is contained in:
Olivier Houchard 2014-02-02 22:26:30 +00:00
parent af727bf0d3
commit 2dfc0cd1b1
1 changed files with 11 additions and 0 deletions
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11
sys/arm/arm/busdma_machdep-v6.c
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@ -1220,6 +1220,17 @@ _bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
dmat->bounce_zone->total_bounced++;
}
if (op & BUS_DMASYNC_PREREAD) {
bpage = STAILQ_FIRST(&map->bpages);
while (bpage != NULL) {
cpu_dcache_inv_range((vm_offset_t)bpage->vaddr,
bpage->datacount);
l2cache_inv_range((vm_offset_t)bpage->vaddr,
(vm_offset_t)bpage->busaddr,
bpage->datacount);
bpage = STAILQ_NEXT(bpage, links);
}
}
if (op & BUS_DMASYNC_POSTREAD) {
while (bpage != NULL) {
vm_offset_t startv;