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lahf/sahf are supported on some amd64 processors

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While the instructions were not included into the original instruction
set, their support can be indicated by a special feature bit.
For example:
  CPU: AMD Phenom(tm) II X4 955 Processor (3214.71-MHz K8-class CPU)
  ...
    AMD Features2=0x37ff<LAHF, ...>

Clang 3.8 uses lahf/sahf as a faster alternative to pushf/popf where
possible.

MFC after:	2 weeks
This commit is contained in:
Andriy Gapon 2016-04-22 13:44:12 +00:00
parent dbbcddb426
commit 2d69831b85
1 changed files with 1 additions and 1 deletions
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2
sys/cddl/dev/dtrace/x86/dis_tables.c
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@ -1931,7 +1931,7 @@ const instable_t dis_distable[16][16] = {
/* [9,0] */ TNS("nop",NORM), TS("xchg",RA), TS("xchg",RA), TS("xchg",RA),
/* [9,4] */ TS("xchg",RA), TS("xchg",RA), TS("xchg",RA), TS("xchg",RA),
/* [9,8] */ TNS("cXtX",CBW), TNS("cXtX",CWD), TNSx("lcall",SO), TNS("fwait",NORM),
/* [9,C] */ TSZy("pushf",IMPLMEM,4),TSZy("popf",IMPLMEM,4), TNSx("sahf",NORM), TNSx("lahf",NORM),
/* [9,C] */ TSZy("pushf",IMPLMEM,4),TSZy("popf",IMPLMEM,4), TNS("sahf",NORM), TNS("lahf",NORM),
}, {
/* [A,0] */ TNS("movb",OA), TS("mov",OA), TNS("movb",AO), TS("mov",AO),
/* [A,4] */ TNSZ("movsb",SD,1), TS("movs",SD), TNSZ("cmpsb",SD,1), TS("cmps",SD),