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synced 2026-06-09 08:43:19 -04:00
Connect NAND for the SAM9260EK eval board, as well as the HotE HL-201.
# expect more refinement as do more boards.
This commit is contained in:
Warner Losh
parent
90a9a51875
commit
2bff652222
3 changed files with 173 additions and 22 deletions
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@ -34,6 +34,36 @@ __FBSDID("$FreeBSD$");
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#include <arm/at91/at91sam9g20reg.h>
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#include <arm/at91/at91_piovar.h>
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#include <arm/at91/at91_pio_sam9g20.h>
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#include <arm/at91/at91_smc.h>
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#include <arm/at91/at91_gpio.h>
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#include <dev/nand/nfc_at91.h>
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static struct at91_smc_init nand_smc = {
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.ncs_rd_setup = 0,
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.nrd_setup = 2,
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.ncs_wr_setup = 0,
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.nwe_setup = 2,
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.ncs_rd_pulse = 4,
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.nrd_pulse = 4,
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.ncs_wr_pulse = 4,
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.nwe_pulse = 4,
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.nrd_cycle = 7,
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.nwe_cycle = 7,
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.mode = SMC_MODE_READ | SMC_MODE_WRITE | SMC_MODE_EXNW_DISABLED,
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.tdf_cycles = 3,
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};
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static struct at91_nand_params nand_param = {
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.ale = 1u << 21,
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.cle = 1u << 22,
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.width = 8,
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.rnb_pin = AT91_PIN_PC13, /* Note: These pins not confirmed */
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.nce_pin = AT91_PIN_PC14,
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.cs = 3,
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};
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BOARD_INIT long
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board_init(void)
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@ -64,6 +94,27 @@ board_init(void)
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at91_pio_use_periph_b(AT91SAM9G20_PIOA_BASE, AT91C_PIO_PA24, 0); /* ETX3 */
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at91_pio_use_periph_b(AT91SAM9G20_PIOA_BASE, AT91C_PIO_PA22, 0); /* ETXER */
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/* Setup Static Memory Controller */
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at91_smc_setup(0, 3, &nand_smc);
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at91_enable_nand(&nand_param);
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/*
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* This assumes
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* - RNB is on pin PC13
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* - CE is on pin PC14
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*
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* Nothing actually uses RNB right now.
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*
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* For CE, this currently asserts it during board setup and leaves it
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* that way forever.
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*
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* All this can go away when the gpio pin-renumbering happens...
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*/
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at91_pio_use_gpio(AT91SAM9G20_PIOC_BASE, AT91C_PIO_PC13 | AT91C_PIO_PC14);
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at91_pio_gpio_input(AT91SAM9G20_PIOC_BASE, AT91C_PIO_PC13); /* RNB */
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at91_pio_gpio_output(AT91SAM9G20_PIOC_BASE, AT91C_PIO_PC14, 0); /* nCS */
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at91_pio_gpio_clear(AT91SAM9G20_PIOC_BASE, AT91C_PIO_PC14); /* Assert nCS */
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return (at91_ramsize());
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}
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@ -38,9 +38,39 @@ __FBSDID("$FreeBSD$");
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#include <arm/at91/at91_piovar.h>
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#include <arm/at91/at91board.h>
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#include <arm/at91/at91sam9260reg.h>
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#include <arm/at91/at91_smc.h>
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#include <arm/at91/at91_gpio.h>
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#include <dev/nand/nfc_at91.h>
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BOARD_INIT long
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board_init(void)
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static struct at91_smc_init nand_smc = {
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.ncs_rd_setup = 0,
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.nrd_setup = 1,
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.ncs_wr_setup = 0,
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.nwe_setup = 1,
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.ncs_rd_pulse = 3,
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.nrd_pulse = 3,
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.ncs_wr_pulse = 3,
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.nwe_pulse = 3,
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.nrd_cycle = 5,
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.nwe_cycle = 5,
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.mode = SMC_MODE_READ | SMC_MODE_WRITE | SMC_MODE_EXNW_DISABLED,
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.tdf_cycles = 2,
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};
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static struct at91_nand_params nand_param = {
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.ale = 1u << 21,
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.cle = 1u << 22,
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.width = 8,
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.rnb_pin = AT91_PIN_PC13,
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.nce_pin = AT91_PIN_PC14,
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.cs = 3,
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};
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static void
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bi_dbgu(void)
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{
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/*
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@ -50,6 +80,11 @@ board_init(void)
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at91_pio_use_periph_a(AT91SAM9260_PIOB_BASE, AT91C_PIO_PB14, 0);
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/* DTXD */
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at91_pio_use_periph_a(AT91SAM9260_PIOB_BASE, AT91C_PIO_PB15, 1);
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}
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static void
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bi_emac()
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{
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/*
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* EMAC
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@ -91,7 +126,11 @@ board_init(void)
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at91_pio_use_periph_b(AT91SAM9260_PIOA_BASE, AT91C_PIO_PA28, 0);
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/* ECOL */
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at91_pio_use_periph_b(AT91SAM9260_PIOA_BASE, AT91C_PIO_PA29, 0);
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}
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static void
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bi_mmc(void)
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{
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/*
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* MMC, wired to socket B.
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@ -114,11 +153,11 @@ board_init(void)
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* don't support the dataflash. But if you did, you'd have to
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* use CS0 and CS1.
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*/
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}
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/*
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* SPI1 is wired to a audio CODEC that we don't support, so
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* give it a pass.
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*/
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static void
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bi_iic(void)
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{
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/*
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* TWI. Only one child on the iic bus, which we take care of
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@ -128,6 +167,11 @@ board_init(void)
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at91_pio_use_periph_a(AT91SAM9260_PIOA_BASE, AT91C_PIO_PA23, 1);
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/* TWCK */
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at91_pio_use_periph_a(AT91SAM9260_PIOA_BASE, AT91C_PIO_PA24, 1);
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}
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static void
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bi_usart0(void)
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{
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/*
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* USART0
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@ -148,7 +192,11 @@ board_init(void)
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at91_pio_use_periph_a(AT91SAM9260_PIOB_BASE, AT91C_PIO_PB26, 1);
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/* CTS0 */
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at91_pio_use_periph_a(AT91SAM9260_PIOB_BASE, AT91C_PIO_PB27, 0);
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}
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static void
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bi_usart1(void)
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{
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/*
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* USART1
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*/
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@ -160,9 +208,54 @@ board_init(void)
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at91_pio_use_periph_a(AT91SAM9260_PIOB_BASE, AT91C_PIO_PB6, 1);
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/* RXD1 */
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at91_pio_use_periph_a(AT91SAM9260_PIOB_BASE, AT91C_PIO_PB7, 0);
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}
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static void
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bi_nand(void)
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{
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/* Samsung 256MB SLC Flash */
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/* Setup Static Memory Controller */
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at91_smc_setup(0, 3, &nand_smc);
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at91_enable_nand(&nand_param);
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/*
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* This assumes
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* - RNB is on pin PC13
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* - CE is on pin PC14
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*
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* Nothing actually uses RNB right now.
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*
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* For CE, this currently asserts it during board setup and leaves it
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* that way forever.
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*
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* All this can go away when the gpio pin-renumbering happens...
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*/
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at91_pio_use_gpio(AT91SAM9260_PIOC_BASE, AT91C_PIO_PC13 | AT91C_PIO_PC14);
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at91_pio_gpio_input(AT91SAM9260_PIOC_BASE, AT91C_PIO_PC13); /* RNB */
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at91_pio_gpio_output(AT91SAM9260_PIOC_BASE, AT91C_PIO_PC14, 0); /* nCS */
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at91_pio_gpio_clear(AT91SAM9260_PIOC_BASE, AT91C_PIO_PC14); /* Assert nCS */
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}
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BOARD_INIT long
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board_init(void)
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{
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bi_dbgu();
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bi_emac();
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bi_mmc();
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/*
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* SPI1 is wired to a audio CODEC that we don't support, so
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* give it a pass.
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*/
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bi_iic();
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bi_usart0();
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bi_usart1();
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/* USART2 - USART5 aren't wired up, except via PIO pins, ignore them. */
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bi_nand();
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return (at91_ramsize());
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}
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@ -219,20 +219,6 @@ at91_usart_param(struct uart_bas *bas, int baudrate, int databits,
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return (0);
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}
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static void
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at91_usart_grab(struct uart_bas *bas)
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{
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WR4(bas, USART_IDR, USART_CSR_RXRDY);
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}
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static void
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at91_usart_ungrab(struct uart_bas *bas)
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{
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WR4(bas, USART_IER, USART_CSR_RXRDY);
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}
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static struct uart_ops at91_usart_ops = {
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.probe = at91_usart_probe,
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.init = at91_usart_init,
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@ -240,8 +226,6 @@ static struct uart_ops at91_usart_ops = {
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.putc = at91_usart_putc,
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.rxready = at91_usart_rxready,
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.getc = at91_usart_getc,
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.grab = at91_usart_grab,
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.ungrab = at91_usart_ungrab,
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};
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static int
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@ -331,6 +315,8 @@ static int at91_usart_bus_param(struct uart_softc *, int, int, int, int);
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static int at91_usart_bus_receive(struct uart_softc *);
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static int at91_usart_bus_setsig(struct uart_softc *, int);
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static int at91_usart_bus_transmit(struct uart_softc *);
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static void at91_usart_bus_grab(struct uart_softc *);
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static void at91_usart_bus_ungrab(struct uart_softc *);
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static kobj_method_t at91_usart_methods[] = {
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KOBJMETHOD(uart_probe, at91_usart_bus_probe),
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@ -343,6 +329,8 @@ static kobj_method_t at91_usart_methods[] = {
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KOBJMETHOD(uart_receive, at91_usart_bus_receive),
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KOBJMETHOD(uart_setsig, at91_usart_bus_setsig),
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KOBJMETHOD(uart_transmit, at91_usart_bus_transmit),
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KOBJMETHOD(uart_grab, at91_usart_bus_grab),
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KOBJMETHOD(uart_ungrab, at91_usart_bus_ungrab),
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KOBJMETHOD_END
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};
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@ -815,6 +803,25 @@ at91_usart_bus_ioctl(struct uart_softc *sc, int request, intptr_t data)
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return (EINVAL);
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}
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static void
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at91_usart_bus_grab(struct uart_softc *sc)
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{
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uart_lock(sc->sc_hwmtx);
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WR4(&sc->sc_bas, USART_IDR, USART_CSR_RXRDY);
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uart_unlock(sc->sc_hwmtx);
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}
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static void
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at91_usart_bus_ungrab(struct uart_softc *sc)
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{
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uart_lock(sc->sc_hwmtx);
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WR4(&sc->sc_bas, USART_IER, USART_CSR_RXRDY);
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uart_unlock(sc->sc_hwmtx);
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}
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struct uart_class at91_usart_class = {
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"at91_usart",
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at91_usart_methods,
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