From 2b5b95c2789cd55c8ed536183b0bc9d2a49aacc1 Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Tue, 31 Mar 2009 02:50:41 +0000 Subject: [PATCH] Go back to filtering all PHY addresses above 16 since at least two cards still have issues with them. Maybe this is a silicon rev? In any case, doing the filtering only for the AX88790 for the moment. --- sys/dev/ed/if_ed_pccard.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/sys/dev/ed/if_ed_pccard.c b/sys/dev/ed/if_ed_pccard.c index 924cc833adb..a1b0e8b8225 100644 --- a/sys/dev/ed/if_ed_pccard.c +++ b/sys/dev/ed/if_ed_pccard.c @@ -1101,8 +1101,14 @@ ed_miibus_readreg(device_t dev, int phy, int reg) * the internal PHY, a bit has to be set, when accessing the external * PHYs, it must be clear. See Errata 1, page 51, in the AX88790 * datasheet for more details. + * + * Also, PHYs above 16 appear to be phantoms on some cards, but not + * others. Registers read for this are often the same as prior values + * read. Filter all register requests to 17-31. */ if (sc->chip_type == ED_CHIP_TYPE_AX88790) { + if (phy > 0x10) + return (0); if (phy == 0x10) ed_asic_outb(sc, ED_AX88X90_GPIO, ED_AX88X90_GPIO_INT_PHY); @@ -1130,15 +1136,10 @@ ed_miibus_writereg(device_t dev, int phy, int reg, int data) struct ed_softc *sc; sc = device_get_softc(dev); - /* - * The AX88790 has an interesting quirk. It has an internal phy that - * needs a special bit set to access, but can also have additional - * external PHYs set for things like HomeNET media. When accessing - * the internal PHY, a bit has to be set, when accessing the external - * PHYs, it must be clear. See Errata 1, page 51, in the AX88790 - * datasheet for more details. - */ + /* See ed_miibus_readreg for details */ if (sc->chip_type == ED_CHIP_TYPE_AX88790) { + if (phy > 0x10) + return (0); if (phy == 0x10) ed_asic_outb(sc, ED_AX88X90_GPIO, ED_AX88X90_GPIO_INT_PHY);