From 270dc329b775afbbcff17a60cb6731f36b3dbf79 Mon Sep 17 00:00:00 2001 From: Nathan Whitehorn Date: Thu, 24 May 2012 22:14:39 +0000 Subject: [PATCH] Atomic operation acquire barriers also need to be isync on 64-bit systems. --- sys/powerpc/include/atomic.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/powerpc/include/atomic.h b/sys/powerpc/include/atomic.h index baac4003b41..3460443ef60 100644 --- a/sys/powerpc/include/atomic.h +++ b/sys/powerpc/include/atomic.h @@ -52,7 +52,7 @@ #define rmb() __asm __volatile("lwsync" : : : "memory") #define wmb() __asm __volatile("lwsync" : : : "memory") #define __ATOMIC_REL() __asm __volatile("lwsync" : : : "memory") -#define __ATOMIC_ACQ() __asm __volatile("lwsync" : : : "memory") +#define __ATOMIC_ACQ() __asm __volatile("isync" : : : "memory") #else #define mb() __asm __volatile("sync" : : : "memory") #define rmb() __asm __volatile("sync" : : : "memory")