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Make the default page coloring parameters match a (non-Xeon) Pentium II/III.

Browse source 
This setting is also acceptable for Celerons and Pentium Pros
with less than 1MB L2 caches.

Note: PQ_L2_SIZE is a misnomer.  The correct number of colors is
a function of the cache's degree of associativity as well as its size.

Submitted by:	bde and alc
This commit is contained in:
Alan Cox 1999-08-12 21:16:53 +00:00
parent 444449266c
commit 1aefb1d957
1 changed files with 8 additions and 2 deletions
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10
sys/vm/vm_page.h
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@ -61,7 +61,7 @@
* any improvements or extensions that they make and grant Carnegie the
* rights to redistribute these changes.
*
* $Id: vm_page.h,v 1.63 1999/07/22 06:04:17 alc Exp $
* $Id: vm_page.h,v 1.64 1999/07/31 18:31:00 alc Exp $
*/
/*
@ -179,12 +179,18 @@ struct vm_page {
#define PQ_L2_SIZE 16 /* A reasonable number of colors (opt for 64K cache) */
#endif
#if defined(PQ_MEDIUMCACHE) || !defined(PQ_L2_SIZE)
#if defined(PQ_MEDIUMCACHE)
#define PQ_PRIME1 13 /* Prime number somewhat less than PQ_HASH_SIZE */
#define PQ_PRIME2 7 /* Prime number somewhat less than PQ_HASH_SIZE */
#define PQ_L2_SIZE 64 /* A number of colors opt for 256K cache */
#endif
#if !defined(PQ_L2_SIZE)
#define PQ_PRIME1 9 /* Produces a good PQ_L2_SIZE/3 + PQ_PRIME1 */
#define PQ_PRIME2 5 /* Prime number somewhat less than PQ_HASH_SIZE */
#define PQ_L2_SIZE 32 /* 512KB or smaller, 4-way set-associative cache */
#endif
#define PQ_L2_MASK (PQ_L2_SIZE - 1)
#define PQ_NONE 0