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vmm: implement VM_CAP_MASK_HWINTR on AMD CPUs

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This patch implements the interrupt blocking VM capability on AMD
CPUs.  Implementing this capability allows the GDB stub to single-step
a virtual machine without landing inside interrupt handlers.

Reviewed by:	jhb, corvink
Sponsored by:   Google, Inc. (GSoC 2022)
Differential Revision:	https://reviews.freebsd.org/D42299
This commit is contained in:
Bojan Novković 2023-12-07 15:08:58 -08:00 committed by John Baldwin
parent e3b4fe645e
commit 181afaaaee
1 changed files with 11 additions and 0 deletions
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11
sys/amd64/vmm/amd/svm.c
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@ -1725,6 +1725,10 @@ svm_inj_interrupts(struct svm_softc *sc, struct svm_vcpu *vcpu,
int vector, need_intr_window;
int extint_pending;
if (vcpu->caps & (1 << VM_CAP_MASK_HWINTR)) {
return;
}
state = svm_get_vmcb_state(vcpu);
ctrl = svm_get_vmcb_ctrl(vcpu);
@ -2446,6 +2450,10 @@ svm_setcap(void *vcpui, int type, int val)
vlapic = vm_lapic(vcpu->vcpu);
vlapic->ipi_exit = val;
break;
case VM_CAP_MASK_HWINTR:
vcpu->caps &= ~(1 << VM_CAP_MASK_HWINTR);
vcpu->caps |= (val << VM_CAP_MASK_HWINTR);
break;
case VM_CAP_RFLAGS_TF: {
uint64_t rflags;
@ -2529,6 +2537,9 @@ svm_getcap(void *vcpui, int type, int *retval)
case VM_CAP_RFLAGS_TF:
*retval = !!(vcpu->caps & (1 << VM_CAP_RFLAGS_TF));
break;
case VM_CAP_MASK_HWINTR:
*retval = !!(vcpu->caps & (1 << VM_CAP_MASK_HWINTR));
break;
default:
error = ENOENT;
break;