From 17ff418d136441e8dce6928c83cc1f70fe7ec33e Mon Sep 17 00:00:00 2001 From: Pyun YongHyeon Date: Tue, 22 Nov 2011 20:57:06 +0000 Subject: [PATCH] Announce flow control capability to underlying PHY driver. Pause timer value is initialized to 0xFFFF. Controller allows just 4 different TX pause thresholds. The lowest possible threshold value looks too aggressive so use next available threshold value. --- sys/dev/vge/if_vge.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/sys/dev/vge/if_vge.c b/sys/dev/vge/if_vge.c index 720c32035c2..1c1a99bb30d 100644 --- a/sys/dev/vge/if_vge.c +++ b/sys/dev/vge/if_vge.c @@ -1103,7 +1103,7 @@ vge_attach(device_t dev) /* Do MII setup */ error = mii_attach(dev, &sc->vge_miibus, ifp, vge_ifmedia_upd, vge_ifmedia_sts, BMSR_DEFCAPMASK, sc->vge_phyaddr, MII_OFFSET_ANY, - 0); + MIIF_DOPAUSE); if (error != 0) { device_printf(dev, "attaching PHYs failed\n"); goto fail; @@ -2112,9 +2112,16 @@ vge_init_locked(struct vge_softc *sc) vge_rxfilter(sc); vge_setvlan(sc); - /* Enable flow control */ - - CSR_WRITE_1(sc, VGE_CRS2, 0x8B); + /* Initialize pause timer. */ + CSR_WRITE_2(sc, VGE_TX_PAUSE_TIMER, 0xFFFF); + /* + * Initialize flow control parameters. + * TX XON high threshold : 48 + * TX pause low threshold : 24 + * Disable hald-duplex flow control + */ + CSR_WRITE_1(sc, VGE_CRC2, 0xFF); + CSR_WRITE_1(sc, VGE_CRS2, VGE_CR2_XON_ENABLE | 0x0B); /* Enable jumbo frame reception (if desired) */