From 1675ae3b86d66270cdedec49c31d52aeab7e40b7 Mon Sep 17 00:00:00 2001 From: Robert Noland Date: Mon, 2 Nov 2009 15:53:32 +0000 Subject: [PATCH] MFC 198691 Fix blitter support for RS880 chips --- sys/dev/drm/r600_blit.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sys/dev/drm/r600_blit.c b/sys/dev/drm/r600_blit.c index 6443d843f98..3e64e42b357 100644 --- a/sys/dev/drm/r600_blit.c +++ b/sys/dev/drm/r600_blit.c @@ -1367,7 +1367,7 @@ set_vtx_resource(drm_radeon_private_t *dev_priv, u64 gpu_addr) if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) || ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) || ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) || - /*((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880) ||*/ + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880) || ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV710)) cp_set_surface_sync(dev_priv, R600_TC_ACTION_ENA, 48, gpu_addr); @@ -1509,7 +1509,7 @@ set_default_state(drm_radeon_private_t *dev_priv) case CHIP_RV610: case CHIP_RV620: case CHIP_RS780: - /*case CHIP_RS880:*/ + case CHIP_RS880: default: num_ps_gprs = 84; num_vs_gprs = 36; @@ -1591,7 +1591,7 @@ set_default_state(drm_radeon_private_t *dev_priv) if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) || ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) || ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) || - /*((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880) ||*/ + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880) || ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV710)) sq_config = 0; else