mirror of
https://github.com/opnsense/src.git
synced 2026-05-28 04:12:45 -04:00
Fixes and workarounds for Hayes ESP:
- don't uselessly initialize the fifo "DMA" bit at attach time. - initialize the fifo "DMA" bit at open time. Without this, the device interrupts for every character received, reducing input performance to that of an 8250. - don't uselessly initialize the fifo trigger level to 8 (scaled to 256) at attach time. - don't scale the fifo trigger level to 512 bytes. The driver's pseudo- dma buffer has size 256, so it can't handle bursts of size 512 or 256. It should be able to handle the second lowest ftl (2 scaled to 64). - don't reset the fifos in siostop(). Reset triggers a hardware bug involving wedging of the output interrupt bit This workaround unfortunately requires ESP support to be configured.
This commit is contained in:
Bruce Evans
parent
4c5f552d9a
commit
160da193e0
3 changed files with 75 additions and 21 deletions
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@ -899,14 +899,15 @@ sioattach(isdp)
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}
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#ifdef COM_ESP
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if (com->esp) {
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outb(iobase + com_fifo,
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FIFO_DMA_MODE | FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST
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| FIFO_RX_MEDH);
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/* Set 16550 compatibility mode. */
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/*
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* Set 16550 compatibility mode.
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* We don't use the ESP_MODE_SCALE bit to increase the
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* fifo trigger levels because we can't handle large
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* bursts of input.
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* XXX flow control should be set in comparam(), not here.
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*/
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outb(com->esp_port + ESP_CMD1, ESP_SETMODE);
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outb(com->esp_port + ESP_CMD2,
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ESP_MODE_SCALE | ESP_MODE_RTS | ESP_MODE_FIFO);
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outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO);
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/* Set RTS/CTS flow control. */
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outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE);
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@ -1918,6 +1919,15 @@ comparam(tp, t)
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*/
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com->fifo_image = t->c_ospeed <= 4800
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? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_HIGH;
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#ifdef COM_ESP
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/*
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* The Hayes ESP card needs the fifo DMA mode bit set
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* in compatibility mode. If not, it will interrupt
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* for each character received.
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*/
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if (com->esp)
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com->fifo_image |= FIFO_DMA_MODE;
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#endif
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outb(iobase + com_fifo, com->fifo_image);
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}
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@ -2128,6 +2138,10 @@ siostop(tp, rw)
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disable_intr();
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if (rw & FWRITE) {
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if (com->hasfifo)
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#ifdef COM_ESP
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/* XXX avoid h/w bug. */
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if (!com->esp)
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#endif
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/* XXX does this flush everything? */
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outb(com->iobase + com_fifo,
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FIFO_XMT_RST | com->fifo_image);
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@ -2140,6 +2154,10 @@ siostop(tp, rw)
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}
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if (rw & FREAD) {
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if (com->hasfifo)
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#ifdef COM_ESP
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/* XXX avoid h/w bug. */
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if (!com->esp)
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#endif
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/* XXX does this flush everything? */
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outb(com->iobase + com_fifo,
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FIFO_RCV_RST | com->fifo_image);
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@ -899,14 +899,15 @@ sioattach(isdp)
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}
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#ifdef COM_ESP
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if (com->esp) {
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outb(iobase + com_fifo,
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FIFO_DMA_MODE | FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST
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| FIFO_RX_MEDH);
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/* Set 16550 compatibility mode. */
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/*
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* Set 16550 compatibility mode.
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* We don't use the ESP_MODE_SCALE bit to increase the
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* fifo trigger levels because we can't handle large
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* bursts of input.
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* XXX flow control should be set in comparam(), not here.
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*/
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outb(com->esp_port + ESP_CMD1, ESP_SETMODE);
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outb(com->esp_port + ESP_CMD2,
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ESP_MODE_SCALE | ESP_MODE_RTS | ESP_MODE_FIFO);
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outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO);
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/* Set RTS/CTS flow control. */
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outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE);
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@ -1918,6 +1919,15 @@ comparam(tp, t)
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*/
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com->fifo_image = t->c_ospeed <= 4800
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? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_HIGH;
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#ifdef COM_ESP
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/*
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* The Hayes ESP card needs the fifo DMA mode bit set
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* in compatibility mode. If not, it will interrupt
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* for each character received.
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*/
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if (com->esp)
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com->fifo_image |= FIFO_DMA_MODE;
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#endif
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outb(iobase + com_fifo, com->fifo_image);
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}
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@ -2128,6 +2138,10 @@ siostop(tp, rw)
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disable_intr();
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if (rw & FWRITE) {
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if (com->hasfifo)
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#ifdef COM_ESP
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/* XXX avoid h/w bug. */
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if (!com->esp)
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#endif
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/* XXX does this flush everything? */
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outb(com->iobase + com_fifo,
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FIFO_XMT_RST | com->fifo_image);
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@ -2140,6 +2154,10 @@ siostop(tp, rw)
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}
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if (rw & FREAD) {
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if (com->hasfifo)
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#ifdef COM_ESP
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/* XXX avoid h/w bug. */
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if (!com->esp)
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#endif
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/* XXX does this flush everything? */
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outb(com->iobase + com_fifo,
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FIFO_RCV_RST | com->fifo_image);
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@ -899,14 +899,15 @@ sioattach(isdp)
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}
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#ifdef COM_ESP
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if (com->esp) {
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outb(iobase + com_fifo,
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FIFO_DMA_MODE | FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST
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| FIFO_RX_MEDH);
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/* Set 16550 compatibility mode. */
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/*
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* Set 16550 compatibility mode.
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* We don't use the ESP_MODE_SCALE bit to increase the
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* fifo trigger levels because we can't handle large
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* bursts of input.
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* XXX flow control should be set in comparam(), not here.
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*/
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outb(com->esp_port + ESP_CMD1, ESP_SETMODE);
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outb(com->esp_port + ESP_CMD2,
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ESP_MODE_SCALE | ESP_MODE_RTS | ESP_MODE_FIFO);
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outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO);
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/* Set RTS/CTS flow control. */
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outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE);
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@ -1918,6 +1919,15 @@ comparam(tp, t)
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*/
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com->fifo_image = t->c_ospeed <= 4800
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? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_HIGH;
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#ifdef COM_ESP
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/*
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* The Hayes ESP card needs the fifo DMA mode bit set
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* in compatibility mode. If not, it will interrupt
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* for each character received.
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*/
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if (com->esp)
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com->fifo_image |= FIFO_DMA_MODE;
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#endif
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outb(iobase + com_fifo, com->fifo_image);
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}
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@ -2128,6 +2138,10 @@ siostop(tp, rw)
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disable_intr();
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if (rw & FWRITE) {
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if (com->hasfifo)
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#ifdef COM_ESP
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/* XXX avoid h/w bug. */
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if (!com->esp)
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#endif
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/* XXX does this flush everything? */
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outb(com->iobase + com_fifo,
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FIFO_XMT_RST | com->fifo_image);
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@ -2140,6 +2154,10 @@ siostop(tp, rw)
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}
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if (rw & FREAD) {
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if (com->hasfifo)
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#ifdef COM_ESP
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/* XXX avoid h/w bug. */
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if (!com->esp)
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#endif
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/* XXX does this flush everything? */
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outb(com->iobase + com_fifo,
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FIFO_RCV_RST | com->fifo_image);
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