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Correct patch paths (remove contrib/llvm/)

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The example in contrib/llvm/patches/README.TXT fails otherwise.

Sponsored by:	DARPA, AFRL
This commit is contained in:
Ed Maste 2014-09-05 18:07:15 +00:00
parent 70ac4fa640
commit 14bef15d3d
1 changed files with 54 additions and 54 deletions
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108
contrib/llvm/patches/patch-r270147-llvm-r197824-r213427-r213960.diff
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@ -1,7 +1,7 @@
Index: contrib/llvm/include/llvm/Support/ELF.h
Index: include/llvm/Support/ELF.h
===================================================================
--- contrib/llvm/include/llvm/Support/ELF.h (revision 270019)
+++ contrib/llvm/include/llvm/Support/ELF.h (working copy)
--- include/llvm/Support/ELF.h (revision 270019)
+++ include/llvm/Support/ELF.h (working copy)
@@ -437,6 +437,7 @@
R_PPC_GOT16_LO = 15,
R_PPC_GOT16_HI = 16,
@ -10,10 +10,10 @@ Index: contrib/llvm/include/llvm/Support/ELF.h
R_PPC_REL32 = 26,
R_PPC_TLS = 67,
R_PPC_DTPMOD32 = 68,
Index: contrib/llvm/lib/Object/ELF.cpp
Index: lib/Object/ELF.cpp
===================================================================
--- contrib/llvm/lib/Object/ELF.cpp (revision 270019)
+++ contrib/llvm/lib/Object/ELF.cpp (working copy)
--- lib/Object/ELF.cpp (revision 270019)
+++ lib/Object/ELF.cpp (working copy)
@@ -507,6 +507,7 @@
LLVM_ELF_SWITCH_RELOC_TYPE_NAME(R_PPC_GOT16_LO);
LLVM_ELF_SWITCH_RELOC_TYPE_NAME(R_PPC_GOT16_HI);
@ -22,10 +22,10 @@ Index: contrib/llvm/lib/Object/ELF.cpp
LLVM_ELF_SWITCH_RELOC_TYPE_NAME(R_PPC_REL32);
LLVM_ELF_SWITCH_RELOC_TYPE_NAME(R_PPC_TLS);
LLVM_ELF_SWITCH_RELOC_TYPE_NAME(R_PPC_DTPMOD32);
Index: contrib/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
Index: lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
===================================================================
--- contrib/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp (revision 270019)
+++ contrib/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp (working copy)
--- lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp (revision 270019)
+++ lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp (working copy)
@@ -18,6 +18,7 @@
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
@ -52,10 +52,10 @@ Index: contrib/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
}
Index: contrib/llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
Index: lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
===================================================================
--- contrib/llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp (revision 270019)
+++ contrib/llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp (working copy)
--- lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp (revision 270019)
+++ lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp (working copy)
@@ -64,7 +64,15 @@
llvm_unreachable("Unimplemented");
case PPC::fixup_ppc_br24:
@ -123,10 +123,10 @@ Index: contrib/llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
break;
}
break;
Index: contrib/llvm/lib/Target/PowerPC/PPC.h
Index: lib/Target/PowerPC/PPC.h
===================================================================
--- contrib/llvm/lib/Target/PowerPC/PPC.h (revision 270019)
+++ contrib/llvm/lib/Target/PowerPC/PPC.h (working copy)
--- lib/Target/PowerPC/PPC.h (revision 270019)
+++ lib/Target/PowerPC/PPC.h (working copy)
@@ -53,10 +53,11 @@
// PPC Specific MachineOperand flags.
MO_NO_FLAG,
@ -143,10 +143,10 @@ Index: contrib/llvm/lib/Target/PowerPC/PPC.h
/// MO_PIC_FLAG - If this bit is set, the symbol reference is relative to
/// the function's picbase, e.g. lo16(symbol-picbase).
Index: contrib/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
Index: lib/Target/PowerPC/PPCAsmPrinter.cpp
===================================================================
--- contrib/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp (revision 270019)
+++ contrib/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp (working copy)
--- lib/Target/PowerPC/PPCAsmPrinter.cpp (revision 270019)
+++ lib/Target/PowerPC/PPCAsmPrinter.cpp (working copy)
@@ -19,6 +19,7 @@
#define DEBUG_TYPE "asmprinter"
#include "PPC.h"
@ -578,10 +578,10 @@ Index: contrib/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
}
}
Index: contrib/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
Index: lib/Target/PowerPC/PPCFrameLowering.cpp
===================================================================
--- contrib/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp (revision 270019)
+++ contrib/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp (working copy)
--- lib/Target/PowerPC/PPCFrameLowering.cpp (revision 270019)
+++ lib/Target/PowerPC/PPCFrameLowering.cpp (working copy)
@@ -299,7 +299,7 @@
const PPCRegisterInfo *RegInfo =
static_cast<const PPCRegisterInfo*>(MF.getTarget().getRegisterInfo());
@ -664,10 +664,10 @@ Index: contrib/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
// Allocate the frame index for the base pointer save area.
BPSI = MFI->CreateFixedObject(isPPC64? 8 : 4, BPOffset, true);
// Save the result.
Index: contrib/llvm/lib/Target/PowerPC/PPCFrameLowering.h
Index: lib/Target/PowerPC/PPCFrameLowering.h
===================================================================
--- contrib/llvm/lib/Target/PowerPC/PPCFrameLowering.h (revision 270019)
+++ contrib/llvm/lib/Target/PowerPC/PPCFrameLowering.h (working copy)
--- lib/Target/PowerPC/PPCFrameLowering.h (revision 270019)
+++ lib/Target/PowerPC/PPCFrameLowering.h (working copy)
@@ -96,12 +96,14 @@
/// getBasePointerSaveOffset - Return the previous frame offset to save the
@ -685,10 +685,10 @@ Index: contrib/llvm/lib/Target/PowerPC/PPCFrameLowering.h
}
/// getLinkageSize - Return the size of the PowerPC ABI linkage area.
Index: contrib/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
Index: lib/Target/PowerPC/PPCISelDAGToDAG.cpp
===================================================================
--- contrib/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp (revision 270019)
+++ contrib/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp (working copy)
--- lib/Target/PowerPC/PPCISelDAGToDAG.cpp (revision 270019)
+++ lib/Target/PowerPC/PPCISelDAGToDAG.cpp (working copy)
@@ -15,6 +15,7 @@
#define DEBUG_TYPE "ppc-codegen"
#include "PPC.h"
@ -748,10 +748,10 @@ Index: contrib/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
case PPCISD::VADD_SPLAT: {
// This expands into one of three sequences, depending on whether
// the first operand is odd or even, positive or negative.
Index: contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Index: lib/Target/PowerPC/PPCISelLowering.cpp
===================================================================
--- contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp (revision 270019)
+++ contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp (working copy)
--- lib/Target/PowerPC/PPCISelLowering.cpp (revision 270019)
+++ lib/Target/PowerPC/PPCISelLowering.cpp (working copy)
@@ -670,6 +670,7 @@
case PPCISD::ADDIS_TOC_HA: return "PPCISD::ADDIS_TOC_HA";
case PPCISD::LD_TOC_L: return "PPCISD::LD_TOC_L";
@ -972,10 +972,10 @@ Index: contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
MachineInstrBuilder MIB;
Index: contrib/llvm/lib/Target/PowerPC/PPCISelLowering.h
Index: lib/Target/PowerPC/PPCISelLowering.h
===================================================================
--- contrib/llvm/lib/Target/PowerPC/PPCISelLowering.h (revision 270019)
+++ contrib/llvm/lib/Target/PowerPC/PPCISelLowering.h (working copy)
--- lib/Target/PowerPC/PPCISelLowering.h (revision 270019)
+++ lib/Target/PowerPC/PPCISelLowering.h (working copy)
@@ -177,6 +177,12 @@
CR6SET,
CR6UNSET,
@ -989,10 +989,10 @@ Index: contrib/llvm/lib/Target/PowerPC/PPCISelLowering.h
/// G8RC = ADDIS_GOT_TPREL_HA %X2, Symbol - Used by the initial-exec
/// TLS model, produces an ADDIS8 instruction that adds the GOT
/// base to sym\@got\@tprel\@ha.
Index: contrib/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
Index: lib/Target/PowerPC/PPCInstr64Bit.td
===================================================================
--- contrib/llvm/lib/Target/PowerPC/PPCInstr64Bit.td (revision 270019)
+++ contrib/llvm/lib/Target/PowerPC/PPCInstr64Bit.td (working copy)
--- lib/Target/PowerPC/PPCInstr64Bit.td (revision 270019)
+++ lib/Target/PowerPC/PPCInstr64Bit.td (working copy)
@@ -36,10 +36,6 @@
def tocentry : Operand<iPTR> {
let MIOperandInfo = (ops i64imm:$imm);
@ -1004,10 +1004,10 @@ Index: contrib/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
def tlsreg : Operand<i64> {
let EncoderMethod = "getTLSRegEncoding";
let ParserMatchClass = PPCTLSRegOperand;
Index: contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td
Index: lib/Target/PowerPC/PPCInstrInfo.td
===================================================================
--- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td (revision 270019)
+++ contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td (working copy)
--- lib/Target/PowerPC/PPCInstrInfo.td (revision 270019)
+++ lib/Target/PowerPC/PPCInstrInfo.td (working copy)
@@ -57,6 +57,9 @@
SDTCisPtrTy<0>, SDTCisVT<1, i32>
]>;
@ -1130,10 +1130,10 @@ Index: contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td
// Standard shifts. These are represented separately from the real shifts above
// so that we can distinguish between shifts that allow 5-bit and 6-bit shift
// amounts.
Index: contrib/llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
Index: lib/Target/PowerPC/PPCMCInstLower.cpp
===================================================================
--- contrib/llvm/lib/Target/PowerPC/PPCMCInstLower.cpp (revision 270019)
+++ contrib/llvm/lib/Target/PowerPC/PPCMCInstLower.cpp (working copy)
--- lib/Target/PowerPC/PPCMCInstLower.cpp (revision 270019)
+++ lib/Target/PowerPC/PPCMCInstLower.cpp (working copy)
@@ -13,6 +13,7 @@
//===----------------------------------------------------------------------===//
@ -1188,10 +1188,10 @@ Index: contrib/llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
const MCExpr *Expr = MCSymbolRefExpr::Create(Symbol, RefKind, Ctx);
if (!MO.isJTI() && MO.getOffset())
Index: contrib/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp
Index: lib/Target/PowerPC/PPCMachineFunctionInfo.cpp
===================================================================
--- contrib/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp (revision 270019)
+++ contrib/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp (working copy)
--- lib/Target/PowerPC/PPCMachineFunctionInfo.cpp (revision 270019)
+++ lib/Target/PowerPC/PPCMachineFunctionInfo.cpp (working copy)
@@ -8,8 +8,16 @@
//===----------------------------------------------------------------------===//
@ -1209,10 +1209,10 @@ Index: contrib/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp
+ return MF.getContext().GetOrCreateSymbol(Twine(MAI->getPrivateGlobalPrefix())+
+ Twine(MF.getFunctionNumber())+"$poff");
+}
Index: contrib/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h
Index: lib/Target/PowerPC/PPCMachineFunctionInfo.h
===================================================================
--- contrib/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h (revision 270019)
+++ contrib/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h (working copy)
--- lib/Target/PowerPC/PPCMachineFunctionInfo.h (revision 270019)
+++ lib/Target/PowerPC/PPCMachineFunctionInfo.h (working copy)
@@ -92,6 +92,12 @@
/// 64-bit SVR4 ABI.
SmallVector<unsigned, 3> MustSaveCRs;
@ -1249,10 +1249,10 @@ Index: contrib/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h
};
} // end of namespace llvm
Index: contrib/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
Index: lib/Target/PowerPC/PPCRegisterInfo.cpp
===================================================================
--- contrib/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp (revision 270019)
+++ contrib/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp (working copy)
--- lib/Target/PowerPC/PPCRegisterInfo.cpp (revision 270019)
+++ lib/Target/PowerPC/PPCRegisterInfo.cpp (working copy)
@@ -199,7 +199,16 @@
if (PPCFI->needsFP(MF))
Reserved.set(PPC::R31);
@ -1287,10 +1287,10 @@ Index: contrib/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
}
bool PPCRegisterInfo::hasBasePointer(const MachineFunction &MF) const {
Index: contrib/llvm/lib/Target/PowerPC/PPCSubtarget.h
Index: lib/Target/PowerPC/PPCSubtarget.h
===================================================================
--- contrib/llvm/lib/Target/PowerPC/PPCSubtarget.h (revision 270019)
+++ contrib/llvm/lib/Target/PowerPC/PPCSubtarget.h (working copy)
--- lib/Target/PowerPC/PPCSubtarget.h (revision 270019)
+++ lib/Target/PowerPC/PPCSubtarget.h (working copy)
@@ -189,6 +189,9 @@
/// isBGQ - True if this is a BG/Q platform.
bool isBGQ() const { return TargetTriple.getVendor() == Triple::BGQ; }